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gerrit.omnirom.org / android_bionic / a3255e2cd6afc09b361a23ce1cd0b105eb8b89fc / . / libc / kernel / uapi / linux / virtio_iommu.h
blob: 2e2b33320513f57c1866211517c317841be3847e [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +0000[diff] [blame]1/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Christopher Ferrisb8a95e22019-10-02 18:29:20 -0700[diff] [blame]7#ifndef _UAPI_LINUX_VIRTIO_IOMMU_H
8#define _UAPI_LINUX_VIRTIO_IOMMU_H
9#include <linux/types.h>
10#define VIRTIO_IOMMU_F_INPUT_RANGE 0
11#define VIRTIO_IOMMU_F_DOMAIN_RANGE 1
12#define VIRTIO_IOMMU_F_MAP_UNMAP 2
13#define VIRTIO_IOMMU_F_BYPASS 3
14#define VIRTIO_IOMMU_F_PROBE 4
15#define VIRTIO_IOMMU_F_MMIO 5
Christopher Ferris1ed55342022-03-22 16:06:25 -0700[diff] [blame]16#define VIRTIO_IOMMU_F_BYPASS_CONFIG 6
Christopher Ferrisb8a95e22019-10-02 18:29:20 -0700[diff] [blame]17struct virtio_iommu_range_64 {
Christopher Ferris25c18d42020-10-14 17:42:58 -0700[diff] [blame]18 __le64 start;
19 __le64 end;
Christopher Ferrisb8a95e22019-10-02 18:29:20 -0700[diff] [blame]20};
21struct virtio_iommu_range_32 {
Christopher Ferris25c18d42020-10-14 17:42:58 -0700[diff] [blame]22 __le32 start;
23 __le32 end;
Christopher Ferrisb8a95e22019-10-02 18:29:20 -0700[diff] [blame]24};
25struct virtio_iommu_config {
Christopher Ferris25c18d42020-10-14 17:42:58 -0700[diff] [blame]26 __le64 page_size_mask;
Christopher Ferrisb8a95e22019-10-02 18:29:20 -0700[diff] [blame]27 struct virtio_iommu_range_64 input_range;
28 struct virtio_iommu_range_32 domain_range;
Christopher Ferris25c18d42020-10-14 17:42:58 -0700[diff] [blame]29 __le32 probe_size;
Christopher Ferris1ed55342022-03-22 16:06:25 -0700[diff] [blame]30 __u8 bypass;
31 __u8 reserved[3];
Christopher Ferrisb8a95e22019-10-02 18:29:20 -0700[diff] [blame]32};
33#define VIRTIO_IOMMU_T_ATTACH 0x01
34#define VIRTIO_IOMMU_T_DETACH 0x02
35#define VIRTIO_IOMMU_T_MAP 0x03
36#define VIRTIO_IOMMU_T_UNMAP 0x04
37#define VIRTIO_IOMMU_T_PROBE 0x05
38#define VIRTIO_IOMMU_S_OK 0x00
39#define VIRTIO_IOMMU_S_IOERR 0x01
40#define VIRTIO_IOMMU_S_UNSUPP 0x02
41#define VIRTIO_IOMMU_S_DEVERR 0x03
42#define VIRTIO_IOMMU_S_INVAL 0x04
43#define VIRTIO_IOMMU_S_RANGE 0x05
44#define VIRTIO_IOMMU_S_NOENT 0x06
45#define VIRTIO_IOMMU_S_FAULT 0x07
46#define VIRTIO_IOMMU_S_NOMEM 0x08
47struct virtio_iommu_req_head {
48 __u8 type;
49 __u8 reserved[3];
50};
51struct virtio_iommu_req_tail {
52 __u8 status;
53 __u8 reserved[3];
54};
Christopher Ferris1ed55342022-03-22 16:06:25 -0700[diff] [blame]55#define VIRTIO_IOMMU_ATTACH_F_BYPASS (1 << 0)
Christopher Ferrisb8a95e22019-10-02 18:29:20 -0700[diff] [blame]56struct virtio_iommu_req_attach {
57 struct virtio_iommu_req_head head;
58 __le32 domain;
59 __le32 endpoint;
Christopher Ferris1ed55342022-03-22 16:06:25 -0700[diff] [blame]60 __le32 flags;
61 __u8 reserved[4];
Christopher Ferrisb8a95e22019-10-02 18:29:20 -0700[diff] [blame]62 struct virtio_iommu_req_tail tail;
63};
64struct virtio_iommu_req_detach {
65 struct virtio_iommu_req_head head;
66 __le32 domain;
67 __le32 endpoint;
68 __u8 reserved[8];
69 struct virtio_iommu_req_tail tail;
70};
71#define VIRTIO_IOMMU_MAP_F_READ (1 << 0)
72#define VIRTIO_IOMMU_MAP_F_WRITE (1 << 1)
73#define VIRTIO_IOMMU_MAP_F_MMIO (1 << 2)
74#define VIRTIO_IOMMU_MAP_F_MASK (VIRTIO_IOMMU_MAP_F_READ | VIRTIO_IOMMU_MAP_F_WRITE | VIRTIO_IOMMU_MAP_F_MMIO)
75struct virtio_iommu_req_map {
76 struct virtio_iommu_req_head head;
77 __le32 domain;
78 __le64 virt_start;
79 __le64 virt_end;
80 __le64 phys_start;
81 __le32 flags;
82 struct virtio_iommu_req_tail tail;
83};
84struct virtio_iommu_req_unmap {
85 struct virtio_iommu_req_head head;
86 __le32 domain;
87 __le64 virt_start;
88 __le64 virt_end;
89 __u8 reserved[4];
90 struct virtio_iommu_req_tail tail;
91};
92#define VIRTIO_IOMMU_PROBE_T_NONE 0
93#define VIRTIO_IOMMU_PROBE_T_RESV_MEM 1
94#define VIRTIO_IOMMU_PROBE_T_MASK 0xfff
95struct virtio_iommu_probe_property {
96 __le16 type;
97 __le16 length;
98};
99#define VIRTIO_IOMMU_RESV_MEM_T_RESERVED 0
100#define VIRTIO_IOMMU_RESV_MEM_T_MSI 1
101struct virtio_iommu_probe_resv_mem {
102 struct virtio_iommu_probe_property head;
103 __u8 subtype;
104 __u8 reserved[3];
105 __le64 start;
106 __le64 end;
107};
108struct virtio_iommu_req_probe {
109 struct virtio_iommu_req_head head;
110 __le32 endpoint;
111 __u8 reserved[64];
112 __u8 properties[];
113};
114#define VIRTIO_IOMMU_FAULT_R_UNKNOWN 0
115#define VIRTIO_IOMMU_FAULT_R_DOMAIN 1
116#define VIRTIO_IOMMU_FAULT_R_MAPPING 2
117#define VIRTIO_IOMMU_FAULT_F_READ (1 << 0)
118#define VIRTIO_IOMMU_FAULT_F_WRITE (1 << 1)
119#define VIRTIO_IOMMU_FAULT_F_EXEC (1 << 2)
120#define VIRTIO_IOMMU_FAULT_F_ADDRESS (1 << 8)
121struct virtio_iommu_fault {
122 __u8 reason;
123 __u8 reserved[3];
124 __le32 flags;
125 __le32 endpoint;
126 __u8 reserved2[4];
127 __le64 address;
128};
129#endif