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gerrit.omnirom.org / android_bionic / 9a2741010a93bfa08cc03e8d92c20c47d7e65abc / . / libc / kernel / uapi / linux / hsi / hsi_char.h
blob: e127a35278778e11b32d8c09438797419c621fa4 [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]1/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __HSI_CHAR_H
20#define __HSI_CHAR_H
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]21#include <linux/types.h>
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]22#define HSI_CHAR_MAGIC 'k'
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]23#define HSC_IOW(num,dtype) _IOW(HSI_CHAR_MAGIC, num, dtype)
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]24#define HSC_IOR(num,dtype) _IOR(HSI_CHAR_MAGIC, num, dtype)
25#define HSC_IOWR(num,dtype) _IOWR(HSI_CHAR_MAGIC, num, dtype)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]26#define HSC_IO(num) _IO(HSI_CHAR_MAGIC, num)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]27#define HSC_RESET HSC_IO(16)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]28#define HSC_SET_PM HSC_IO(17)
29#define HSC_SEND_BREAK HSC_IO(18)
30#define HSC_SET_RX HSC_IOW(19, struct hsc_rx_config)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]31#define HSC_GET_RX HSC_IOW(20, struct hsc_rx_config)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]32#define HSC_SET_TX HSC_IOW(21, struct hsc_tx_config)
33#define HSC_GET_TX HSC_IOW(22, struct hsc_tx_config)
34#define HSC_PM_DISABLE 0
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]35#define HSC_PM_ENABLE 1
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]36#define HSC_MODE_STREAM 1
37#define HSC_MODE_FRAME 2
38#define HSC_FLOW_SYNC 0
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]39#define HSC_ARB_RR 0
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]40#define HSC_ARB_PRIO 1
41struct hsc_rx_config {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]42 __u32 mode;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]43 __u32 flow;
44 __u32 channels;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]45};
46struct hsc_tx_config {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]47 __u32 mode;
48 __u32 channels;
49 __u32 speed;
50 __u32 arb_mode;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]51};
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]52#endif