Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef _UAPI_SCC_H |
| 20 | #define _UAPI_SCC_H |
| 21 | #define PA0HZP 0x00 |
| 22 | #define EAGLE 0x01 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 23 | #define PC100 0x02 |
| 24 | #define PRIMUS 0x04 |
| 25 | #define DRSI 0x08 |
| 26 | #define BAYCOM 0x10 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 27 | enum SCC_ioctl_cmds { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 28 | SIOCSCCRESERVED = SIOCDEVPRIVATE, |
| 29 | SIOCSCCCFG, |
| 30 | SIOCSCCINI, |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 31 | SIOCSCCCHANINI, |
| 32 | SIOCSCCSMEM, |
| 33 | SIOCSCCGKISS, |
| 34 | SIOCSCCSKISS, |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 35 | SIOCSCCGSTAT, |
| 36 | SIOCSCCCAL |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 37 | }; |
| 38 | enum L1_params { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 39 | PARAM_DATA, |
| 40 | PARAM_TXDELAY, |
| 41 | PARAM_PERSIST, |
| 42 | PARAM_SLOTTIME, |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 43 | PARAM_TXTAIL, |
| 44 | PARAM_FULLDUP, |
| 45 | PARAM_SOFTDCD, |
| 46 | PARAM_MUTE, |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 47 | PARAM_DTR, |
| 48 | PARAM_RTS, |
| 49 | PARAM_SPEED, |
| 50 | PARAM_ENDDELAY, |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 51 | PARAM_GROUP, |
| 52 | PARAM_IDLE, |
| 53 | PARAM_MIN, |
| 54 | PARAM_MAXKEY, |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 55 | PARAM_WAIT, |
| 56 | PARAM_MAXDEFER, |
| 57 | PARAM_TX, |
| 58 | PARAM_HWEVENT = 31, |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 59 | PARAM_RETURN = 255 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 60 | }; |
| 61 | enum FULLDUP_modes { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 62 | KISS_DUPLEX_HALF, |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 63 | KISS_DUPLEX_FULL, |
| 64 | KISS_DUPLEX_LINK, |
| 65 | KISS_DUPLEX_OPTIMA |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 66 | }; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 67 | #define TIMER_OFF 65535U |
| 68 | #define NO_SUCH_PARAM 65534U |
| 69 | enum HWEVENT_opts { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 70 | HWEV_DCD_ON, |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 71 | HWEV_DCD_OFF, |
| 72 | HWEV_ALL_SENT |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 73 | }; |
| 74 | #define RXGROUP 0100 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 75 | #define TXGROUP 0200 |
| 76 | enum CLOCK_sources { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 77 | CLK_DPLL, |
| 78 | CLK_EXTERNAL, |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 79 | CLK_DIVIDER, |
| 80 | CLK_BRG |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 81 | }; |
| 82 | enum TX_state { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 83 | TXS_IDLE, |
| 84 | TXS_BUSY, |
| 85 | TXS_ACTIVE, |
| 86 | TXS_NEWFRAME, |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 87 | TXS_IDLE2, |
| 88 | TXS_WAIT, |
| 89 | TXS_TIMEOUT |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 90 | }; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 91 | typedef unsigned long io_port; |
| 92 | struct scc_stat { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 93 | long rxints; |
| 94 | long txints; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 95 | long exints; |
| 96 | long spints; |
| 97 | long txframes; |
| 98 | long rxframes; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 99 | long rxerrs; |
| 100 | long txerrs; |
| 101 | unsigned int nospace; |
| 102 | unsigned int rx_over; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 103 | unsigned int tx_under; |
| 104 | unsigned int tx_state; |
| 105 | int tx_queued; |
| 106 | unsigned int maxqueue; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 107 | unsigned int bufsize; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 108 | }; |
| 109 | struct scc_modem { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 110 | long speed; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 111 | char clocksrc; |
| 112 | char nrz; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 113 | }; |
| 114 | struct scc_kiss_cmd { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 115 | int command; |
| 116 | unsigned param; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 117 | }; |
| 118 | struct scc_hw_config { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 119 | io_port data_a; |
| 120 | io_port ctrl_a; |
| 121 | io_port data_b; |
| 122 | io_port ctrl_b; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 123 | io_port vector_latch; |
| 124 | io_port special; |
| 125 | int irq; |
| 126 | long clock; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 127 | char option; |
| 128 | char brand; |
| 129 | char escc; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 130 | }; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 131 | struct scc_mem_config { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 132 | unsigned int dummy; |
| 133 | unsigned int bufsize; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 134 | }; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 135 | struct scc_calibrate { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 136 | unsigned int time; |
| 137 | unsigned char pattern; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 138 | }; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 139 | #endif |