blob: 333ad9d35df30e6e535504a207f2e9b595d8fbe3 [file] [log] [blame]
Christopher Ferris1ed55342022-03-22 16:06:25 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef KFD_SYSFS_H_INCLUDED
20#define KFD_SYSFS_H_INCLUDED
21#define HSA_CAP_HOT_PLUGGABLE 0x00000001
22#define HSA_CAP_ATS_PRESENT 0x00000002
23#define HSA_CAP_SHARED_WITH_GRAPHICS 0x00000004
24#define HSA_CAP_QUEUE_SIZE_POW2 0x00000008
25#define HSA_CAP_QUEUE_SIZE_32BIT 0x00000010
26#define HSA_CAP_QUEUE_IDLE_EVENT 0x00000020
27#define HSA_CAP_VA_LIMIT 0x00000040
28#define HSA_CAP_WATCH_POINTS_SUPPORTED 0x00000080
29#define HSA_CAP_WATCH_POINTS_TOTALBITS_MASK 0x00000f00
30#define HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT 8
31#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK 0x00003000
32#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT 12
33#define HSA_CAP_DOORBELL_TYPE_PRE_1_0 0x0
34#define HSA_CAP_DOORBELL_TYPE_1_0 0x1
35#define HSA_CAP_DOORBELL_TYPE_2_0 0x2
36#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP 0x00004000
Christopher Ferris8666d042023-09-06 14:55:31 -070037#define HSA_CAP_TRAP_DEBUG_SUPPORT 0x00008000
38#define HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_TRAP_OVERRIDE_SUPPORTED 0x00010000
39#define HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED 0x00020000
40#define HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED 0x00040000
Christopher Ferris1ed55342022-03-22 16:06:25 -070041#define HSA_CAP_RESERVED_WAS_SRAM_EDCSUPPORTED 0x00080000
42#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000
43#define HSA_CAP_RASEVENTNOTIFY 0x00200000
44#define HSA_CAP_ASIC_REVISION_MASK 0x03c00000
45#define HSA_CAP_ASIC_REVISION_SHIFT 22
46#define HSA_CAP_SRAM_EDCSUPPORTED 0x04000000
47#define HSA_CAP_SVMAPI_SUPPORTED 0x08000000
48#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000
Christopher Ferris8666d042023-09-06 14:55:31 -070049#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x20000000
Christopher Ferris1ed55342022-03-22 16:06:25 -070050#define HSA_CAP_RESERVED 0xe00f8000
Christopher Ferris8666d042023-09-06 14:55:31 -070051#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f
52#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_SHIFT 0
53#define HSA_DBG_WATCH_ADDR_MASK_HI_BIT_MASK 0x000003f0
54#define HSA_DBG_WATCH_ADDR_MASK_HI_BIT_SHIFT 4
55#define HSA_DBG_DISPATCH_INFO_ALWAYS_VALID 0x00000400
56#define HSA_DBG_WATCHPOINTS_EXCLUSIVE 0x00000800
57#define HSA_DBG_RESERVED 0xfffffffffffff000ull
Christopher Ferris1ed55342022-03-22 16:06:25 -070058#define HSA_MEM_HEAP_TYPE_SYSTEM 0
59#define HSA_MEM_HEAP_TYPE_FB_PUBLIC 1
60#define HSA_MEM_HEAP_TYPE_FB_PRIVATE 2
61#define HSA_MEM_HEAP_TYPE_GPU_GDS 3
62#define HSA_MEM_HEAP_TYPE_GPU_LDS 4
63#define HSA_MEM_HEAP_TYPE_GPU_SCRATCH 5
64#define HSA_MEM_FLAGS_HOT_PLUGGABLE 0x00000001
65#define HSA_MEM_FLAGS_NON_VOLATILE 0x00000002
66#define HSA_MEM_FLAGS_RESERVED 0xfffffffc
67#define HSA_CACHE_TYPE_DATA 0x00000001
68#define HSA_CACHE_TYPE_INSTRUCTION 0x00000002
69#define HSA_CACHE_TYPE_CPU 0x00000004
70#define HSA_CACHE_TYPE_HSACU 0x00000008
71#define HSA_CACHE_TYPE_RESERVED 0xfffffff0
72#define HSA_IOLINK_TYPE_UNDEFINED 0
73#define HSA_IOLINK_TYPE_HYPERTRANSPORT 1
74#define HSA_IOLINK_TYPE_PCIEXPRESS 2
75#define HSA_IOLINK_TYPE_AMBA 3
76#define HSA_IOLINK_TYPE_MIPI 4
77#define HSA_IOLINK_TYPE_QPI_1_1 5
78#define HSA_IOLINK_TYPE_RESERVED1 6
79#define HSA_IOLINK_TYPE_RESERVED2 7
80#define HSA_IOLINK_TYPE_RAPID_IO 8
81#define HSA_IOLINK_TYPE_INFINIBAND 9
82#define HSA_IOLINK_TYPE_RESERVED3 10
83#define HSA_IOLINK_TYPE_XGMI 11
84#define HSA_IOLINK_TYPE_XGOP 12
85#define HSA_IOLINK_TYPE_GZ 13
86#define HSA_IOLINK_TYPE_ETHERNET_RDMA 14
87#define HSA_IOLINK_TYPE_RDMA_OTHER 15
88#define HSA_IOLINK_TYPE_OTHER 16
89#define HSA_IOLINK_FLAGS_ENABLED (1 << 0)
90#define HSA_IOLINK_FLAGS_NON_COHERENT (1 << 1)
91#define HSA_IOLINK_FLAGS_NO_ATOMICS_32_BIT (1 << 2)
92#define HSA_IOLINK_FLAGS_NO_ATOMICS_64_BIT (1 << 3)
93#define HSA_IOLINK_FLAGS_NO_PEER_TO_PEER_DMA (1 << 4)
94#define HSA_IOLINK_FLAGS_RESERVED 0xffffffe0
95#endif