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gerrit.omnirom.org / android_bionic / 8177cdf1781bd9ebc6cc2db5baa570d6fa8d53b1 / . / libc / kernel / uapi / linux / iommu.h
blob: 172be9cb1abfa7dfedc17aed8c2df6cdec7aeb2e [file] [log] [blame]
Christopher Ferrisb8a95e22019-10-02 18:29:20 -0700[diff] [blame]1/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPI_IOMMU_H
20#define _UAPI_IOMMU_H
21#include <linux/types.h>
22#define IOMMU_FAULT_PERM_READ (1 << 0)
23#define IOMMU_FAULT_PERM_WRITE (1 << 1)
24#define IOMMU_FAULT_PERM_EXEC (1 << 2)
25#define IOMMU_FAULT_PERM_PRIV (1 << 3)
26enum iommu_fault_type {
27 IOMMU_FAULT_DMA_UNRECOV = 1,
28 IOMMU_FAULT_PAGE_REQ,
29};
30enum iommu_fault_reason {
31 IOMMU_FAULT_REASON_UNKNOWN = 0,
32 IOMMU_FAULT_REASON_PASID_FETCH,
33 IOMMU_FAULT_REASON_BAD_PASID_ENTRY,
34 IOMMU_FAULT_REASON_PASID_INVALID,
35 IOMMU_FAULT_REASON_WALK_EABT,
36 IOMMU_FAULT_REASON_PTE_FETCH,
37 IOMMU_FAULT_REASON_PERMISSION,
38 IOMMU_FAULT_REASON_ACCESS,
39 IOMMU_FAULT_REASON_OOR_ADDRESS,
40};
41struct iommu_fault_unrecoverable {
42 __u32 reason;
43#define IOMMU_FAULT_UNRECOV_PASID_VALID (1 << 0)
44#define IOMMU_FAULT_UNRECOV_ADDR_VALID (1 << 1)
45#define IOMMU_FAULT_UNRECOV_FETCH_ADDR_VALID (1 << 2)
46 __u32 flags;
47 __u32 pasid;
48 __u32 perm;
49 __u64 addr;
50 __u64 fetch_addr;
51};
52struct iommu_fault_page_request {
53#define IOMMU_FAULT_PAGE_REQUEST_PASID_VALID (1 << 0)
54#define IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE (1 << 1)
55#define IOMMU_FAULT_PAGE_REQUEST_PRIV_DATA (1 << 2)
56 __u32 flags;
57 __u32 pasid;
58 __u32 grpid;
59 __u32 perm;
60 __u64 addr;
61 __u64 private_data[2];
62};
63struct iommu_fault {
64 __u32 type;
65 __u32 padding;
66 union {
67 struct iommu_fault_unrecoverable event;
68 struct iommu_fault_page_request prm;
69 __u8 padding2[56];
70 };
71};
72enum iommu_page_response_code {
73 IOMMU_PAGE_RESP_SUCCESS = 0,
74 IOMMU_PAGE_RESP_INVALID,
75 IOMMU_PAGE_RESP_FAILURE,
76};
77struct iommu_page_response {
78#define IOMMU_PAGE_RESP_VERSION_1 1
79 __u32 version;
80#define IOMMU_PAGE_RESP_PASID_VALID (1 << 0)
81 __u32 flags;
82 __u32 pasid;
83 __u32 grpid;
84 __u32 code;
85};
Christopher Ferrisd32ca142020-02-04 16:16:51 -0800[diff] [blame]86enum iommu_inv_granularity {
87 IOMMU_INV_GRANU_DOMAIN,
88 IOMMU_INV_GRANU_PASID,
89 IOMMU_INV_GRANU_ADDR,
90 IOMMU_INV_GRANU_NR,
91};
92struct iommu_inv_addr_info {
93#define IOMMU_INV_ADDR_FLAGS_PASID (1 << 0)
94#define IOMMU_INV_ADDR_FLAGS_ARCHID (1 << 1)
95#define IOMMU_INV_ADDR_FLAGS_LEAF (1 << 2)
96 __u32 flags;
97 __u32 archid;
98 __u64 pasid;
99 __u64 addr;
100 __u64 granule_size;
101 __u64 nb_granules;
102};
103struct iommu_inv_pasid_info {
104#define IOMMU_INV_PASID_FLAGS_PASID (1 << 0)
105#define IOMMU_INV_PASID_FLAGS_ARCHID (1 << 1)
106 __u32 flags;
107 __u32 archid;
108 __u64 pasid;
109};
110struct iommu_cache_invalidate_info {
111#define IOMMU_CACHE_INVALIDATE_INFO_VERSION_1 1
112 __u32 version;
113#define IOMMU_CACHE_INV_TYPE_IOTLB (1 << 0)
114#define IOMMU_CACHE_INV_TYPE_DEV_IOTLB (1 << 1)
115#define IOMMU_CACHE_INV_TYPE_PASID (1 << 2)
116#define IOMMU_CACHE_INV_TYPE_NR (3)
117 __u8 cache;
118 __u8 granularity;
119 __u8 padding[2];
120 union {
121 struct iommu_inv_pasid_info pasid_info;
122 struct iommu_inv_addr_info addr_info;
123 };
124};
125struct iommu_gpasid_bind_data_vtd {
126#define IOMMU_SVA_VTD_GPASID_SRE (1 << 0)
127#define IOMMU_SVA_VTD_GPASID_EAFE (1 << 1)
128#define IOMMU_SVA_VTD_GPASID_PCD (1 << 2)
129#define IOMMU_SVA_VTD_GPASID_PWT (1 << 3)
130#define IOMMU_SVA_VTD_GPASID_EMTE (1 << 4)
131#define IOMMU_SVA_VTD_GPASID_CD (1 << 5)
132 __u64 flags;
133 __u32 pat;
134 __u32 emt;
135};
Christopher Ferris8177cdf2020-08-03 11:53:55 -0700[diff] [blame^]136#define IOMMU_SVA_VTD_GPASID_MTS_MASK (IOMMU_SVA_VTD_GPASID_CD | IOMMU_SVA_VTD_GPASID_EMTE | IOMMU_SVA_VTD_GPASID_PCD | IOMMU_SVA_VTD_GPASID_PWT)
Christopher Ferrisd32ca142020-02-04 16:16:51 -0800[diff] [blame]137struct iommu_gpasid_bind_data {
138#define IOMMU_GPASID_BIND_VERSION_1 1
139 __u32 version;
140#define IOMMU_PASID_FORMAT_INTEL_VTD 1
141 __u32 format;
142#define IOMMU_SVA_GPASID_VAL (1 << 0)
143 __u64 flags;
144 __u64 gpgd;
145 __u64 hpasid;
146 __u64 gpasid;
147 __u32 addr_width;
148 __u8 padding[12];
149 union {
150 struct iommu_gpasid_bind_data_vtd vtd;
151 };
152};
Christopher Ferrisb8a95e22019-10-02 18:29:20 -0700[diff] [blame]153#endif