Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef __MGA_DRM_H__ |
| 20 | #define __MGA_DRM_H__ |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 21 | #include "drm.h" |
| 22 | #ifdef __cplusplus |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 23 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 24 | #endif |
| 25 | #ifndef __MGA_SAREA_DEFINES__ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 26 | #define __MGA_SAREA_DEFINES__ |
| 27 | #define MGA_F 0x1 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 28 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 29 | #define MGA_A 0x2 |
| 30 | #define MGA_S 0x4 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 31 | #define MGA_T2 0x8 |
| 32 | #define MGA_WARP_TGZ 0 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 33 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 34 | #define MGA_WARP_TGZF (MGA_F) |
| 35 | #define MGA_WARP_TGZA (MGA_A) |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 36 | #define MGA_WARP_TGZAF (MGA_F | MGA_A) |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 37 | #define MGA_WARP_TGZS (MGA_S) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 38 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 39 | #define MGA_WARP_TGZSF (MGA_S | MGA_F) |
| 40 | #define MGA_WARP_TGZSA (MGA_S | MGA_A) |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 41 | #define MGA_WARP_TGZSAF (MGA_S | MGA_F | MGA_A) |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 42 | #define MGA_WARP_T2GZ (MGA_T2) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 43 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 44 | #define MGA_WARP_T2GZF (MGA_T2 | MGA_F) |
| 45 | #define MGA_WARP_T2GZA (MGA_T2 | MGA_A) |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 46 | #define MGA_WARP_T2GZAF (MGA_T2 | MGA_A | MGA_F) |
| 47 | #define MGA_WARP_T2GZS (MGA_T2 | MGA_S) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 48 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 49 | #define MGA_WARP_T2GZSF (MGA_T2 | MGA_S | MGA_F) |
| 50 | #define MGA_WARP_T2GZSA (MGA_T2 | MGA_S | MGA_A) |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 51 | #define MGA_WARP_T2GZSAF (MGA_T2 | MGA_S | MGA_F | MGA_A) |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 52 | #define MGA_MAX_G200_PIPES 8 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 53 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 54 | #define MGA_MAX_G400_PIPES 16 |
| 55 | #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 56 | #define MGA_WARP_UCODE_SIZE 32768 |
| 57 | #define MGA_CARD_TYPE_G200 1 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 58 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 59 | #define MGA_CARD_TYPE_G400 2 |
| 60 | #define MGA_CARD_TYPE_G450 3 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 61 | #define MGA_CARD_TYPE_G550 4 |
| 62 | #define MGA_FRONT 0x1 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 63 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 64 | #define MGA_BACK 0x2 |
| 65 | #define MGA_DEPTH 0x4 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 66 | #define MGA_UPLOAD_CONTEXT 0x1 |
| 67 | #define MGA_UPLOAD_TEX0 0x2 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 68 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 69 | #define MGA_UPLOAD_TEX1 0x4 |
| 70 | #define MGA_UPLOAD_PIPE 0x8 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 71 | #define MGA_UPLOAD_TEX0IMAGE 0x10 |
| 72 | #define MGA_UPLOAD_TEX1IMAGE 0x20 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 73 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 74 | #define MGA_UPLOAD_2D 0x40 |
| 75 | #define MGA_WAIT_AGE 0x80 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 76 | #define MGA_UPLOAD_CLIPRECTS 0x100 |
| 77 | #define MGA_BUFFER_SIZE (1 << 16) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 78 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 79 | #define MGA_NUM_BUFFERS 128 |
| 80 | #define MGA_NR_SAREA_CLIPRECTS 8 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 81 | #define MGA_CARD_HEAP 0 |
| 82 | #define MGA_AGP_HEAP 1 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 83 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 84 | #define MGA_NR_TEX_HEAPS 2 |
| 85 | #define MGA_NR_TEX_REGIONS 16 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 86 | #define MGA_LOG_MIN_TEX_REGION_SIZE 16 |
| 87 | #define DRM_MGA_IDLE_RETRY 2048 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 88 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 89 | #endif |
| 90 | typedef struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 91 | unsigned int dstorg; |
| 92 | unsigned int maccess; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 93 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 94 | unsigned int plnwt; |
| 95 | unsigned int dwgctl; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 96 | unsigned int alphactrl; |
| 97 | unsigned int fogcolor; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 98 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 99 | unsigned int wflag; |
| 100 | unsigned int tdualstage0; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 101 | unsigned int tdualstage1; |
| 102 | unsigned int fcol; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 103 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 104 | unsigned int stencil; |
| 105 | unsigned int stencilctl; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 106 | } drm_mga_context_regs_t; |
| 107 | typedef struct { |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 108 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 109 | unsigned int pitch; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 110 | } drm_mga_server_regs_t; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 111 | typedef struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 112 | unsigned int texctl; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 113 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 114 | unsigned int texctl2; |
| 115 | unsigned int texfilter; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 116 | unsigned int texbordercol; |
| 117 | unsigned int texorg; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 118 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 119 | unsigned int texwidth; |
| 120 | unsigned int texheight; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 121 | unsigned int texorg1; |
| 122 | unsigned int texorg2; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 123 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 124 | unsigned int texorg3; |
| 125 | unsigned int texorg4; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 126 | } drm_mga_texture_regs_t; |
| 127 | typedef struct { |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 128 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 129 | unsigned int head; |
| 130 | unsigned int wrap; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 131 | } drm_mga_age_t; |
| 132 | typedef struct _drm_mga_sarea { |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 133 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 134 | drm_mga_context_regs_t context_state; |
| 135 | drm_mga_server_regs_t server_state; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 136 | drm_mga_texture_regs_t tex_state[2]; |
| 137 | unsigned int warp_pipe; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 138 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 139 | unsigned int dirty; |
| 140 | unsigned int vertsize; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 141 | struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS]; |
| 142 | unsigned int nbox; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 143 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 144 | unsigned int req_drawable; |
| 145 | unsigned int req_draw_buffer; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 146 | unsigned int exported_drawable; |
| 147 | unsigned int exported_index; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 148 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 149 | unsigned int exported_stamp; |
| 150 | unsigned int exported_buffers; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 151 | unsigned int exported_nfront; |
| 152 | unsigned int exported_nback; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 153 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 154 | int exported_back_x, exported_front_x, exported_w; |
| 155 | int exported_back_y, exported_front_y, exported_h; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 156 | struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS]; |
| 157 | unsigned int status[4]; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 158 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 159 | unsigned int last_wrap; |
| 160 | drm_mga_age_t last_frame; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 161 | unsigned int last_enqueue; |
| 162 | unsigned int last_dispatch; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 163 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 164 | unsigned int last_quiescent; |
| 165 | struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1]; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 166 | unsigned int texAge[MGA_NR_TEX_HEAPS]; |
| 167 | int ctxOwner; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 168 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 169 | } drm_mga_sarea_t; |
| 170 | #define DRM_MGA_INIT 0x00 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 171 | #define DRM_MGA_FLUSH 0x01 |
| 172 | #define DRM_MGA_RESET 0x02 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 173 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 174 | #define DRM_MGA_SWAP 0x03 |
| 175 | #define DRM_MGA_CLEAR 0x04 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 176 | #define DRM_MGA_VERTEX 0x05 |
| 177 | #define DRM_MGA_INDICES 0x06 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 178 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 179 | #define DRM_MGA_ILOAD 0x07 |
| 180 | #define DRM_MGA_BLIT 0x08 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 181 | #define DRM_MGA_GETPARAM 0x09 |
| 182 | #define DRM_MGA_SET_FENCE 0x0a |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 183 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 184 | #define DRM_MGA_WAIT_FENCE 0x0b |
| 185 | #define DRM_MGA_DMA_BOOTSTRAP 0x0c |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 186 | #define DRM_IOCTL_MGA_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t) |
| 187 | #define DRM_IOCTL_MGA_FLUSH DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_FLUSH, struct drm_lock) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 188 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 189 | #define DRM_IOCTL_MGA_RESET DRM_IO(DRM_COMMAND_BASE + DRM_MGA_RESET) |
| 190 | #define DRM_IOCTL_MGA_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_MGA_SWAP) |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 191 | #define DRM_IOCTL_MGA_CLEAR DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t) |
| 192 | #define DRM_IOCTL_MGA_VERTEX DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 193 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 194 | #define DRM_IOCTL_MGA_INDICES DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t) |
| 195 | #define DRM_IOCTL_MGA_ILOAD DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t) |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 196 | #define DRM_IOCTL_MGA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t) |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 197 | #define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 198 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 199 | #define DRM_IOCTL_MGA_SET_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, __u32) |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 200 | #define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, __u32) |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 201 | #define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t) |
| 202 | typedef struct _drm_mga_warp_index { |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 203 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 204 | int installed; |
| 205 | unsigned long phys_addr; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 206 | int size; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 207 | } drm_mga_warp_index_t; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 208 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 209 | typedef struct drm_mga_init { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 210 | enum { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 211 | MGA_INIT_DMA = 0x01, |
| 212 | MGA_CLEANUP_DMA = 0x02 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 213 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 214 | } func; |
| 215 | unsigned long sarea_priv_offset; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 216 | int chipset; |
| 217 | int sgram; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 218 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 219 | unsigned int maccess; |
| 220 | unsigned int fb_cpp; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 221 | unsigned int front_offset, front_pitch; |
| 222 | unsigned int back_offset, back_pitch; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 223 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 224 | unsigned int depth_cpp; |
| 225 | unsigned int depth_offset, depth_pitch; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 226 | unsigned int texture_offset[MGA_NR_TEX_HEAPS]; |
| 227 | unsigned int texture_size[MGA_NR_TEX_HEAPS]; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 228 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 229 | unsigned long fb_offset; |
| 230 | unsigned long mmio_offset; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 231 | unsigned long status_offset; |
| 232 | unsigned long warp_offset; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 233 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 234 | unsigned long primary_offset; |
| 235 | unsigned long buffers_offset; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 236 | } drm_mga_init_t; |
| 237 | typedef struct drm_mga_dma_bootstrap { |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 238 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 239 | unsigned long texture_handle; |
| 240 | __u32 texture_size; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 241 | __u32 primary_size; |
| 242 | __u32 secondary_bin_count; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 243 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 244 | __u32 secondary_bin_size; |
| 245 | __u32 agp_mode; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 246 | __u8 agp_size; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 247 | } drm_mga_dma_bootstrap_t; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 248 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 249 | typedef struct drm_mga_clear { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 250 | unsigned int flags; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 251 | unsigned int clear_color; |
| 252 | unsigned int clear_depth; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 253 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 254 | unsigned int color_mask; |
| 255 | unsigned int depth_mask; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 256 | } drm_mga_clear_t; |
| 257 | typedef struct drm_mga_vertex { |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 258 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 259 | int idx; |
| 260 | int used; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 261 | int discard; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 262 | } drm_mga_vertex_t; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 263 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 264 | typedef struct drm_mga_indices { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 265 | int idx; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 266 | unsigned int start; |
| 267 | unsigned int end; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 268 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 269 | int discard; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 270 | } drm_mga_indices_t; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 271 | typedef struct drm_mga_iload { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 272 | int idx; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 273 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 274 | unsigned int dstorg; |
| 275 | unsigned int length; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 276 | } drm_mga_iload_t; |
| 277 | typedef struct _drm_mga_blit { |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 278 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 279 | unsigned int planemask; |
| 280 | unsigned int srcorg; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 281 | unsigned int dstorg; |
| 282 | int src_pitch, dst_pitch; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 283 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 284 | int delta_sx, delta_sy; |
| 285 | int delta_dx, delta_dy; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 286 | int height, ydir; |
| 287 | int source_pitch, dest_pitch; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 288 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 289 | } drm_mga_blit_t; |
| 290 | #define MGA_PARAM_IRQ_NR 1 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 291 | #define MGA_PARAM_CARD_TYPE 2 |
| 292 | typedef struct drm_mga_getparam { |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 293 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 294 | int param; |
| 295 | void __user * value; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 296 | } drm_mga_getparam_t; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 297 | #ifdef __cplusplus |
| 298 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 299 | #endif |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 300 | #endif |