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gerrit.omnirom.org / android_bionic / 6a25dff8a3af1b4720bc7ac77c37bb9833b5a616 / . / libc / kernel / uapi / linux / scc.h
blob: f3640d75760409d3172ba88a708bcd2eef6864ce [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +0000[diff] [blame]1/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]7#ifndef _UAPI_SCC_H
8#define _UAPI_SCC_H
Christopher Ferrisef80d682020-02-04 16:16:51 -0800[diff] [blame]9#include <linux/sockios.h>
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]10#define PA0HZP 0x00
11#define EAGLE 0x01
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]12#define PC100 0x02
13#define PRIMUS 0x04
14#define DRSI 0x08
15#define BAYCOM 0x10
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]16enum SCC_ioctl_cmds {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]17 SIOCSCCRESERVED = SIOCDEVPRIVATE,
18 SIOCSCCCFG,
19 SIOCSCCINI,
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]20 SIOCSCCCHANINI,
21 SIOCSCCSMEM,
22 SIOCSCCGKISS,
23 SIOCSCCSKISS,
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]24 SIOCSCCGSTAT,
25 SIOCSCCCAL
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]26};
27enum L1_params {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]28 PARAM_DATA,
29 PARAM_TXDELAY,
30 PARAM_PERSIST,
31 PARAM_SLOTTIME,
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]32 PARAM_TXTAIL,
33 PARAM_FULLDUP,
34 PARAM_SOFTDCD,
35 PARAM_MUTE,
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]36 PARAM_DTR,
37 PARAM_RTS,
38 PARAM_SPEED,
39 PARAM_ENDDELAY,
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]40 PARAM_GROUP,
41 PARAM_IDLE,
42 PARAM_MIN,
43 PARAM_MAXKEY,
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]44 PARAM_WAIT,
45 PARAM_MAXDEFER,
46 PARAM_TX,
47 PARAM_HWEVENT = 31,
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]48 PARAM_RETURN = 255
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]49};
50enum FULLDUP_modes {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]51 KISS_DUPLEX_HALF,
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]52 KISS_DUPLEX_FULL,
53 KISS_DUPLEX_LINK,
54 KISS_DUPLEX_OPTIMA
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]55};
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]56#define TIMER_OFF 65535U
57#define NO_SUCH_PARAM 65534U
58enum HWEVENT_opts {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]59 HWEV_DCD_ON,
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]60 HWEV_DCD_OFF,
61 HWEV_ALL_SENT
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]62};
63#define RXGROUP 0100
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]64#define TXGROUP 0200
65enum CLOCK_sources {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]66 CLK_DPLL,
67 CLK_EXTERNAL,
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]68 CLK_DIVIDER,
69 CLK_BRG
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]70};
71enum TX_state {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]72 TXS_IDLE,
73 TXS_BUSY,
74 TXS_ACTIVE,
75 TXS_NEWFRAME,
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]76 TXS_IDLE2,
77 TXS_WAIT,
78 TXS_TIMEOUT
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]79};
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]80typedef unsigned long io_port;
81struct scc_stat {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]82 long rxints;
83 long txints;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]84 long exints;
85 long spints;
86 long txframes;
87 long rxframes;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]88 long rxerrs;
89 long txerrs;
90 unsigned int nospace;
91 unsigned int rx_over;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]92 unsigned int tx_under;
93 unsigned int tx_state;
94 int tx_queued;
95 unsigned int maxqueue;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]96 unsigned int bufsize;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]97};
98struct scc_modem {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]99 long speed;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]100 char clocksrc;
101 char nrz;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]102};
103struct scc_kiss_cmd {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]104 int command;
105 unsigned param;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]106};
107struct scc_hw_config {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]108 io_port data_a;
109 io_port ctrl_a;
110 io_port data_b;
111 io_port ctrl_b;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]112 io_port vector_latch;
113 io_port special;
114 int irq;
115 long clock;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]116 char option;
117 char brand;
118 char escc;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]119};
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]120struct scc_mem_config {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]121 unsigned int dummy;
122 unsigned int bufsize;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]123};
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]124struct scc_calibrate {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]125 unsigned int time;
126 unsigned char pattern;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]127};
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]128#endif