blob: 48bfe637a3f5fc8ee4f6f43a2ce2558fbd8f8cde [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +00001/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Ben Cheng655a7c02013-10-16 16:09:24 -07007#ifndef OMAP3_ISP_USER_H
8#define OMAP3_ISP_USER_H
9#include <linux/types.h>
10#include <linux/videodev2.h>
Tao Baod7db5942015-01-28 10:07:51 -080011#define VIDIOC_OMAP3ISP_CCDC_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct omap3isp_ccdc_update_config)
12#define VIDIOC_OMAP3ISP_PRV_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct omap3isp_prev_update_config)
13#define VIDIOC_OMAP3ISP_AEWB_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct omap3isp_h3a_aewb_config)
14#define VIDIOC_OMAP3ISP_HIST_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct omap3isp_hist_config)
Tao Baod7db5942015-01-28 10:07:51 -080015#define VIDIOC_OMAP3ISP_AF_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct omap3isp_h3a_af_config)
16#define VIDIOC_OMAP3ISP_STAT_REQ _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct omap3isp_stat_data)
Christopher Ferris9ce28842018-10-25 12:11:39 -070017#define VIDIOC_OMAP3ISP_STAT_REQ_TIME32 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct omap3isp_stat_data_time32)
Tao Baod7db5942015-01-28 10:07:51 -080018#define VIDIOC_OMAP3ISP_STAT_EN _IOWR('V', BASE_VIDIOC_PRIVATE + 7, unsigned long)
Ben Cheng655a7c02013-10-16 16:09:24 -070019#define V4L2_EVENT_OMAP3ISP_CLASS (V4L2_EVENT_PRIVATE_START | 0x100)
Ben Cheng655a7c02013-10-16 16:09:24 -070020#define V4L2_EVENT_OMAP3ISP_AEWB (V4L2_EVENT_OMAP3ISP_CLASS | 0x1)
21#define V4L2_EVENT_OMAP3ISP_AF (V4L2_EVENT_OMAP3ISP_CLASS | 0x2)
22#define V4L2_EVENT_OMAP3ISP_HIST (V4L2_EVENT_OMAP3ISP_CLASS | 0x3)
23struct omap3isp_stat_event_status {
Tao Baod7db5942015-01-28 10:07:51 -080024 __u32 frame_number;
25 __u16 config_counter;
26 __u8 buf_err;
Ben Cheng655a7c02013-10-16 16:09:24 -070027};
Ben Cheng655a7c02013-10-16 16:09:24 -070028#define OMAP3ISP_AEWB_MAX_SATURATION_LIM 1023
29#define OMAP3ISP_AEWB_MIN_WIN_H 2
30#define OMAP3ISP_AEWB_MAX_WIN_H 256
31#define OMAP3ISP_AEWB_MIN_WIN_W 6
Ben Cheng655a7c02013-10-16 16:09:24 -070032#define OMAP3ISP_AEWB_MAX_WIN_W 256
33#define OMAP3ISP_AEWB_MIN_WINVC 1
34#define OMAP3ISP_AEWB_MIN_WINHC 1
35#define OMAP3ISP_AEWB_MAX_WINVC 128
Ben Cheng655a7c02013-10-16 16:09:24 -070036#define OMAP3ISP_AEWB_MAX_WINHC 36
37#define OMAP3ISP_AEWB_MAX_WINSTART 4095
38#define OMAP3ISP_AEWB_MIN_SUB_INC 2
39#define OMAP3ISP_AEWB_MAX_SUB_INC 32
Ben Cheng655a7c02013-10-16 16:09:24 -070040#define OMAP3ISP_AEWB_MAX_BUF_SIZE 83600
41#define OMAP3ISP_AF_IIRSH_MIN 0
42#define OMAP3ISP_AF_IIRSH_MAX 4095
43#define OMAP3ISP_AF_PAXEL_HORIZONTAL_COUNT_MIN 1
Ben Cheng655a7c02013-10-16 16:09:24 -070044#define OMAP3ISP_AF_PAXEL_HORIZONTAL_COUNT_MAX 36
45#define OMAP3ISP_AF_PAXEL_VERTICAL_COUNT_MIN 1
46#define OMAP3ISP_AF_PAXEL_VERTICAL_COUNT_MAX 128
47#define OMAP3ISP_AF_PAXEL_INCREMENT_MIN 2
Ben Cheng655a7c02013-10-16 16:09:24 -070048#define OMAP3ISP_AF_PAXEL_INCREMENT_MAX 32
49#define OMAP3ISP_AF_PAXEL_HEIGHT_MIN 2
50#define OMAP3ISP_AF_PAXEL_HEIGHT_MAX 256
51#define OMAP3ISP_AF_PAXEL_WIDTH_MIN 16
Ben Cheng655a7c02013-10-16 16:09:24 -070052#define OMAP3ISP_AF_PAXEL_WIDTH_MAX 256
53#define OMAP3ISP_AF_PAXEL_HZSTART_MIN 1
54#define OMAP3ISP_AF_PAXEL_HZSTART_MAX 4095
55#define OMAP3ISP_AF_PAXEL_VTSTART_MIN 0
Ben Cheng655a7c02013-10-16 16:09:24 -070056#define OMAP3ISP_AF_PAXEL_VTSTART_MAX 4095
57#define OMAP3ISP_AF_THRESHOLD_MAX 255
58#define OMAP3ISP_AF_COEF_MAX 4095
59#define OMAP3ISP_AF_PAXEL_SIZE 48
Ben Cheng655a7c02013-10-16 16:09:24 -070060#define OMAP3ISP_AF_MAX_BUF_SIZE 221184
61struct omap3isp_h3a_aewb_config {
Tao Baod7db5942015-01-28 10:07:51 -080062 __u32 buf_size;
63 __u16 config_counter;
Tao Baod7db5942015-01-28 10:07:51 -080064 __u16 saturation_limit;
65 __u16 win_height;
66 __u16 win_width;
67 __u16 ver_win_count;
Tao Baod7db5942015-01-28 10:07:51 -080068 __u16 hor_win_count;
69 __u16 ver_win_start;
70 __u16 hor_win_start;
71 __u16 blk_ver_win_start;
Tao Baod7db5942015-01-28 10:07:51 -080072 __u16 blk_win_height;
73 __u16 subsample_ver_inc;
74 __u16 subsample_hor_inc;
75 __u8 alaw_enable;
Ben Cheng655a7c02013-10-16 16:09:24 -070076};
77struct omap3isp_stat_data {
Tao Baod7db5942015-01-28 10:07:51 -080078 struct timeval ts;
Elliott Hughes0f0c18f2023-03-29 15:53:31 -070079 void * buf;
Christopher Ferris10a76e62022-06-08 13:31:52 -070080 __struct_group(, frame,, __u32 buf_size;
Tao Baod7db5942015-01-28 10:07:51 -080081 __u16 frame_number;
82 __u16 cur_frame;
83 __u16 config_counter;
Christopher Ferris10a76e62022-06-08 13:31:52 -070084 );
Ben Cheng655a7c02013-10-16 16:09:24 -070085};
86#define OMAP3ISP_HIST_BINS_32 0
87#define OMAP3ISP_HIST_BINS_64 1
88#define OMAP3ISP_HIST_BINS_128 2
Ben Cheng655a7c02013-10-16 16:09:24 -070089#define OMAP3ISP_HIST_BINS_256 3
Tao Baod7db5942015-01-28 10:07:51 -080090#define OMAP3ISP_HIST_MEM_SIZE_BINS(n) ((1 << ((n) + 5)) * 4 * 4)
Ben Cheng655a7c02013-10-16 16:09:24 -070091#define OMAP3ISP_HIST_MEM_SIZE 1024
92#define OMAP3ISP_HIST_MIN_REGIONS 1
Ben Cheng655a7c02013-10-16 16:09:24 -070093#define OMAP3ISP_HIST_MAX_REGIONS 4
94#define OMAP3ISP_HIST_MAX_WB_GAIN 255
95#define OMAP3ISP_HIST_MIN_WB_GAIN 0
96#define OMAP3ISP_HIST_MAX_BIT_WIDTH 14
Ben Cheng655a7c02013-10-16 16:09:24 -070097#define OMAP3ISP_HIST_MIN_BIT_WIDTH 8
98#define OMAP3ISP_HIST_MAX_WG 4
99#define OMAP3ISP_HIST_MAX_BUF_SIZE 4096
100#define OMAP3ISP_HIST_SOURCE_CCDC 0
Ben Cheng655a7c02013-10-16 16:09:24 -0700101#define OMAP3ISP_HIST_SOURCE_MEM 1
102#define OMAP3ISP_HIST_CFA_BAYER 0
103#define OMAP3ISP_HIST_CFA_FOVEONX3 1
104struct omap3isp_hist_region {
Tao Baod7db5942015-01-28 10:07:51 -0800105 __u16 h_start;
106 __u16 h_end;
107 __u16 v_start;
108 __u16 v_end;
Ben Cheng655a7c02013-10-16 16:09:24 -0700109};
110struct omap3isp_hist_config {
Tao Baod7db5942015-01-28 10:07:51 -0800111 __u32 buf_size;
112 __u16 config_counter;
Tao Baod7db5942015-01-28 10:07:51 -0800113 __u8 num_acc_frames;
114 __u16 hist_bins;
115 __u8 cfa;
116 __u8 wg[OMAP3ISP_HIST_MAX_WG];
Tao Baod7db5942015-01-28 10:07:51 -0800117 __u8 num_regions;
118 struct omap3isp_hist_region region[OMAP3ISP_HIST_MAX_REGIONS];
Ben Cheng655a7c02013-10-16 16:09:24 -0700119};
120#define OMAP3ISP_AF_NUM_COEF 11
Ben Cheng655a7c02013-10-16 16:09:24 -0700121enum omap3isp_h3a_af_fvmode {
Tao Baod7db5942015-01-28 10:07:51 -0800122 OMAP3ISP_AF_MODE_SUMMED = 0,
123 OMAP3ISP_AF_MODE_PEAK = 1
Ben Cheng655a7c02013-10-16 16:09:24 -0700124};
Ben Cheng655a7c02013-10-16 16:09:24 -0700125enum omap3isp_h3a_af_rgbpos {
Tao Baod7db5942015-01-28 10:07:51 -0800126 OMAP3ISP_AF_GR_GB_BAYER = 0,
127 OMAP3ISP_AF_RG_GB_BAYER = 1,
128 OMAP3ISP_AF_GR_BG_BAYER = 2,
Tao Baod7db5942015-01-28 10:07:51 -0800129 OMAP3ISP_AF_RG_BG_BAYER = 3,
130 OMAP3ISP_AF_GG_RB_CUSTOM = 4,
131 OMAP3ISP_AF_RB_GG_CUSTOM = 5
Ben Cheng655a7c02013-10-16 16:09:24 -0700132};
Ben Cheng655a7c02013-10-16 16:09:24 -0700133struct omap3isp_h3a_af_hmf {
Tao Baod7db5942015-01-28 10:07:51 -0800134 __u8 enable;
135 __u8 threshold;
Ben Cheng655a7c02013-10-16 16:09:24 -0700136};
Ben Cheng655a7c02013-10-16 16:09:24 -0700137struct omap3isp_h3a_af_iir {
Tao Baod7db5942015-01-28 10:07:51 -0800138 __u16 h_start;
139 __u16 coeff_set0[OMAP3ISP_AF_NUM_COEF];
140 __u16 coeff_set1[OMAP3ISP_AF_NUM_COEF];
Ben Cheng655a7c02013-10-16 16:09:24 -0700141};
142struct omap3isp_h3a_af_paxel {
Tao Baod7db5942015-01-28 10:07:51 -0800143 __u16 h_start;
144 __u16 v_start;
Tao Baod7db5942015-01-28 10:07:51 -0800145 __u8 width;
146 __u8 height;
147 __u8 h_cnt;
148 __u8 v_cnt;
Tao Baod7db5942015-01-28 10:07:51 -0800149 __u8 line_inc;
Ben Cheng655a7c02013-10-16 16:09:24 -0700150};
151struct omap3isp_h3a_af_config {
Tao Baod7db5942015-01-28 10:07:51 -0800152 __u32 buf_size;
Tao Baod7db5942015-01-28 10:07:51 -0800153 __u16 config_counter;
154 struct omap3isp_h3a_af_hmf hmf;
155 struct omap3isp_h3a_af_iir iir;
156 struct omap3isp_h3a_af_paxel paxel;
Tao Baod7db5942015-01-28 10:07:51 -0800157 enum omap3isp_h3a_af_rgbpos rgb_pos;
158 enum omap3isp_h3a_af_fvmode fvmode;
159 __u8 alaw_enable;
Ben Cheng655a7c02013-10-16 16:09:24 -0700160};
Ben Cheng655a7c02013-10-16 16:09:24 -0700161#define OMAP3ISP_CCDC_ALAW (1 << 0)
162#define OMAP3ISP_CCDC_LPF (1 << 1)
163#define OMAP3ISP_CCDC_BLCLAMP (1 << 2)
164#define OMAP3ISP_CCDC_BCOMP (1 << 3)
Ben Cheng655a7c02013-10-16 16:09:24 -0700165#define OMAP3ISP_CCDC_FPC (1 << 4)
166#define OMAP3ISP_CCDC_CULL (1 << 5)
167#define OMAP3ISP_CCDC_CONFIG_LSC (1 << 7)
168#define OMAP3ISP_CCDC_TBL_LSC (1 << 8)
Ben Cheng655a7c02013-10-16 16:09:24 -0700169#define OMAP3ISP_RGB_MAX 3
170enum omap3isp_alaw_ipwidth {
Tao Baod7db5942015-01-28 10:07:51 -0800171 OMAP3ISP_ALAW_BIT12_3 = 0x3,
172 OMAP3ISP_ALAW_BIT11_2 = 0x4,
Tao Baod7db5942015-01-28 10:07:51 -0800173 OMAP3ISP_ALAW_BIT10_1 = 0x5,
174 OMAP3ISP_ALAW_BIT9_0 = 0x6
Ben Cheng655a7c02013-10-16 16:09:24 -0700175};
176struct omap3isp_ccdc_lsc_config {
Tao Baod7db5942015-01-28 10:07:51 -0800177 __u16 offset;
178 __u8 gain_mode_n;
179 __u8 gain_mode_m;
180 __u8 gain_format;
Tao Baod7db5942015-01-28 10:07:51 -0800181 __u16 fmtsph;
182 __u16 fmtlnh;
183 __u16 fmtslv;
184 __u16 fmtlnv;
Tao Baod7db5942015-01-28 10:07:51 -0800185 __u8 initial_x;
186 __u8 initial_y;
187 __u32 size;
Ben Cheng655a7c02013-10-16 16:09:24 -0700188};
Ben Cheng655a7c02013-10-16 16:09:24 -0700189struct omap3isp_ccdc_bclamp {
Tao Baod7db5942015-01-28 10:07:51 -0800190 __u8 obgain;
191 __u8 obstpixel;
192 __u8 oblines;
Tao Baod7db5942015-01-28 10:07:51 -0800193 __u8 oblen;
194 __u16 dcsubval;
Ben Cheng655a7c02013-10-16 16:09:24 -0700195};
196struct omap3isp_ccdc_fpc {
Tao Baod7db5942015-01-28 10:07:51 -0800197 __u16 fpnum;
198 __u32 fpcaddr;
Ben Cheng655a7c02013-10-16 16:09:24 -0700199};
200struct omap3isp_ccdc_blcomp {
Tao Baod7db5942015-01-28 10:07:51 -0800201 __u8 b_mg;
202 __u8 gb_g;
203 __u8 gr_cy;
204 __u8 r_ye;
Ben Cheng655a7c02013-10-16 16:09:24 -0700205};
206struct omap3isp_ccdc_culling {
Tao Baod7db5942015-01-28 10:07:51 -0800207 __u8 v_pattern;
208 __u16 h_odd;
Tao Baod7db5942015-01-28 10:07:51 -0800209 __u16 h_even;
Ben Cheng655a7c02013-10-16 16:09:24 -0700210};
211struct omap3isp_ccdc_update_config {
Tao Baod7db5942015-01-28 10:07:51 -0800212 __u16 update;
Tao Baod7db5942015-01-28 10:07:51 -0800213 __u16 flag;
214 enum omap3isp_alaw_ipwidth alawip;
Elliott Hughes0f0c18f2023-03-29 15:53:31 -0700215 struct omap3isp_ccdc_bclamp * bclamp;
216 struct omap3isp_ccdc_blcomp * blcomp;
217 struct omap3isp_ccdc_fpc * fpc;
218 struct omap3isp_ccdc_lsc_config * lsc_cfg;
219 struct omap3isp_ccdc_culling * cull;
220 __u8 * lsc;
Ben Cheng655a7c02013-10-16 16:09:24 -0700221};
222#define OMAP3ISP_PREV_LUMAENH (1 << 0)
223#define OMAP3ISP_PREV_INVALAW (1 << 1)
224#define OMAP3ISP_PREV_HRZ_MED (1 << 2)
Ben Cheng655a7c02013-10-16 16:09:24 -0700225#define OMAP3ISP_PREV_CFA (1 << 3)
226#define OMAP3ISP_PREV_CHROMA_SUPP (1 << 4)
227#define OMAP3ISP_PREV_WB (1 << 5)
228#define OMAP3ISP_PREV_BLKADJ (1 << 6)
Ben Cheng655a7c02013-10-16 16:09:24 -0700229#define OMAP3ISP_PREV_RGB2RGB (1 << 7)
230#define OMAP3ISP_PREV_COLOR_CONV (1 << 8)
231#define OMAP3ISP_PREV_YC_LIMIT (1 << 9)
232#define OMAP3ISP_PREV_DEFECT_COR (1 << 10)
Ben Cheng655a7c02013-10-16 16:09:24 -0700233#define OMAP3ISP_PREV_DRK_FRM_CAPTURE (1 << 12)
234#define OMAP3ISP_PREV_DRK_FRM_SUBTRACT (1 << 13)
235#define OMAP3ISP_PREV_LENS_SHADING (1 << 14)
236#define OMAP3ISP_PREV_NF (1 << 15)
Ben Cheng655a7c02013-10-16 16:09:24 -0700237#define OMAP3ISP_PREV_GAMMA (1 << 16)
238#define OMAP3ISP_PREV_NF_TBL_SIZE 64
239#define OMAP3ISP_PREV_CFA_TBL_SIZE 576
240#define OMAP3ISP_PREV_CFA_BLK_SIZE (OMAP3ISP_PREV_CFA_TBL_SIZE / 4)
Ben Cheng655a7c02013-10-16 16:09:24 -0700241#define OMAP3ISP_PREV_GAMMA_TBL_SIZE 1024
242#define OMAP3ISP_PREV_YENH_TBL_SIZE 128
243#define OMAP3ISP_PREV_DETECT_CORRECT_CHANNELS 4
244struct omap3isp_prev_hmed {
Tao Baod7db5942015-01-28 10:07:51 -0800245 __u8 odddist;
246 __u8 evendist;
247 __u8 thres;
Ben Cheng655a7c02013-10-16 16:09:24 -0700248};
Ben Cheng655a7c02013-10-16 16:09:24 -0700249enum omap3isp_cfa_fmt {
Tao Baod7db5942015-01-28 10:07:51 -0800250 OMAP3ISP_CFAFMT_BAYER,
251 OMAP3ISP_CFAFMT_SONYVGA,
252 OMAP3ISP_CFAFMT_RGBFOVEON,
Tao Baod7db5942015-01-28 10:07:51 -0800253 OMAP3ISP_CFAFMT_DNSPL,
254 OMAP3ISP_CFAFMT_HONEYCOMB,
255 OMAP3ISP_CFAFMT_RRGGBBFOVEON
Ben Cheng655a7c02013-10-16 16:09:24 -0700256};
Ben Cheng655a7c02013-10-16 16:09:24 -0700257struct omap3isp_prev_cfa {
Tao Baod7db5942015-01-28 10:07:51 -0800258 enum omap3isp_cfa_fmt format;
259 __u8 gradthrs_vert;
260 __u8 gradthrs_horz;
Tao Baod7db5942015-01-28 10:07:51 -0800261 __u32 table[4][OMAP3ISP_PREV_CFA_BLK_SIZE];
Ben Cheng655a7c02013-10-16 16:09:24 -0700262};
263struct omap3isp_prev_csup {
Tao Baod7db5942015-01-28 10:07:51 -0800264 __u8 gain;
Tao Baod7db5942015-01-28 10:07:51 -0800265 __u8 thres;
266 __u8 hypf_en;
Ben Cheng655a7c02013-10-16 16:09:24 -0700267};
268struct omap3isp_prev_wbal {
Tao Baod7db5942015-01-28 10:07:51 -0800269 __u16 dgain;
270 __u8 coef3;
271 __u8 coef2;
272 __u8 coef1;
Tao Baod7db5942015-01-28 10:07:51 -0800273 __u8 coef0;
Ben Cheng655a7c02013-10-16 16:09:24 -0700274};
275struct omap3isp_prev_blkadj {
Tao Baod7db5942015-01-28 10:07:51 -0800276 __u8 red;
Tao Baod7db5942015-01-28 10:07:51 -0800277 __u8 green;
278 __u8 blue;
Ben Cheng655a7c02013-10-16 16:09:24 -0700279};
280struct omap3isp_prev_rgbtorgb {
Tao Baod7db5942015-01-28 10:07:51 -0800281 __u16 matrix[OMAP3ISP_RGB_MAX][OMAP3ISP_RGB_MAX];
282 __u16 offset[OMAP3ISP_RGB_MAX];
Ben Cheng655a7c02013-10-16 16:09:24 -0700283};
284struct omap3isp_prev_csc {
Tao Baod7db5942015-01-28 10:07:51 -0800285 __u16 matrix[OMAP3ISP_RGB_MAX][OMAP3ISP_RGB_MAX];
286 __s16 offset[OMAP3ISP_RGB_MAX];
Ben Cheng655a7c02013-10-16 16:09:24 -0700287};
288struct omap3isp_prev_yclimit {
Tao Baod7db5942015-01-28 10:07:51 -0800289 __u8 minC;
290 __u8 maxC;
291 __u8 minY;
292 __u8 maxY;
Ben Cheng655a7c02013-10-16 16:09:24 -0700293};
294struct omap3isp_prev_dcor {
Tao Baod7db5942015-01-28 10:07:51 -0800295 __u8 couplet_mode_en;
296 __u32 detect_correct[OMAP3ISP_PREV_DETECT_CORRECT_CHANNELS];
Ben Cheng655a7c02013-10-16 16:09:24 -0700297};
298struct omap3isp_prev_nf {
Tao Baod7db5942015-01-28 10:07:51 -0800299 __u8 spread;
300 __u32 table[OMAP3ISP_PREV_NF_TBL_SIZE];
Ben Cheng655a7c02013-10-16 16:09:24 -0700301};
302struct omap3isp_prev_gtables {
Tao Baod7db5942015-01-28 10:07:51 -0800303 __u32 red[OMAP3ISP_PREV_GAMMA_TBL_SIZE];
304 __u32 green[OMAP3ISP_PREV_GAMMA_TBL_SIZE];
Tao Baod7db5942015-01-28 10:07:51 -0800305 __u32 blue[OMAP3ISP_PREV_GAMMA_TBL_SIZE];
Ben Cheng655a7c02013-10-16 16:09:24 -0700306};
307struct omap3isp_prev_luma {
Tao Baod7db5942015-01-28 10:07:51 -0800308 __u32 table[OMAP3ISP_PREV_YENH_TBL_SIZE];
Ben Cheng655a7c02013-10-16 16:09:24 -0700309};
310struct omap3isp_prev_update_config {
Tao Baod7db5942015-01-28 10:07:51 -0800311 __u32 update;
312 __u32 flag;
Tao Baod7db5942015-01-28 10:07:51 -0800313 __u32 shading_shift;
Elliott Hughes0f0c18f2023-03-29 15:53:31 -0700314 struct omap3isp_prev_luma * luma;
315 struct omap3isp_prev_hmed * hmed;
316 struct omap3isp_prev_cfa * cfa;
317 struct omap3isp_prev_csup * csup;
318 struct omap3isp_prev_wbal * wbal;
319 struct omap3isp_prev_blkadj * blkadj;
320 struct omap3isp_prev_rgbtorgb * rgb2rgb;
321 struct omap3isp_prev_csc * csc;
322 struct omap3isp_prev_yclimit * yclimit;
323 struct omap3isp_prev_dcor * dcor;
324 struct omap3isp_prev_nf * nf;
325 struct omap3isp_prev_gtables * gamma;
Ben Cheng655a7c02013-10-16 16:09:24 -0700326};
327#endif