blob: 8745c16c421e28cf33dbd778b4115dadbfb0d420 [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +00001/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Ben Cheng655a7c02013-10-16 16:09:24 -07007#ifndef _I2O_DEV_H
8#define _I2O_DEV_H
9#define MAX_I2O_CONTROLLERS 32
10#include <linux/ioctl.h>
Ben Cheng655a7c02013-10-16 16:09:24 -070011#include <linux/types.h>
12#define I2O_MAGIC_NUMBER 'i'
Tao Baod7db5942015-01-28 10:07:51 -080013#define I2OGETIOPS _IOR(I2O_MAGIC_NUMBER, 0, __u8[MAX_I2O_CONTROLLERS])
14#define I2OHRTGET _IOWR(I2O_MAGIC_NUMBER, 1, struct i2o_cmd_hrtlct)
Tao Baod7db5942015-01-28 10:07:51 -080015#define I2OLCTGET _IOWR(I2O_MAGIC_NUMBER, 2, struct i2o_cmd_hrtlct)
16#define I2OPARMSET _IOWR(I2O_MAGIC_NUMBER, 3, struct i2o_cmd_psetget)
17#define I2OPARMGET _IOWR(I2O_MAGIC_NUMBER, 4, struct i2o_cmd_psetget)
18#define I2OSWDL _IOWR(I2O_MAGIC_NUMBER, 5, struct i2o_sw_xfer)
Tao Baod7db5942015-01-28 10:07:51 -080019#define I2OSWUL _IOWR(I2O_MAGIC_NUMBER, 6, struct i2o_sw_xfer)
20#define I2OSWDEL _IOWR(I2O_MAGIC_NUMBER, 7, struct i2o_sw_xfer)
21#define I2OVALIDATE _IOR(I2O_MAGIC_NUMBER, 8, __u32)
22#define I2OHTML _IOWR(I2O_MAGIC_NUMBER, 9, struct i2o_html)
Tao Baod7db5942015-01-28 10:07:51 -080023#define I2OEVTREG _IOW(I2O_MAGIC_NUMBER, 10, struct i2o_evt_id)
24#define I2OEVTGET _IOR(I2O_MAGIC_NUMBER, 11, struct i2o_evt_info)
25#define I2OPASSTHRU _IOR(I2O_MAGIC_NUMBER, 12, struct i2o_cmd_passthru)
26#define I2OPASSTHRU32 _IOR(I2O_MAGIC_NUMBER, 12, struct i2o_cmd_passthru32)
Ben Cheng655a7c02013-10-16 16:09:24 -070027struct i2o_cmd_passthru32 {
Tao Baod7db5942015-01-28 10:07:51 -080028 unsigned int iop;
29 __u32 msg;
Ben Cheng655a7c02013-10-16 16:09:24 -070030};
Ben Cheng655a7c02013-10-16 16:09:24 -070031struct i2o_cmd_passthru {
Tao Baod7db5942015-01-28 10:07:51 -080032 unsigned int iop;
Elliott Hughes0f0c18f2023-03-29 15:53:31 -070033 void * msg;
Ben Cheng655a7c02013-10-16 16:09:24 -070034};
Ben Cheng655a7c02013-10-16 16:09:24 -070035struct i2o_cmd_hrtlct {
Tao Baod7db5942015-01-28 10:07:51 -080036 unsigned int iop;
Elliott Hughes0f0c18f2023-03-29 15:53:31 -070037 void * resbuf;
38 unsigned int * reslen;
Ben Cheng655a7c02013-10-16 16:09:24 -070039};
40struct i2o_cmd_psetget {
Tao Baod7db5942015-01-28 10:07:51 -080041 unsigned int iop;
42 unsigned int tid;
Elliott Hughes0f0c18f2023-03-29 15:53:31 -070043 void * opbuf;
Tao Baod7db5942015-01-28 10:07:51 -080044 unsigned int oplen;
Elliott Hughes0f0c18f2023-03-29 15:53:31 -070045 void * resbuf;
46 unsigned int * reslen;
Ben Cheng655a7c02013-10-16 16:09:24 -070047};
48struct i2o_sw_xfer {
Tao Baod7db5942015-01-28 10:07:51 -080049 unsigned int iop;
50 unsigned char flags;
Tao Baod7db5942015-01-28 10:07:51 -080051 unsigned char sw_type;
52 unsigned int sw_id;
Elliott Hughes0f0c18f2023-03-29 15:53:31 -070053 void * buf;
54 unsigned int * swlen;
55 unsigned int * maxfrag;
56 unsigned int * curfrag;
Ben Cheng655a7c02013-10-16 16:09:24 -070057};
58struct i2o_html {
Tao Baod7db5942015-01-28 10:07:51 -080059 unsigned int iop;
60 unsigned int tid;
61 unsigned int page;
Elliott Hughes0f0c18f2023-03-29 15:53:31 -070062 void * resbuf;
63 unsigned int * reslen;
64 void * qbuf;
Tao Baod7db5942015-01-28 10:07:51 -080065 unsigned int qlen;
Ben Cheng655a7c02013-10-16 16:09:24 -070066};
Ben Cheng655a7c02013-10-16 16:09:24 -070067#define I2O_EVT_Q_LEN 32
68struct i2o_evt_id {
Tao Baod7db5942015-01-28 10:07:51 -080069 unsigned int iop;
70 unsigned int tid;
Tao Baod7db5942015-01-28 10:07:51 -080071 unsigned int evt_mask;
Ben Cheng655a7c02013-10-16 16:09:24 -070072};
73#define I2O_EVT_DATA_SIZE 88
74struct i2o_evt_info {
Tao Baod7db5942015-01-28 10:07:51 -080075 struct i2o_evt_id id;
76 unsigned char evt_data[I2O_EVT_DATA_SIZE];
77 unsigned int data_size;
Ben Cheng655a7c02013-10-16 16:09:24 -070078};
Ben Cheng655a7c02013-10-16 16:09:24 -070079struct i2o_evt_get {
Tao Baod7db5942015-01-28 10:07:51 -080080 struct i2o_evt_info info;
81 int pending;
82 int lost;
Ben Cheng655a7c02013-10-16 16:09:24 -070083};
84typedef struct i2o_sg_io_hdr {
Tao Baod7db5942015-01-28 10:07:51 -080085 unsigned int flags;
Ben Cheng655a7c02013-10-16 16:09:24 -070086} i2o_sg_io_hdr_t;
Ben Cheng655a7c02013-10-16 16:09:24 -070087#define I2O_BUS_LOCAL 0
88#define I2O_BUS_ISA 1
89#define I2O_BUS_EISA 2
90#define I2O_BUS_PCI 4
Ben Cheng655a7c02013-10-16 16:09:24 -070091#define I2O_BUS_PCMCIA 5
92#define I2O_BUS_NUBUS 6
93#define I2O_BUS_CARDBUS 7
94#define I2O_BUS_UNKNOWN 0x80
Ben Cheng655a7c02013-10-16 16:09:24 -070095typedef struct _i2o_pci_bus {
Tao Baod7db5942015-01-28 10:07:51 -080096 __u8 PciFunctionNumber;
97 __u8 PciDeviceNumber;
98 __u8 PciBusNumber;
Tao Baod7db5942015-01-28 10:07:51 -080099 __u8 reserved;
100 __u16 PciVendorID;
101 __u16 PciDeviceID;
Ben Cheng655a7c02013-10-16 16:09:24 -0700102} i2o_pci_bus;
Ben Cheng655a7c02013-10-16 16:09:24 -0700103typedef struct _i2o_local_bus {
Tao Baod7db5942015-01-28 10:07:51 -0800104 __u16 LbBaseIOPort;
105 __u16 reserved;
106 __u32 LbBaseMemoryAddress;
Ben Cheng655a7c02013-10-16 16:09:24 -0700107} i2o_local_bus;
108typedef struct _i2o_isa_bus {
Tao Baod7db5942015-01-28 10:07:51 -0800109 __u16 IsaBaseIOPort;
110 __u8 CSN;
Tao Baod7db5942015-01-28 10:07:51 -0800111 __u8 reserved;
112 __u32 IsaBaseMemoryAddress;
Ben Cheng655a7c02013-10-16 16:09:24 -0700113} i2o_isa_bus;
114typedef struct _i2o_eisa_bus_info {
Tao Baod7db5942015-01-28 10:07:51 -0800115 __u16 EisaBaseIOPort;
116 __u8 reserved;
117 __u8 EisaSlotNumber;
118 __u32 EisaBaseMemoryAddress;
Ben Cheng655a7c02013-10-16 16:09:24 -0700119} i2o_eisa_bus;
120typedef struct _i2o_mca_bus {
Tao Baod7db5942015-01-28 10:07:51 -0800121 __u16 McaBaseIOPort;
122 __u8 reserved;
Tao Baod7db5942015-01-28 10:07:51 -0800123 __u8 McaSlotNumber;
124 __u32 McaBaseMemoryAddress;
Ben Cheng655a7c02013-10-16 16:09:24 -0700125} i2o_mca_bus;
126typedef struct _i2o_other_bus {
Tao Baod7db5942015-01-28 10:07:51 -0800127 __u16 BaseIOPort;
128 __u16 reserved;
129 __u32 BaseMemoryAddress;
Ben Cheng655a7c02013-10-16 16:09:24 -0700130} i2o_other_bus;
Ben Cheng655a7c02013-10-16 16:09:24 -0700131typedef struct _i2o_hrt_entry {
Tao Baod7db5942015-01-28 10:07:51 -0800132 __u32 adapter_id;
133 __u32 parent_tid : 12;
134 __u32 state : 4;
Tao Baod7db5942015-01-28 10:07:51 -0800135 __u32 bus_num : 8;
136 __u32 bus_type : 8;
137 union {
138 i2o_pci_bus pci_bus;
Tao Baod7db5942015-01-28 10:07:51 -0800139 i2o_local_bus local_bus;
140 i2o_isa_bus isa_bus;
141 i2o_eisa_bus eisa_bus;
142 i2o_mca_bus mca_bus;
Tao Baod7db5942015-01-28 10:07:51 -0800143 i2o_other_bus other_bus;
144 } bus;
Ben Cheng655a7c02013-10-16 16:09:24 -0700145} i2o_hrt_entry;
146typedef struct _i2o_hrt {
Tao Baod7db5942015-01-28 10:07:51 -0800147 __u16 num_entries;
148 __u8 entry_len;
149 __u8 hrt_version;
150 __u32 change_ind;
Tao Baod7db5942015-01-28 10:07:51 -0800151 i2o_hrt_entry hrt_entry[1];
Ben Cheng655a7c02013-10-16 16:09:24 -0700152} i2o_hrt;
153typedef struct _i2o_lct_entry {
Tao Baod7db5942015-01-28 10:07:51 -0800154 __u32 entry_size : 16;
Tao Baod7db5942015-01-28 10:07:51 -0800155 __u32 tid : 12;
156 __u32 reserved : 4;
157 __u32 change_ind;
158 __u32 device_flags;
Tao Baod7db5942015-01-28 10:07:51 -0800159 __u32 class_id : 12;
160 __u32 version : 4;
161 __u32 vendor_id : 16;
162 __u32 sub_class;
Tao Baod7db5942015-01-28 10:07:51 -0800163 __u32 user_tid : 12;
164 __u32 parent_tid : 12;
165 __u32 bios_info : 8;
166 __u8 identity_tag[8];
Tao Baod7db5942015-01-28 10:07:51 -0800167 __u32 event_capabilities;
Ben Cheng655a7c02013-10-16 16:09:24 -0700168} i2o_lct_entry;
169typedef struct _i2o_lct {
Tao Baod7db5942015-01-28 10:07:51 -0800170 __u32 table_size : 16;
Tao Baod7db5942015-01-28 10:07:51 -0800171 __u32 boot_tid : 12;
172 __u32 lct_ver : 4;
173 __u32 iop_flags;
174 __u32 change_ind;
Tao Baod7db5942015-01-28 10:07:51 -0800175 i2o_lct_entry lct_entry[1];
Ben Cheng655a7c02013-10-16 16:09:24 -0700176} i2o_lct;
177typedef struct _i2o_status_block {
Tao Baod7db5942015-01-28 10:07:51 -0800178 __u16 org_id;
Tao Baod7db5942015-01-28 10:07:51 -0800179 __u16 reserved;
180 __u16 iop_id : 12;
181 __u16 reserved1 : 4;
182 __u16 host_unit_id;
Tao Baod7db5942015-01-28 10:07:51 -0800183 __u16 segment_number : 12;
184 __u16 i2o_version : 4;
185 __u8 iop_state;
186 __u8 msg_type;
Tao Baod7db5942015-01-28 10:07:51 -0800187 __u16 inbound_frame_size;
188 __u8 init_code;
189 __u8 reserved2;
190 __u32 max_inbound_frames;
Tao Baod7db5942015-01-28 10:07:51 -0800191 __u32 cur_inbound_frames;
192 __u32 max_outbound_frames;
193 char product_id[24];
194 __u32 expected_lct_size;
Tao Baod7db5942015-01-28 10:07:51 -0800195 __u32 iop_capabilities;
196 __u32 desired_mem_size;
197 __u32 current_mem_size;
198 __u32 current_mem_base;
Tao Baod7db5942015-01-28 10:07:51 -0800199 __u32 desired_io_size;
200 __u32 current_io_size;
201 __u32 current_io_base;
202 __u32 reserved3 : 24;
Tao Baod7db5942015-01-28 10:07:51 -0800203 __u32 cmd_status : 8;
Ben Cheng655a7c02013-10-16 16:09:24 -0700204} i2o_status_block;
205#define I2O_EVT_IND_STATE_CHANGE 0x80000000
206#define I2O_EVT_IND_GENERAL_WARNING 0x40000000
Ben Cheng655a7c02013-10-16 16:09:24 -0700207#define I2O_EVT_IND_CONFIGURATION_FLAG 0x20000000
208#define I2O_EVT_IND_LOCK_RELEASE 0x10000000
209#define I2O_EVT_IND_CAPABILITY_CHANGE 0x08000000
210#define I2O_EVT_IND_DEVICE_RESET 0x04000000
Ben Cheng655a7c02013-10-16 16:09:24 -0700211#define I2O_EVT_IND_EVT_MASK_MODIFIED 0x02000000
212#define I2O_EVT_IND_FIELD_MODIFIED 0x01000000
213#define I2O_EVT_IND_VENDOR_EVT 0x00800000
214#define I2O_EVT_IND_DEVICE_STATE 0x00400000
Ben Cheng655a7c02013-10-16 16:09:24 -0700215#define I2O_EVT_IND_EXEC_RESOURCE_LIMITS 0x00000001
216#define I2O_EVT_IND_EXEC_CONNECTION_FAIL 0x00000002
217#define I2O_EVT_IND_EXEC_ADAPTER_FAULT 0x00000004
218#define I2O_EVT_IND_EXEC_POWER_FAIL 0x00000008
Ben Cheng655a7c02013-10-16 16:09:24 -0700219#define I2O_EVT_IND_EXEC_RESET_PENDING 0x00000010
220#define I2O_EVT_IND_EXEC_RESET_IMMINENT 0x00000020
221#define I2O_EVT_IND_EXEC_HW_FAIL 0x00000040
222#define I2O_EVT_IND_EXEC_XCT_CHANGE 0x00000080
Ben Cheng655a7c02013-10-16 16:09:24 -0700223#define I2O_EVT_IND_EXEC_NEW_LCT_ENTRY 0x00000100
224#define I2O_EVT_IND_EXEC_MODIFIED_LCT 0x00000200
225#define I2O_EVT_IND_EXEC_DDM_AVAILABILITY 0x00000400
226#define I2O_EVT_IND_BSA_VOLUME_LOAD 0x00000001
Ben Cheng655a7c02013-10-16 16:09:24 -0700227#define I2O_EVT_IND_BSA_VOLUME_UNLOAD 0x00000002
228#define I2O_EVT_IND_BSA_VOLUME_UNLOAD_REQ 0x00000004
229#define I2O_EVT_IND_BSA_CAPACITY_CHANGE 0x00000008
230#define I2O_EVT_IND_BSA_SCSI_SMART 0x00000010
Ben Cheng655a7c02013-10-16 16:09:24 -0700231#define I2O_EVT_STATE_CHANGE_NORMAL 0x00
232#define I2O_EVT_STATE_CHANGE_SUSPENDED 0x01
233#define I2O_EVT_STATE_CHANGE_RESTART 0x02
234#define I2O_EVT_STATE_CHANGE_NA_RECOVER 0x03
Ben Cheng655a7c02013-10-16 16:09:24 -0700235#define I2O_EVT_STATE_CHANGE_NA_NO_RECOVER 0x04
236#define I2O_EVT_STATE_CHANGE_QUIESCE_REQUEST 0x05
237#define I2O_EVT_STATE_CHANGE_FAILED 0x10
238#define I2O_EVT_STATE_CHANGE_FAULTED 0x11
Ben Cheng655a7c02013-10-16 16:09:24 -0700239#define I2O_EVT_GEN_WARNING_NORMAL 0x00
240#define I2O_EVT_GEN_WARNING_ERROR_THRESHOLD 0x01
241#define I2O_EVT_GEN_WARNING_MEDIA_FAULT 0x02
242#define I2O_EVT_CAPABILITY_OTHER 0x01
Ben Cheng655a7c02013-10-16 16:09:24 -0700243#define I2O_EVT_CAPABILITY_CHANGED 0x02
244#define I2O_EVT_SENSOR_STATE_CHANGED 0x01
245#define I2O_CLASS_VERSION_10 0x00
246#define I2O_CLASS_VERSION_11 0x01
Ben Cheng655a7c02013-10-16 16:09:24 -0700247#define I2O_CLASS_EXECUTIVE 0x000
248#define I2O_CLASS_DDM 0x001
249#define I2O_CLASS_RANDOM_BLOCK_STORAGE 0x010
250#define I2O_CLASS_SEQUENTIAL_STORAGE 0x011
Ben Cheng655a7c02013-10-16 16:09:24 -0700251#define I2O_CLASS_LAN 0x020
252#define I2O_CLASS_WAN 0x030
253#define I2O_CLASS_FIBRE_CHANNEL_PORT 0x040
254#define I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL 0x041
Ben Cheng655a7c02013-10-16 16:09:24 -0700255#define I2O_CLASS_SCSI_PERIPHERAL 0x051
256#define I2O_CLASS_ATE_PORT 0x060
257#define I2O_CLASS_ATE_PERIPHERAL 0x061
258#define I2O_CLASS_FLOPPY_CONTROLLER 0x070
Ben Cheng655a7c02013-10-16 16:09:24 -0700259#define I2O_CLASS_FLOPPY_DEVICE 0x071
260#define I2O_CLASS_BUS_ADAPTER 0x080
261#define I2O_CLASS_PEER_TRANSPORT_AGENT 0x090
262#define I2O_CLASS_PEER_TRANSPORT 0x091
Ben Cheng655a7c02013-10-16 16:09:24 -0700263#define I2O_CLASS_END 0xfff
264#define I2O_CLASS_MATCH_ANYCLASS 0xffffffff
265#define I2O_SUBCLASS_i960 0x001
266#define I2O_SUBCLASS_HDM 0x020
Ben Cheng655a7c02013-10-16 16:09:24 -0700267#define I2O_SUBCLASS_ISM 0x021
268#define I2O_PARAMS_FIELD_GET 0x0001
269#define I2O_PARAMS_LIST_GET 0x0002
270#define I2O_PARAMS_MORE_GET 0x0003
Ben Cheng655a7c02013-10-16 16:09:24 -0700271#define I2O_PARAMS_SIZE_GET 0x0004
272#define I2O_PARAMS_TABLE_GET 0x0005
273#define I2O_PARAMS_FIELD_SET 0x0006
274#define I2O_PARAMS_LIST_SET 0x0007
Ben Cheng655a7c02013-10-16 16:09:24 -0700275#define I2O_PARAMS_ROW_ADD 0x0008
276#define I2O_PARAMS_ROW_DELETE 0x0009
277#define I2O_PARAMS_TABLE_CLEAR 0x000A
278#define I2O_SNFORMAT_UNKNOWN 0
Ben Cheng655a7c02013-10-16 16:09:24 -0700279#define I2O_SNFORMAT_BINARY 1
280#define I2O_SNFORMAT_ASCII 2
281#define I2O_SNFORMAT_UNICODE 3
282#define I2O_SNFORMAT_LAN48_MAC 4
Ben Cheng655a7c02013-10-16 16:09:24 -0700283#define I2O_SNFORMAT_WAN 5
284#define I2O_SNFORMAT_LAN64_MAC 6
285#define I2O_SNFORMAT_DDM 7
286#define I2O_SNFORMAT_IEEE_REG64 8
Ben Cheng655a7c02013-10-16 16:09:24 -0700287#define I2O_SNFORMAT_IEEE_REG128 9
288#define I2O_SNFORMAT_UNKNOWN2 0xff
289#define ADAPTER_STATE_INITIALIZING 0x01
290#define ADAPTER_STATE_RESET 0x02
Ben Cheng655a7c02013-10-16 16:09:24 -0700291#define ADAPTER_STATE_HOLD 0x04
292#define ADAPTER_STATE_READY 0x05
293#define ADAPTER_STATE_OPERATIONAL 0x08
294#define ADAPTER_STATE_FAILED 0x10
Ben Cheng655a7c02013-10-16 16:09:24 -0700295#define ADAPTER_STATE_FAULTED 0x11
296#define I2O_SOFTWARE_MODULE_IRTOS 0x11
297#define I2O_SOFTWARE_MODULE_IOP_PRIVATE 0x22
298#define I2O_SOFTWARE_MODULE_IOP_CONFIG 0x23
Ben Cheng655a7c02013-10-16 16:09:24 -0700299#define I2O_VENDOR_DPT 0x001b
300#define I2O_DPT_SG_FLAG_INTERPRET 0x00010000
301#define I2O_DPT_SG_FLAG_PHYSICAL 0x00020000
302#define I2O_DPT_FLASH_FRAG_SIZE 0x10000
Ben Cheng655a7c02013-10-16 16:09:24 -0700303#define I2O_DPT_FLASH_READ 0x0101
304#define I2O_DPT_FLASH_WRITE 0x0102
305#endif