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Ben Cheng655a7c02013-10-16 16:09:24 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPIVFIO_H
20#define _UAPIVFIO_H
21#include <linux/types.h>
22#include <linux/ioctl.h>
Ben Cheng655a7c02013-10-16 16:09:24 -070023#define VFIO_API_VERSION 0
24#define VFIO_TYPE1_IOMMU 1
Christopher Ferris38062f92014-07-09 15:33:25 -070025#define VFIO_SPAPR_TCE_IOMMU 2
Christopher Ferrisba8d4f42014-09-03 19:56:49 -070026#define VFIO_TYPE1v2_IOMMU 3
Christopher Ferrisba8d4f42014-09-03 19:56:49 -070027#define VFIO_DMA_CC_IOMMU 4
Christopher Ferris82d75042015-01-26 10:57:07 -080028#define VFIO_EEH 5
29#define VFIO_TYPE1_NESTING_IOMMU 6
Christopher Ferris05d08e92016-02-04 13:16:38 -080030#define VFIO_SPAPR_TCE_v2_IOMMU 7
Christopher Ferris106b3a82016-08-24 12:15:38 -070031#define VFIO_NOIOMMU_IOMMU 8
Christopher Ferris05d08e92016-02-04 13:16:38 -080032#define VFIO_TYPE (';')
Christopher Ferris38062f92014-07-09 15:33:25 -070033#define VFIO_BASE 100
Christopher Ferris106b3a82016-08-24 12:15:38 -070034struct vfio_info_cap_header {
Christopher Ferris106b3a82016-08-24 12:15:38 -070035 __u16 id;
36 __u16 version;
37 __u32 next;
38};
Ben Cheng655a7c02013-10-16 16:09:24 -070039#define VFIO_GET_API_VERSION _IO(VFIO_TYPE, VFIO_BASE + 0)
40#define VFIO_CHECK_EXTENSION _IO(VFIO_TYPE, VFIO_BASE + 1)
Christopher Ferris05d08e92016-02-04 13:16:38 -080041#define VFIO_SET_IOMMU _IO(VFIO_TYPE, VFIO_BASE + 2)
Christopher Ferris38062f92014-07-09 15:33:25 -070042struct vfio_group_status {
Tao Baod7db5942015-01-28 10:07:51 -080043 __u32 argsz;
44 __u32 flags;
Christopher Ferris05d08e92016-02-04 13:16:38 -080045#define VFIO_GROUP_FLAGS_VIABLE (1 << 0)
Christopher Ferris38062f92014-07-09 15:33:25 -070046#define VFIO_GROUP_FLAGS_CONTAINER_SET (1 << 1)
Ben Cheng655a7c02013-10-16 16:09:24 -070047};
48#define VFIO_GROUP_GET_STATUS _IO(VFIO_TYPE, VFIO_BASE + 3)
Christopher Ferris05d08e92016-02-04 13:16:38 -080049#define VFIO_GROUP_SET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 4)
Christopher Ferris38062f92014-07-09 15:33:25 -070050#define VFIO_GROUP_UNSET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 5)
Ben Cheng655a7c02013-10-16 16:09:24 -070051#define VFIO_GROUP_GET_DEVICE_FD _IO(VFIO_TYPE, VFIO_BASE + 6)
52struct vfio_device_info {
Christopher Ferris05d08e92016-02-04 13:16:38 -080053 __u32 argsz;
Tao Baod7db5942015-01-28 10:07:51 -080054 __u32 flags;
Ben Cheng655a7c02013-10-16 16:09:24 -070055#define VFIO_DEVICE_FLAGS_RESET (1 << 0)
56#define VFIO_DEVICE_FLAGS_PCI (1 << 1)
Christopher Ferris05d08e92016-02-04 13:16:38 -080057#define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2)
58#define VFIO_DEVICE_FLAGS_AMBA (1 << 3)
Christopher Ferris525ce912017-07-26 13:12:53 -070059#define VFIO_DEVICE_FLAGS_CCW (1 << 4)
Christopher Ferris05d08e92016-02-04 13:16:38 -080060 __u32 num_regions;
Tao Baod7db5942015-01-28 10:07:51 -080061 __u32 num_irqs;
Ben Cheng655a7c02013-10-16 16:09:24 -070062};
63#define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7)
Christopher Ferris48af7cb2017-02-21 12:35:09 -080064#define VFIO_DEVICE_API_PCI_STRING "vfio-pci"
65#define VFIO_DEVICE_API_PLATFORM_STRING "vfio-platform"
66#define VFIO_DEVICE_API_AMBA_STRING "vfio-amba"
Christopher Ferris525ce912017-07-26 13:12:53 -070067#define VFIO_DEVICE_API_CCW_STRING "vfio-ccw"
Ben Cheng655a7c02013-10-16 16:09:24 -070068struct vfio_region_info {
Tao Baod7db5942015-01-28 10:07:51 -080069 __u32 argsz;
70 __u32 flags;
Ben Cheng655a7c02013-10-16 16:09:24 -070071#define VFIO_REGION_INFO_FLAG_READ (1 << 0)
72#define VFIO_REGION_INFO_FLAG_WRITE (1 << 1)
Christopher Ferris38062f92014-07-09 15:33:25 -070073#define VFIO_REGION_INFO_FLAG_MMAP (1 << 2)
Christopher Ferris106b3a82016-08-24 12:15:38 -070074#define VFIO_REGION_INFO_FLAG_CAPS (1 << 3)
Tao Baod7db5942015-01-28 10:07:51 -080075 __u32 index;
Christopher Ferris106b3a82016-08-24 12:15:38 -070076 __u32 cap_offset;
Tao Baod7db5942015-01-28 10:07:51 -080077 __u64 size;
Tao Baod7db5942015-01-28 10:07:51 -080078 __u64 offset;
Ben Cheng655a7c02013-10-16 16:09:24 -070079};
Christopher Ferris106b3a82016-08-24 12:15:38 -070080#define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8)
81#define VFIO_REGION_INFO_CAP_SPARSE_MMAP 1
82struct vfio_region_sparse_mmap_area {
83 __u64 offset;
Christopher Ferris106b3a82016-08-24 12:15:38 -070084 __u64 size;
85};
86struct vfio_region_info_cap_sparse_mmap {
87 struct vfio_info_cap_header header;
Christopher Ferris106b3a82016-08-24 12:15:38 -070088 __u32 nr_areas;
89 __u32 reserved;
90 struct vfio_region_sparse_mmap_area areas[];
91};
Christopher Ferris106b3a82016-08-24 12:15:38 -070092#define VFIO_REGION_INFO_CAP_TYPE 2
93struct vfio_region_info_cap_type {
94 struct vfio_info_cap_header header;
95 __u32 type;
Christopher Ferris106b3a82016-08-24 12:15:38 -070096 __u32 subtype;
97};
98#define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31)
99#define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700100#define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1)
101#define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2)
102#define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3)
103struct vfio_irq_info {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700104 __u32 argsz;
Tao Baod7db5942015-01-28 10:07:51 -0800105 __u32 flags;
Ben Cheng655a7c02013-10-16 16:09:24 -0700106#define VFIO_IRQ_INFO_EVENTFD (1 << 0)
107#define VFIO_IRQ_INFO_MASKABLE (1 << 1)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700108#define VFIO_IRQ_INFO_AUTOMASKED (1 << 2)
Ben Cheng655a7c02013-10-16 16:09:24 -0700109#define VFIO_IRQ_INFO_NORESIZE (1 << 3)
Tao Baod7db5942015-01-28 10:07:51 -0800110 __u32 index;
111 __u32 count;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700112};
Ben Cheng655a7c02013-10-16 16:09:24 -0700113#define VFIO_DEVICE_GET_IRQ_INFO _IO(VFIO_TYPE, VFIO_BASE + 9)
114struct vfio_irq_set {
Tao Baod7db5942015-01-28 10:07:51 -0800115 __u32 argsz;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700116 __u32 flags;
Ben Cheng655a7c02013-10-16 16:09:24 -0700117#define VFIO_IRQ_SET_DATA_NONE (1 << 0)
118#define VFIO_IRQ_SET_DATA_BOOL (1 << 1)
119#define VFIO_IRQ_SET_DATA_EVENTFD (1 << 2)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700120#define VFIO_IRQ_SET_ACTION_MASK (1 << 3)
Ben Cheng655a7c02013-10-16 16:09:24 -0700121#define VFIO_IRQ_SET_ACTION_UNMASK (1 << 4)
122#define VFIO_IRQ_SET_ACTION_TRIGGER (1 << 5)
Tao Baod7db5942015-01-28 10:07:51 -0800123 __u32 index;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700124 __u32 start;
Tao Baod7db5942015-01-28 10:07:51 -0800125 __u32 count;
126 __u8 data[];
Ben Cheng655a7c02013-10-16 16:09:24 -0700127};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700128#define VFIO_DEVICE_SET_IRQS _IO(VFIO_TYPE, VFIO_BASE + 10)
Tao Baod7db5942015-01-28 10:07:51 -0800129#define VFIO_IRQ_SET_DATA_TYPE_MASK (VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_DATA_BOOL | VFIO_IRQ_SET_DATA_EVENTFD)
130#define VFIO_IRQ_SET_ACTION_TYPE_MASK (VFIO_IRQ_SET_ACTION_MASK | VFIO_IRQ_SET_ACTION_UNMASK | VFIO_IRQ_SET_ACTION_TRIGGER)
Ben Cheng655a7c02013-10-16 16:09:24 -0700131#define VFIO_DEVICE_RESET _IO(VFIO_TYPE, VFIO_BASE + 11)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700132enum {
Tao Baod7db5942015-01-28 10:07:51 -0800133 VFIO_PCI_BAR0_REGION_INDEX,
134 VFIO_PCI_BAR1_REGION_INDEX,
135 VFIO_PCI_BAR2_REGION_INDEX,
Christopher Ferris106b3a82016-08-24 12:15:38 -0700136 VFIO_PCI_BAR3_REGION_INDEX,
Tao Baod7db5942015-01-28 10:07:51 -0800137 VFIO_PCI_BAR4_REGION_INDEX,
138 VFIO_PCI_BAR5_REGION_INDEX,
139 VFIO_PCI_ROM_REGION_INDEX,
Tao Baod7db5942015-01-28 10:07:51 -0800140 VFIO_PCI_CONFIG_REGION_INDEX,
141 VFIO_PCI_VGA_REGION_INDEX,
Christopher Ferris106b3a82016-08-24 12:15:38 -0700142 VFIO_PCI_NUM_REGIONS = 9
Ben Cheng655a7c02013-10-16 16:09:24 -0700143};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700144enum {
Tao Baod7db5942015-01-28 10:07:51 -0800145 VFIO_PCI_INTX_IRQ_INDEX,
146 VFIO_PCI_MSI_IRQ_INDEX,
147 VFIO_PCI_MSIX_IRQ_INDEX,
Christopher Ferris106b3a82016-08-24 12:15:38 -0700148 VFIO_PCI_ERR_IRQ_INDEX,
Christopher Ferris05d08e92016-02-04 13:16:38 -0800149 VFIO_PCI_REQ_IRQ_INDEX,
Tao Baod7db5942015-01-28 10:07:51 -0800150 VFIO_PCI_NUM_IRQS
Ben Cheng655a7c02013-10-16 16:09:24 -0700151};
Christopher Ferris525ce912017-07-26 13:12:53 -0700152enum {
153 VFIO_CCW_CONFIG_REGION_INDEX,
154 VFIO_CCW_NUM_REGIONS
155};
156enum {
157 VFIO_CCW_IO_IRQ_INDEX,
158 VFIO_CCW_NUM_IRQS
159};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700160struct vfio_pci_dependent_device {
Tao Baod7db5942015-01-28 10:07:51 -0800161 __u32 group_id;
162 __u16 segment;
163 __u8 bus;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700164 __u8 devfn;
Christopher Ferris38062f92014-07-09 15:33:25 -0700165};
166struct vfio_pci_hot_reset_info {
Tao Baod7db5942015-01-28 10:07:51 -0800167 __u32 argsz;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700168 __u32 flags;
Tao Baod7db5942015-01-28 10:07:51 -0800169 __u32 count;
170 struct vfio_pci_dependent_device devices[];
Christopher Ferris38062f92014-07-09 15:33:25 -0700171};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700172#define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
Christopher Ferris38062f92014-07-09 15:33:25 -0700173struct vfio_pci_hot_reset {
Tao Baod7db5942015-01-28 10:07:51 -0800174 __u32 argsz;
175 __u32 flags;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700176 __u32 count;
Tao Baod7db5942015-01-28 10:07:51 -0800177 __s32 group_fds[];
Christopher Ferris38062f92014-07-09 15:33:25 -0700178};
179#define VFIO_DEVICE_PCI_HOT_RESET _IO(VFIO_TYPE, VFIO_BASE + 13)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700180struct vfio_iommu_type1_info {
Tao Baod7db5942015-01-28 10:07:51 -0800181 __u32 argsz;
182 __u32 flags;
Ben Cheng655a7c02013-10-16 16:09:24 -0700183#define VFIO_IOMMU_INFO_PGSIZES (1 << 0)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700184 __u64 iova_pgsizes;
Christopher Ferris38062f92014-07-09 15:33:25 -0700185};
Ben Cheng655a7c02013-10-16 16:09:24 -0700186#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
187struct vfio_iommu_type1_dma_map {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700188 __u32 argsz;
Tao Baod7db5942015-01-28 10:07:51 -0800189 __u32 flags;
Ben Cheng655a7c02013-10-16 16:09:24 -0700190#define VFIO_DMA_MAP_FLAG_READ (1 << 0)
191#define VFIO_DMA_MAP_FLAG_WRITE (1 << 1)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700192 __u64 vaddr;
Tao Baod7db5942015-01-28 10:07:51 -0800193 __u64 iova;
194 __u64 size;
Ben Cheng655a7c02013-10-16 16:09:24 -0700195};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700196#define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13)
Christopher Ferris38062f92014-07-09 15:33:25 -0700197struct vfio_iommu_type1_dma_unmap {
Tao Baod7db5942015-01-28 10:07:51 -0800198 __u32 argsz;
199 __u32 flags;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700200 __u64 iova;
Tao Baod7db5942015-01-28 10:07:51 -0800201 __u64 size;
Ben Cheng655a7c02013-10-16 16:09:24 -0700202};
203#define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700204#define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15)
Christopher Ferris38062f92014-07-09 15:33:25 -0700205#define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800206struct vfio_iommu_spapr_tce_ddw_info {
207 __u64 pgsizes;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700208 __u32 max_dynamic_windows_supported;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800209 __u32 levels;
210};
Christopher Ferris38062f92014-07-09 15:33:25 -0700211struct vfio_iommu_spapr_tce_info {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700212 __u32 argsz;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800213 __u32 flags;
214#define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0)
Tao Baod7db5942015-01-28 10:07:51 -0800215 __u32 dma32_window_start;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700216 __u32 dma32_window_size;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800217 struct vfio_iommu_spapr_tce_ddw_info ddw;
Christopher Ferris38062f92014-07-09 15:33:25 -0700218};
219#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700220struct vfio_eeh_pe_err {
Christopher Ferris05d08e92016-02-04 13:16:38 -0800221 __u32 type;
222 __u32 func;
223 __u64 addr;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700224 __u64 mask;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800225};
Christopher Ferris82d75042015-01-26 10:57:07 -0800226struct vfio_eeh_pe_op {
Tao Baod7db5942015-01-28 10:07:51 -0800227 __u32 argsz;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700228 __u32 flags;
Tao Baod7db5942015-01-28 10:07:51 -0800229 __u32 op;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800230 union {
231 struct vfio_eeh_pe_err err;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700232 };
Christopher Ferris82d75042015-01-26 10:57:07 -0800233};
234#define VFIO_EEH_PE_DISABLE 0
235#define VFIO_EEH_PE_ENABLE 1
Christopher Ferris106b3a82016-08-24 12:15:38 -0700236#define VFIO_EEH_PE_UNFREEZE_IO 2
Christopher Ferris82d75042015-01-26 10:57:07 -0800237#define VFIO_EEH_PE_UNFREEZE_DMA 3
238#define VFIO_EEH_PE_GET_STATE 4
239#define VFIO_EEH_PE_STATE_NORMAL 0
Christopher Ferris106b3a82016-08-24 12:15:38 -0700240#define VFIO_EEH_PE_STATE_RESET 1
Christopher Ferris82d75042015-01-26 10:57:07 -0800241#define VFIO_EEH_PE_STATE_STOPPED 2
242#define VFIO_EEH_PE_STATE_STOPPED_DMA 4
243#define VFIO_EEH_PE_STATE_UNAVAIL 5
Christopher Ferris106b3a82016-08-24 12:15:38 -0700244#define VFIO_EEH_PE_RESET_DEACTIVATE 5
Christopher Ferris82d75042015-01-26 10:57:07 -0800245#define VFIO_EEH_PE_RESET_HOT 6
246#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7
247#define VFIO_EEH_PE_CONFIGURE 8
Christopher Ferris106b3a82016-08-24 12:15:38 -0700248#define VFIO_EEH_PE_INJECT_ERR 9
Christopher Ferris82d75042015-01-26 10:57:07 -0800249#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800250struct vfio_iommu_spapr_register_memory {
251 __u32 argsz;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700252 __u32 flags;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800253 __u64 vaddr;
254 __u64 size;
255};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700256#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800257#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18)
258struct vfio_iommu_spapr_tce_create {
259 __u32 argsz;
260 __u32 flags;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800261 __u32 page_shift;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700262 __u32 __resv1;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800263 __u64 window_size;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700264 __u32 levels;
265 __u32 __resv2;
266 __u64 start_addr;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800267};
268#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19)
269struct vfio_iommu_spapr_tce_remove {
270 __u32 argsz;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800271 __u32 flags;
272 __u64 start_addr;
273};
274#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20)
Ben Cheng655a7c02013-10-16 16:09:24 -0700275#endif