blob: 2da642016c61fe6c1e8e594594c76c8bf28184b2 [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __OMAP_DRM_H__
20#define __OMAP_DRM_H__
Christopher Ferris106b3a82016-08-24 12:15:38 -070021#include "drm.h"
22#ifdef __cplusplus
Christopher Ferris106b3a82016-08-24 12:15:38 -070023#endif
24#define OMAP_PARAM_CHIPSET_ID 1
Ben Cheng655a7c02013-10-16 16:09:24 -070025struct drm_omap_param {
Tao Baod7db5942015-01-28 10:07:51 -080026 uint64_t param;
27 uint64_t value;
Ben Cheng655a7c02013-10-16 16:09:24 -070028};
Ben Cheng655a7c02013-10-16 16:09:24 -070029#define OMAP_BO_SCANOUT 0x00000001
30#define OMAP_BO_CACHE_MASK 0x00000006
31#define OMAP_BO_TILED_MASK 0x00000f00
32#define OMAP_BO_CACHED 0x00000000
Ben Cheng655a7c02013-10-16 16:09:24 -070033#define OMAP_BO_WC 0x00000002
34#define OMAP_BO_UNCACHED 0x00000004
35#define OMAP_BO_TILED_8 0x00000100
36#define OMAP_BO_TILED_16 0x00000200
Ben Cheng655a7c02013-10-16 16:09:24 -070037#define OMAP_BO_TILED_32 0x00000300
38#define OMAP_BO_TILED (OMAP_BO_TILED_8 | OMAP_BO_TILED_16 | OMAP_BO_TILED_32)
39union omap_gem_size {
Tao Baod7db5942015-01-28 10:07:51 -080040 uint32_t bytes;
Tao Baod7db5942015-01-28 10:07:51 -080041 struct {
42 uint16_t width;
43 uint16_t height;
44 } tiled;
Ben Cheng655a7c02013-10-16 16:09:24 -070045};
46struct drm_omap_gem_new {
Tao Baod7db5942015-01-28 10:07:51 -080047 union omap_gem_size size;
48 uint32_t flags;
Tao Baod7db5942015-01-28 10:07:51 -080049 uint32_t handle;
50 uint32_t __pad;
Ben Cheng655a7c02013-10-16 16:09:24 -070051};
52enum omap_gem_op {
Tao Baod7db5942015-01-28 10:07:51 -080053 OMAP_GEM_READ = 0x01,
54 OMAP_GEM_WRITE = 0x02,
Ben Cheng655a7c02013-10-16 16:09:24 -070055};
56struct drm_omap_gem_cpu_prep {
Tao Baod7db5942015-01-28 10:07:51 -080057 uint32_t handle;
58 uint32_t op;
Ben Cheng655a7c02013-10-16 16:09:24 -070059};
60struct drm_omap_gem_cpu_fini {
Tao Baod7db5942015-01-28 10:07:51 -080061 uint32_t handle;
62 uint32_t op;
63 uint32_t nregions;
64 uint32_t __pad;
Ben Cheng655a7c02013-10-16 16:09:24 -070065};
66struct drm_omap_gem_info {
Tao Baod7db5942015-01-28 10:07:51 -080067 uint32_t handle;
68 uint32_t pad;
Tao Baod7db5942015-01-28 10:07:51 -080069 uint64_t offset;
70 uint32_t size;
71 uint32_t __pad;
Ben Cheng655a7c02013-10-16 16:09:24 -070072};
Ben Cheng655a7c02013-10-16 16:09:24 -070073#define DRM_OMAP_GET_PARAM 0x00
74#define DRM_OMAP_SET_PARAM 0x01
75#define DRM_OMAP_GEM_NEW 0x03
76#define DRM_OMAP_GEM_CPU_PREP 0x04
Ben Cheng655a7c02013-10-16 16:09:24 -070077#define DRM_OMAP_GEM_CPU_FINI 0x05
78#define DRM_OMAP_GEM_INFO 0x06
79#define DRM_OMAP_NUM_IOCTLS 0x07
80#define DRM_IOCTL_OMAP_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)
Tao Baod7db5942015-01-28 10:07:51 -080081#define DRM_IOCTL_OMAP_SET_PARAM DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)
Ben Cheng655a7c02013-10-16 16:09:24 -070082#define DRM_IOCTL_OMAP_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)
Tao Baod7db5942015-01-28 10:07:51 -080083#define DRM_IOCTL_OMAP_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)
84#define DRM_IOCTL_OMAP_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)
Ben Cheng655a7c02013-10-16 16:09:24 -070085#define DRM_IOCTL_OMAP_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info)
Christopher Ferris106b3a82016-08-24 12:15:38 -070086#ifdef __cplusplus
Christopher Ferris106b3a82016-08-24 12:15:38 -070087#endif
Ben Cheng655a7c02013-10-16 16:09:24 -070088#endif