blob: 3c2fc086f2c61172c77a7b552f27f5a14405c44a [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __OMAP_DRM_H__
20#define __OMAP_DRM_H__
Christopher Ferris106b3a82016-08-24 12:15:38 -070021#include "drm.h"
22#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -080023extern "C" {
Christopher Ferris106b3a82016-08-24 12:15:38 -070024#endif
25#define OMAP_PARAM_CHIPSET_ID 1
Ben Cheng655a7c02013-10-16 16:09:24 -070026struct drm_omap_param {
Christopher Ferris525ce912017-07-26 13:12:53 -070027 __u64 param;
28 __u64 value;
Ben Cheng655a7c02013-10-16 16:09:24 -070029};
Ben Cheng655a7c02013-10-16 16:09:24 -070030#define OMAP_BO_SCANOUT 0x00000001
31#define OMAP_BO_CACHE_MASK 0x00000006
32#define OMAP_BO_TILED_MASK 0x00000f00
33#define OMAP_BO_CACHED 0x00000000
Ben Cheng655a7c02013-10-16 16:09:24 -070034#define OMAP_BO_WC 0x00000002
35#define OMAP_BO_UNCACHED 0x00000004
36#define OMAP_BO_TILED_8 0x00000100
37#define OMAP_BO_TILED_16 0x00000200
Ben Cheng655a7c02013-10-16 16:09:24 -070038#define OMAP_BO_TILED_32 0x00000300
39#define OMAP_BO_TILED (OMAP_BO_TILED_8 | OMAP_BO_TILED_16 | OMAP_BO_TILED_32)
40union omap_gem_size {
Christopher Ferris525ce912017-07-26 13:12:53 -070041 __u32 bytes;
Tao Baod7db5942015-01-28 10:07:51 -080042 struct {
Christopher Ferris525ce912017-07-26 13:12:53 -070043 __u16 width;
44 __u16 height;
Tao Baod7db5942015-01-28 10:07:51 -080045 } tiled;
Ben Cheng655a7c02013-10-16 16:09:24 -070046};
47struct drm_omap_gem_new {
Tao Baod7db5942015-01-28 10:07:51 -080048 union omap_gem_size size;
Christopher Ferris525ce912017-07-26 13:12:53 -070049 __u32 flags;
50 __u32 handle;
51 __u32 __pad;
Ben Cheng655a7c02013-10-16 16:09:24 -070052};
53enum omap_gem_op {
Tao Baod7db5942015-01-28 10:07:51 -080054 OMAP_GEM_READ = 0x01,
55 OMAP_GEM_WRITE = 0x02,
Ben Cheng655a7c02013-10-16 16:09:24 -070056};
57struct drm_omap_gem_cpu_prep {
Christopher Ferris525ce912017-07-26 13:12:53 -070058 __u32 handle;
59 __u32 op;
Ben Cheng655a7c02013-10-16 16:09:24 -070060};
61struct drm_omap_gem_cpu_fini {
Christopher Ferris525ce912017-07-26 13:12:53 -070062 __u32 handle;
63 __u32 op;
64 __u32 nregions;
65 __u32 __pad;
Ben Cheng655a7c02013-10-16 16:09:24 -070066};
67struct drm_omap_gem_info {
Christopher Ferris525ce912017-07-26 13:12:53 -070068 __u32 handle;
69 __u32 pad;
70 __u64 offset;
71 __u32 size;
72 __u32 __pad;
Ben Cheng655a7c02013-10-16 16:09:24 -070073};
Ben Cheng655a7c02013-10-16 16:09:24 -070074#define DRM_OMAP_GET_PARAM 0x00
75#define DRM_OMAP_SET_PARAM 0x01
76#define DRM_OMAP_GEM_NEW 0x03
77#define DRM_OMAP_GEM_CPU_PREP 0x04
Ben Cheng655a7c02013-10-16 16:09:24 -070078#define DRM_OMAP_GEM_CPU_FINI 0x05
79#define DRM_OMAP_GEM_INFO 0x06
80#define DRM_OMAP_NUM_IOCTLS 0x07
81#define DRM_IOCTL_OMAP_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)
Tao Baod7db5942015-01-28 10:07:51 -080082#define DRM_IOCTL_OMAP_SET_PARAM DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)
Ben Cheng655a7c02013-10-16 16:09:24 -070083#define DRM_IOCTL_OMAP_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)
Tao Baod7db5942015-01-28 10:07:51 -080084#define DRM_IOCTL_OMAP_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)
85#define DRM_IOCTL_OMAP_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)
Ben Cheng655a7c02013-10-16 16:09:24 -070086#define DRM_IOCTL_OMAP_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info)
Christopher Ferris106b3a82016-08-24 12:15:38 -070087#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -080088}
Christopher Ferris106b3a82016-08-24 12:15:38 -070089#endif
Ben Cheng655a7c02013-10-16 16:09:24 -070090#endif