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Ben Cheng655a7c02013-10-16 16:09:24 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __SAVAGE_DRM_H__
20#define __SAVAGE_DRM_H__
Christopher Ferris106b3a82016-08-24 12:15:38 -070021#include "drm.h"
22#ifdef __cplusplus
Christopher Ferris106b3a82016-08-24 12:15:38 -070023#endif
24#ifndef __SAVAGE_SAREA_DEFINES__
Christopher Ferris05d08e92016-02-04 13:16:38 -080025#define __SAVAGE_SAREA_DEFINES__
Ben Cheng655a7c02013-10-16 16:09:24 -070026#define SAVAGE_CARD_HEAP 0
27#define SAVAGE_AGP_HEAP 1
28#define SAVAGE_NR_TEX_HEAPS 2
Christopher Ferris05d08e92016-02-04 13:16:38 -080029#define SAVAGE_NR_TEX_REGIONS 16
Ben Cheng655a7c02013-10-16 16:09:24 -070030#define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16
31#endif
32typedef struct _drm_savage_sarea {
Christopher Ferris05d08e92016-02-04 13:16:38 -080033 struct drm_tex_region texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS + 1];
Tao Baod7db5942015-01-28 10:07:51 -080034 unsigned int texAge[SAVAGE_NR_TEX_HEAPS];
35 int ctxOwner;
36} drm_savage_sarea_t, * drm_savage_sarea_ptr;
Christopher Ferris05d08e92016-02-04 13:16:38 -080037#define DRM_SAVAGE_BCI_INIT 0x00
Ben Cheng655a7c02013-10-16 16:09:24 -070038#define DRM_SAVAGE_BCI_CMDBUF 0x01
39#define DRM_SAVAGE_BCI_EVENT_EMIT 0x02
40#define DRM_SAVAGE_BCI_EVENT_WAIT 0x03
Christopher Ferris05d08e92016-02-04 13:16:38 -080041#define DRM_IOCTL_SAVAGE_BCI_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t)
Tao Baod7db5942015-01-28 10:07:51 -080042#define DRM_IOCTL_SAVAGE_BCI_CMDBUF DRM_IOW(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t)
Ben Cheng655a7c02013-10-16 16:09:24 -070043#define DRM_IOCTL_SAVAGE_BCI_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t)
Tao Baod7db5942015-01-28 10:07:51 -080044#define DRM_IOCTL_SAVAGE_BCI_EVENT_WAIT DRM_IOW(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t)
Christopher Ferris05d08e92016-02-04 13:16:38 -080045#define SAVAGE_DMA_PCI 1
Ben Cheng655a7c02013-10-16 16:09:24 -070046#define SAVAGE_DMA_AGP 3
47typedef struct drm_savage_init {
Tao Baod7db5942015-01-28 10:07:51 -080048 enum {
Christopher Ferris05d08e92016-02-04 13:16:38 -080049 SAVAGE_INIT_BCI = 1,
Tao Baod7db5942015-01-28 10:07:51 -080050 SAVAGE_CLEANUP_BCI = 2
51 } func;
52 unsigned int sarea_priv_offset;
Christopher Ferris05d08e92016-02-04 13:16:38 -080053 unsigned int cob_size;
Tao Baod7db5942015-01-28 10:07:51 -080054 unsigned int bci_threshold_lo, bci_threshold_hi;
55 unsigned int dma_type;
56 unsigned int fb_bpp;
Christopher Ferris05d08e92016-02-04 13:16:38 -080057 unsigned int front_offset, front_pitch;
Tao Baod7db5942015-01-28 10:07:51 -080058 unsigned int back_offset, back_pitch;
59 unsigned int depth_bpp;
60 unsigned int depth_offset, depth_pitch;
Christopher Ferris05d08e92016-02-04 13:16:38 -080061 unsigned int texture_offset;
Tao Baod7db5942015-01-28 10:07:51 -080062 unsigned int texture_size;
63 unsigned long status_offset;
64 unsigned long buffers_offset;
Christopher Ferris05d08e92016-02-04 13:16:38 -080065 unsigned long agp_textures_offset;
Tao Baod7db5942015-01-28 10:07:51 -080066 unsigned long cmd_dma_offset;
Ben Cheng655a7c02013-10-16 16:09:24 -070067} drm_savage_init_t;
68typedef union drm_savage_cmd_header drm_savage_cmd_header_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -080069typedef struct drm_savage_cmdbuf {
Tao Baod7db5942015-01-28 10:07:51 -080070 drm_savage_cmd_header_t __user * cmd_addr;
71 unsigned int size;
72 unsigned int dma_idx;
Christopher Ferris05d08e92016-02-04 13:16:38 -080073 int discard;
Tao Baod7db5942015-01-28 10:07:51 -080074 unsigned int __user * vb_addr;
75 unsigned int vb_size;
76 unsigned int vb_stride;
Christopher Ferris05d08e92016-02-04 13:16:38 -080077 struct drm_clip_rect __user * box_addr;
Tao Baod7db5942015-01-28 10:07:51 -080078 unsigned int nbox;
Ben Cheng655a7c02013-10-16 16:09:24 -070079} drm_savage_cmdbuf_t;
80#define SAVAGE_WAIT_2D 0x1
Christopher Ferris05d08e92016-02-04 13:16:38 -080081#define SAVAGE_WAIT_3D 0x2
Ben Cheng655a7c02013-10-16 16:09:24 -070082#define SAVAGE_WAIT_IRQ 0x4
83typedef struct drm_savage_event {
Tao Baod7db5942015-01-28 10:07:51 -080084 unsigned int count;
Christopher Ferris05d08e92016-02-04 13:16:38 -080085 unsigned int flags;
Ben Cheng655a7c02013-10-16 16:09:24 -070086} drm_savage_event_emit_t, drm_savage_event_wait_t;
87#define SAVAGE_CMD_STATE 0
88#define SAVAGE_CMD_DMA_PRIM 1
Christopher Ferris05d08e92016-02-04 13:16:38 -080089#define SAVAGE_CMD_VB_PRIM 2
Ben Cheng655a7c02013-10-16 16:09:24 -070090#define SAVAGE_CMD_DMA_IDX 3
91#define SAVAGE_CMD_VB_IDX 4
92#define SAVAGE_CMD_CLEAR 5
Christopher Ferris05d08e92016-02-04 13:16:38 -080093#define SAVAGE_CMD_SWAP 6
Ben Cheng655a7c02013-10-16 16:09:24 -070094#define SAVAGE_PRIM_TRILIST 0
95#define SAVAGE_PRIM_TRISTRIP 1
96#define SAVAGE_PRIM_TRIFAN 2
Christopher Ferris05d08e92016-02-04 13:16:38 -080097#define SAVAGE_PRIM_TRILIST_201 3
Ben Cheng655a7c02013-10-16 16:09:24 -070098#define SAVAGE_SKIP_Z 0x01
99#define SAVAGE_SKIP_W 0x02
100#define SAVAGE_SKIP_C0 0x04
Christopher Ferris05d08e92016-02-04 13:16:38 -0800101#define SAVAGE_SKIP_C1 0x08
Ben Cheng655a7c02013-10-16 16:09:24 -0700102#define SAVAGE_SKIP_S0 0x10
103#define SAVAGE_SKIP_T0 0x20
104#define SAVAGE_SKIP_ST0 0x30
Christopher Ferris05d08e92016-02-04 13:16:38 -0800105#define SAVAGE_SKIP_S1 0x40
Ben Cheng655a7c02013-10-16 16:09:24 -0700106#define SAVAGE_SKIP_T1 0x80
107#define SAVAGE_SKIP_ST1 0xc0
108#define SAVAGE_SKIP_ALL_S3D 0x3f
Christopher Ferris05d08e92016-02-04 13:16:38 -0800109#define SAVAGE_SKIP_ALL_S4 0xff
Ben Cheng655a7c02013-10-16 16:09:24 -0700110#define SAVAGE_FRONT 0x1
111#define SAVAGE_BACK 0x2
112#define SAVAGE_DEPTH 0x4
Christopher Ferris05d08e92016-02-04 13:16:38 -0800113union drm_savage_cmd_header {
Tao Baod7db5942015-01-28 10:07:51 -0800114 struct {
115 unsigned char cmd;
116 unsigned char pad0;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800117 unsigned short pad1;
Tao Baod7db5942015-01-28 10:07:51 -0800118 unsigned short pad2;
119 unsigned short pad3;
120 } cmd;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800121 struct {
Tao Baod7db5942015-01-28 10:07:51 -0800122 unsigned char cmd;
123 unsigned char global;
124 unsigned short count;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800125 unsigned short start;
Tao Baod7db5942015-01-28 10:07:51 -0800126 unsigned short pad3;
127 } state;
128 struct {
Christopher Ferris05d08e92016-02-04 13:16:38 -0800129 unsigned char cmd;
Tao Baod7db5942015-01-28 10:07:51 -0800130 unsigned char prim;
131 unsigned short skip;
132 unsigned short count;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800133 unsigned short start;
Tao Baod7db5942015-01-28 10:07:51 -0800134 } prim;
135 struct {
136 unsigned char cmd;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800137 unsigned char prim;
Tao Baod7db5942015-01-28 10:07:51 -0800138 unsigned short skip;
139 unsigned short count;
140 unsigned short pad3;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800141 } idx;
Tao Baod7db5942015-01-28 10:07:51 -0800142 struct {
143 unsigned char cmd;
144 unsigned char pad0;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800145 unsigned short pad1;
Tao Baod7db5942015-01-28 10:07:51 -0800146 unsigned int flags;
147 } clear0;
148 struct {
Christopher Ferris05d08e92016-02-04 13:16:38 -0800149 unsigned int mask;
Tao Baod7db5942015-01-28 10:07:51 -0800150 unsigned int value;
151 } clear1;
Ben Cheng655a7c02013-10-16 16:09:24 -0700152};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700153#ifdef __cplusplus
154#endif
Christopher Ferris05d08e92016-02-04 13:16:38 -0800155#endif