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Christopher Ferris106b3a82016-08-24 12:15:38 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPI_VC4_DRM_H_
20#define _UAPI_VC4_DRM_H_
21#include "drm.h"
22#ifdef __cplusplus
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#endif
25#define DRM_VC4_SUBMIT_CL 0x00
26#define DRM_VC4_WAIT_SEQNO 0x01
27#define DRM_VC4_WAIT_BO 0x02
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define DRM_VC4_CREATE_BO 0x03
30#define DRM_VC4_MMAP_BO 0x04
31#define DRM_VC4_CREATE_SHADER_BO 0x05
32#define DRM_VC4_GET_HANG_STATE 0x06
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris49f525c2016-12-12 14:55:36 -080034#define DRM_VC4_GET_PARAM 0x07
Christopher Ferris106b3a82016-08-24 12:15:38 -070035#define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl)
36#define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno)
37#define DRM_IOCTL_VC4_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_BO, struct drm_vc4_wait_bo)
Christopher Ferris106b3a82016-08-24 12:15:38 -070038/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris49f525c2016-12-12 14:55:36 -080039#define DRM_IOCTL_VC4_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_CREATE_BO, struct drm_vc4_create_bo)
Christopher Ferris106b3a82016-08-24 12:15:38 -070040#define DRM_IOCTL_VC4_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_MMAP_BO, struct drm_vc4_mmap_bo)
41#define DRM_IOCTL_VC4_CREATE_SHADER_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_CREATE_SHADER_BO, struct drm_vc4_create_shader_bo)
42#define DRM_IOCTL_VC4_GET_HANG_STATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_HANG_STATE, struct drm_vc4_get_hang_state)
Christopher Ferris106b3a82016-08-24 12:15:38 -070043/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris49f525c2016-12-12 14:55:36 -080044#define DRM_IOCTL_VC4_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_PARAM, struct drm_vc4_get_param)
45struct drm_vc4_submit_rcl_surface {
Christopher Ferris106b3a82016-08-24 12:15:38 -070046 __u32 hindex;
47 __u32 offset;
Christopher Ferris49f525c2016-12-12 14:55:36 -080048/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070049 __u16 bits;
50#define VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES (1 << 0)
Christopher Ferris106b3a82016-08-24 12:15:38 -070051 __u16 flags;
52};
Christopher Ferris49f525c2016-12-12 14:55:36 -080053/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070054struct drm_vc4_submit_cl {
55 __u64 bin_cl;
Christopher Ferris106b3a82016-08-24 12:15:38 -070056 __u64 shader_rec;
57 __u64 uniforms;
Christopher Ferris49f525c2016-12-12 14:55:36 -080058/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070059 __u64 bo_handles;
60 __u32 bin_cl_size;
Christopher Ferris106b3a82016-08-24 12:15:38 -070061 __u32 shader_rec_size;
62 __u32 shader_rec_count;
Christopher Ferris49f525c2016-12-12 14:55:36 -080063/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070064 __u32 uniforms_size;
65 __u32 bo_handle_count;
Christopher Ferris106b3a82016-08-24 12:15:38 -070066 __u16 width;
67 __u16 height;
Christopher Ferris49f525c2016-12-12 14:55:36 -080068/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070069 __u8 min_x_tile;
70 __u8 min_y_tile;
Christopher Ferris106b3a82016-08-24 12:15:38 -070071 __u8 max_x_tile;
72 __u8 max_y_tile;
Christopher Ferris49f525c2016-12-12 14:55:36 -080073/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070074 struct drm_vc4_submit_rcl_surface color_read;
75 struct drm_vc4_submit_rcl_surface color_write;
Christopher Ferris106b3a82016-08-24 12:15:38 -070076 struct drm_vc4_submit_rcl_surface zs_read;
77 struct drm_vc4_submit_rcl_surface zs_write;
Christopher Ferris49f525c2016-12-12 14:55:36 -080078/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070079 struct drm_vc4_submit_rcl_surface msaa_color_write;
80 struct drm_vc4_submit_rcl_surface msaa_zs_write;
Christopher Ferris106b3a82016-08-24 12:15:38 -070081 __u32 clear_color[2];
82 __u32 clear_z;
Christopher Ferris49f525c2016-12-12 14:55:36 -080083/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070084 __u8 clear_s;
85 __u32 pad : 24;
Christopher Ferris106b3a82016-08-24 12:15:38 -070086#define VC4_SUBMIT_CL_USE_CLEAR_COLOR (1 << 0)
87 __u32 flags;
Christopher Ferris49f525c2016-12-12 14:55:36 -080088/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070089 __u64 seqno;
90};
Christopher Ferris106b3a82016-08-24 12:15:38 -070091struct drm_vc4_wait_seqno {
92 __u64 seqno;
Christopher Ferris49f525c2016-12-12 14:55:36 -080093/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070094 __u64 timeout_ns;
95};
Christopher Ferris106b3a82016-08-24 12:15:38 -070096struct drm_vc4_wait_bo {
97 __u32 handle;
Christopher Ferris49f525c2016-12-12 14:55:36 -080098/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070099 __u32 pad;
100 __u64 timeout_ns;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700101};
102struct drm_vc4_create_bo {
Christopher Ferris49f525c2016-12-12 14:55:36 -0800103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -0700104 __u32 size;
105 __u32 flags;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700106 __u32 handle;
107 __u32 pad;
Christopher Ferris49f525c2016-12-12 14:55:36 -0800108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -0700109};
110struct drm_vc4_mmap_bo {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700111 __u32 handle;
112 __u32 flags;
Christopher Ferris49f525c2016-12-12 14:55:36 -0800113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -0700114 __u64 offset;
115};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700116struct drm_vc4_create_shader_bo {
117 __u32 size;
Christopher Ferris49f525c2016-12-12 14:55:36 -0800118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -0700119 __u32 flags;
120 __u64 data;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700121 __u32 handle;
122 __u32 pad;
Christopher Ferris49f525c2016-12-12 14:55:36 -0800123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -0700124};
125struct drm_vc4_get_hang_state_bo {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700126 __u32 handle;
127 __u32 paddr;
Christopher Ferris49f525c2016-12-12 14:55:36 -0800128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -0700129 __u32 size;
130 __u32 pad;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700131};
132struct drm_vc4_get_hang_state {
Christopher Ferris49f525c2016-12-12 14:55:36 -0800133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -0700134 __u64 bo;
135 __u32 bo_count;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700136 __u32 start_bin, start_render;
137 __u32 ct0ca, ct0ea;
Christopher Ferris49f525c2016-12-12 14:55:36 -0800138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -0700139 __u32 ct1ca, ct1ea;
140 __u32 ct0cs, ct1cs;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700141 __u32 ct0ra0, ct1ra0;
142 __u32 bpca, bpcs;
Christopher Ferris49f525c2016-12-12 14:55:36 -0800143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -0700144 __u32 bpoa, bpos;
145 __u32 vpmbase;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700146 __u32 dbge;
147 __u32 fdbgo;
Christopher Ferris49f525c2016-12-12 14:55:36 -0800148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -0700149 __u32 fdbgb;
150 __u32 fdbgr;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700151 __u32 fdbgs;
152 __u32 errstat;
Christopher Ferris49f525c2016-12-12 14:55:36 -0800153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -0700154 __u32 pad[16];
155};
Christopher Ferris49f525c2016-12-12 14:55:36 -0800156#define DRM_VC4_PARAM_V3D_IDENT0 0
157#define DRM_VC4_PARAM_V3D_IDENT1 1
Christopher Ferris106b3a82016-08-24 12:15:38 -0700158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris49f525c2016-12-12 14:55:36 -0800159#define DRM_VC4_PARAM_V3D_IDENT2 2
160#define DRM_VC4_PARAM_SUPPORTS_BRANCHES 3
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800161#define DRM_VC4_PARAM_SUPPORTS_ETC1 4
162#define DRM_VC4_PARAM_SUPPORTS_THREADED_FS 5
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris49f525c2016-12-12 14:55:36 -0800164struct drm_vc4_get_param {
165 __u32 param;
Christopher Ferris49f525c2016-12-12 14:55:36 -0800166 __u32 pad;
167 __u64 value;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris49f525c2016-12-12 14:55:36 -0800169};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700170#ifdef __cplusplus
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800171#endif
172#endif
Christopher Ferris49f525c2016-12-12 14:55:36 -0800173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */