| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef _UAPI__LINUX_MDIO_H__ |
| 20 | #define _UAPI__LINUX_MDIO_H__ |
| 21 | #include <linux/types.h> |
| 22 | #include <linux/mii.h> |
| 23 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 24 | #define MDIO_MMD_PMAPMD 1 |
| 25 | #define MDIO_MMD_WIS 2 |
| 26 | #define MDIO_MMD_PCS 3 |
| 27 | #define MDIO_MMD_PHYXS 4 |
| 28 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 29 | #define MDIO_MMD_DTEXS 5 |
| 30 | #define MDIO_MMD_TC 6 |
| 31 | #define MDIO_MMD_AN 7 |
| 32 | #define MDIO_MMD_C22EXT 29 |
| 33 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 34 | #define MDIO_MMD_VEND1 30 |
| 35 | #define MDIO_MMD_VEND2 31 |
| 36 | #define MDIO_CTRL1 MII_BMCR |
| 37 | #define MDIO_STAT1 MII_BMSR |
| 38 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 39 | #define MDIO_DEVID1 MII_PHYSID1 |
| 40 | #define MDIO_DEVID2 MII_PHYSID2 |
| 41 | #define MDIO_SPEED 4 |
| 42 | #define MDIO_DEVS1 5 |
| 43 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 44 | #define MDIO_DEVS2 6 |
| 45 | #define MDIO_CTRL2 7 |
| 46 | #define MDIO_STAT2 8 |
| 47 | #define MDIO_PMA_TXDIS 9 |
| 48 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 49 | #define MDIO_PMA_RXDET 10 |
| 50 | #define MDIO_PMA_EXTABLE 11 |
| 51 | #define MDIO_PKGID1 14 |
| 52 | #define MDIO_PKGID2 15 |
| 53 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 54 | #define MDIO_AN_ADVERTISE 16 |
| 55 | #define MDIO_AN_LPA 19 |
| 56 | #define MDIO_PCS_EEE_ABLE 20 |
| 57 | #define MDIO_PCS_EEE_WK_ERR 22 |
| 58 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 59 | #define MDIO_PHYXS_LNSTAT 24 |
| 60 | #define MDIO_AN_EEE_ADV 60 |
| 61 | #define MDIO_AN_EEE_LPABLE 61 |
| 62 | #define MDIO_PMA_10GBT_SWAPPOL 130 |
| 63 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 64 | #define MDIO_PMA_10GBT_TXPWR 131 |
| 65 | #define MDIO_PMA_10GBT_SNR 133 |
| 66 | #define MDIO_PMA_10GBR_FECABLE 170 |
| 67 | #define MDIO_PCS_10GBX_STAT1 24 |
| 68 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 69 | #define MDIO_PCS_10GBRT_STAT1 32 |
| 70 | #define MDIO_PCS_10GBRT_STAT2 33 |
| 71 | #define MDIO_AN_10GBT_CTRL 32 |
| 72 | #define MDIO_AN_10GBT_STAT 33 |
| 73 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 74 | #define MDIO_PMA_LASI_RXCTRL 0x9000 |
| 75 | #define MDIO_PMA_LASI_TXCTRL 0x9001 |
| 76 | #define MDIO_PMA_LASI_CTRL 0x9002 |
| 77 | #define MDIO_PMA_LASI_RXSTAT 0x9003 |
| 78 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 79 | #define MDIO_PMA_LASI_TXSTAT 0x9004 |
| 80 | #define MDIO_PMA_LASI_STAT 0x9005 |
| 81 | #define MDIO_CTRL1_SPEEDSELEXT (BMCR_SPEED1000 | BMCR_SPEED100) |
| 82 | #define MDIO_CTRL1_SPEEDSEL (MDIO_CTRL1_SPEEDSELEXT | 0x003c) |
| 83 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 84 | #define MDIO_CTRL1_FULLDPLX BMCR_FULLDPLX |
| 85 | #define MDIO_CTRL1_LPOWER BMCR_PDOWN |
| 86 | #define MDIO_CTRL1_RESET BMCR_RESET |
| 87 | #define MDIO_PMA_CTRL1_LOOPBACK 0x0001 |
| 88 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 89 | #define MDIO_PMA_CTRL1_SPEED1000 BMCR_SPEED1000 |
| 90 | #define MDIO_PMA_CTRL1_SPEED100 BMCR_SPEED100 |
| 91 | #define MDIO_PCS_CTRL1_LOOPBACK BMCR_LOOPBACK |
| 92 | #define MDIO_PHYXS_CTRL1_LOOPBACK BMCR_LOOPBACK |
| 93 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 94 | #define MDIO_AN_CTRL1_RESTART BMCR_ANRESTART |
| 95 | #define MDIO_AN_CTRL1_ENABLE BMCR_ANENABLE |
| 96 | #define MDIO_AN_CTRL1_XNP 0x2000 |
| 97 | #define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400 |
| 98 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 99 | #define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00) |
| 100 | #define MDIO_CTRL1_SPEED10P2B (MDIO_CTRL1_SPEEDSELEXT | 0x04) |
| 101 | #define MDIO_STAT1_LPOWERABLE 0x0002 |
| 102 | #define MDIO_STAT1_LSTATUS BMSR_LSTATUS |
| 103 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 104 | #define MDIO_STAT1_FAULT 0x0080 |
| 105 | #define MDIO_AN_STAT1_LPABLE 0x0001 |
| 106 | #define MDIO_AN_STAT1_ABLE BMSR_ANEGCAPABLE |
| 107 | #define MDIO_AN_STAT1_RFAULT BMSR_RFAULT |
| 108 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 109 | #define MDIO_AN_STAT1_COMPLETE BMSR_ANEGCOMPLETE |
| 110 | #define MDIO_AN_STAT1_PAGE 0x0040 |
| 111 | #define MDIO_AN_STAT1_XNP 0x0080 |
| 112 | #define MDIO_SPEED_10G 0x0001 |
| 113 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 114 | #define MDIO_PMA_SPEED_2B 0x0002 |
| 115 | #define MDIO_PMA_SPEED_10P 0x0004 |
| 116 | #define MDIO_PMA_SPEED_1000 0x0010 |
| 117 | #define MDIO_PMA_SPEED_100 0x0020 |
| 118 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 119 | #define MDIO_PMA_SPEED_10 0x0040 |
| 120 | #define MDIO_PCS_SPEED_10P2B 0x0002 |
| 121 | #define MDIO_DEVS_PRESENT(devad) (1 << (devad)) |
| 122 | #define MDIO_DEVS_PMAPMD MDIO_DEVS_PRESENT(MDIO_MMD_PMAPMD) |
| 123 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 124 | #define MDIO_DEVS_WIS MDIO_DEVS_PRESENT(MDIO_MMD_WIS) |
| 125 | #define MDIO_DEVS_PCS MDIO_DEVS_PRESENT(MDIO_MMD_PCS) |
| 126 | #define MDIO_DEVS_PHYXS MDIO_DEVS_PRESENT(MDIO_MMD_PHYXS) |
| 127 | #define MDIO_DEVS_DTEXS MDIO_DEVS_PRESENT(MDIO_MMD_DTEXS) |
| 128 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 129 | #define MDIO_DEVS_TC MDIO_DEVS_PRESENT(MDIO_MMD_TC) |
| 130 | #define MDIO_DEVS_AN MDIO_DEVS_PRESENT(MDIO_MMD_AN) |
| 131 | #define MDIO_DEVS_C22EXT MDIO_DEVS_PRESENT(MDIO_MMD_C22EXT) |
| 132 | #define MDIO_PMA_CTRL2_TYPE 0x000f |
| 133 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 134 | #define MDIO_PMA_CTRL2_10GBCX4 0x0000 |
| 135 | #define MDIO_PMA_CTRL2_10GBEW 0x0001 |
| 136 | #define MDIO_PMA_CTRL2_10GBLW 0x0002 |
| 137 | #define MDIO_PMA_CTRL2_10GBSW 0x0003 |
| 138 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 139 | #define MDIO_PMA_CTRL2_10GBLX4 0x0004 |
| 140 | #define MDIO_PMA_CTRL2_10GBER 0x0005 |
| 141 | #define MDIO_PMA_CTRL2_10GBLR 0x0006 |
| 142 | #define MDIO_PMA_CTRL2_10GBSR 0x0007 |
| 143 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 144 | #define MDIO_PMA_CTRL2_10GBLRM 0x0008 |
| 145 | #define MDIO_PMA_CTRL2_10GBT 0x0009 |
| 146 | #define MDIO_PMA_CTRL2_10GBKX4 0x000a |
| 147 | #define MDIO_PMA_CTRL2_10GBKR 0x000b |
| 148 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 149 | #define MDIO_PMA_CTRL2_1000BT 0x000c |
| 150 | #define MDIO_PMA_CTRL2_1000BKX 0x000d |
| 151 | #define MDIO_PMA_CTRL2_100BTX 0x000e |
| 152 | #define MDIO_PMA_CTRL2_10BT 0x000f |
| 153 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 154 | #define MDIO_PCS_CTRL2_TYPE 0x0003 |
| 155 | #define MDIO_PCS_CTRL2_10GBR 0x0000 |
| 156 | #define MDIO_PCS_CTRL2_10GBX 0x0001 |
| 157 | #define MDIO_PCS_CTRL2_10GBW 0x0002 |
| 158 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 159 | #define MDIO_PCS_CTRL2_10GBT 0x0003 |
| 160 | #define MDIO_STAT2_RXFAULT 0x0400 |
| 161 | #define MDIO_STAT2_TXFAULT 0x0800 |
| 162 | #define MDIO_STAT2_DEVPRST 0xc000 |
| 163 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 164 | #define MDIO_STAT2_DEVPRST_VAL 0x8000 |
| 165 | #define MDIO_PMA_STAT2_LBABLE 0x0001 |
| 166 | #define MDIO_PMA_STAT2_10GBEW 0x0002 |
| 167 | #define MDIO_PMA_STAT2_10GBLW 0x0004 |
| 168 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 169 | #define MDIO_PMA_STAT2_10GBSW 0x0008 |
| 170 | #define MDIO_PMA_STAT2_10GBLX4 0x0010 |
| 171 | #define MDIO_PMA_STAT2_10GBER 0x0020 |
| 172 | #define MDIO_PMA_STAT2_10GBLR 0x0040 |
| 173 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 174 | #define MDIO_PMA_STAT2_10GBSR 0x0080 |
| 175 | #define MDIO_PMD_STAT2_TXDISAB 0x0100 |
| 176 | #define MDIO_PMA_STAT2_EXTABLE 0x0200 |
| 177 | #define MDIO_PMA_STAT2_RXFLTABLE 0x1000 |
| 178 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 179 | #define MDIO_PMA_STAT2_TXFLTABLE 0x2000 |
| 180 | #define MDIO_PCS_STAT2_10GBR 0x0001 |
| 181 | #define MDIO_PCS_STAT2_10GBX 0x0002 |
| 182 | #define MDIO_PCS_STAT2_10GBW 0x0004 |
| 183 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 184 | #define MDIO_PCS_STAT2_RXFLTABLE 0x1000 |
| 185 | #define MDIO_PCS_STAT2_TXFLTABLE 0x2000 |
| 186 | #define MDIO_PMD_TXDIS_GLOBAL 0x0001 |
| 187 | #define MDIO_PMD_TXDIS_0 0x0002 |
| 188 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 189 | #define MDIO_PMD_TXDIS_1 0x0004 |
| 190 | #define MDIO_PMD_TXDIS_2 0x0008 |
| 191 | #define MDIO_PMD_TXDIS_3 0x0010 |
| 192 | #define MDIO_PMD_RXDET_GLOBAL 0x0001 |
| 193 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 194 | #define MDIO_PMD_RXDET_0 0x0002 |
| 195 | #define MDIO_PMD_RXDET_1 0x0004 |
| 196 | #define MDIO_PMD_RXDET_2 0x0008 |
| 197 | #define MDIO_PMD_RXDET_3 0x0010 |
| 198 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 199 | #define MDIO_PMA_EXTABLE_10GCX4 0x0001 |
| 200 | #define MDIO_PMA_EXTABLE_10GBLRM 0x0002 |
| 201 | #define MDIO_PMA_EXTABLE_10GBT 0x0004 |
| 202 | #define MDIO_PMA_EXTABLE_10GBKX4 0x0008 |
| 203 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 204 | #define MDIO_PMA_EXTABLE_10GBKR 0x0010 |
| 205 | #define MDIO_PMA_EXTABLE_1000BT 0x0020 |
| 206 | #define MDIO_PMA_EXTABLE_1000BKX 0x0040 |
| 207 | #define MDIO_PMA_EXTABLE_100BTX 0x0080 |
| 208 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 209 | #define MDIO_PMA_EXTABLE_10BT 0x0100 |
| 210 | #define MDIO_PHYXS_LNSTAT_SYNC0 0x0001 |
| 211 | #define MDIO_PHYXS_LNSTAT_SYNC1 0x0002 |
| 212 | #define MDIO_PHYXS_LNSTAT_SYNC2 0x0004 |
| 213 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 214 | #define MDIO_PHYXS_LNSTAT_SYNC3 0x0008 |
| 215 | #define MDIO_PHYXS_LNSTAT_ALIGN 0x1000 |
| 216 | #define MDIO_PMA_10GBT_SWAPPOL_ABNX 0x0001 |
| 217 | #define MDIO_PMA_10GBT_SWAPPOL_CDNX 0x0002 |
| 218 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 219 | #define MDIO_PMA_10GBT_SWAPPOL_AREV 0x0100 |
| 220 | #define MDIO_PMA_10GBT_SWAPPOL_BREV 0x0200 |
| 221 | #define MDIO_PMA_10GBT_SWAPPOL_CREV 0x0400 |
| 222 | #define MDIO_PMA_10GBT_SWAPPOL_DREV 0x0800 |
| 223 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 224 | #define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001 |
| 225 | #define MDIO_PMA_10GBT_SNR_BIAS 0x8000 |
| 226 | #define MDIO_PMA_10GBT_SNR_MAX 127 |
| 227 | #define MDIO_PMA_10GBR_FECABLE_ABLE 0x0001 |
| 228 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 229 | #define MDIO_PMA_10GBR_FECABLE_ERRABLE 0x0002 |
| 230 | #define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001 |
| 231 | #define MDIO_PCS_10GBRT_STAT2_ERR 0x00ff |
| 232 | #define MDIO_PCS_10GBRT_STAT2_BER 0x3f00 |
| 233 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 234 | #define MDIO_AN_10GBT_CTRL_ADV10G 0x1000 |
| 235 | #define MDIO_AN_10GBT_STAT_LPTRR 0x0200 |
| 236 | #define MDIO_AN_10GBT_STAT_LPLTABLE 0x0400 |
| 237 | #define MDIO_AN_10GBT_STAT_LP10G 0x0800 |
| 238 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 239 | #define MDIO_AN_10GBT_STAT_REMOK 0x1000 |
| 240 | #define MDIO_AN_10GBT_STAT_LOCOK 0x2000 |
| 241 | #define MDIO_AN_10GBT_STAT_MS 0x4000 |
| 242 | #define MDIO_AN_10GBT_STAT_MSFLT 0x8000 |
| 243 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 244 | #define MDIO_AN_EEE_ADV_100TX 0x0002 |
| 245 | #define MDIO_AN_EEE_ADV_1000T 0x0004 |
| 246 | #define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX |
| 247 | #define MDIO_EEE_1000T MDIO_AN_EEE_ADV_1000T |
| 248 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 249 | #define MDIO_EEE_10GT 0x0008 |
| 250 | #define MDIO_EEE_1000KX 0x0010 |
| 251 | #define MDIO_EEE_10GKX4 0x0020 |
| 252 | #define MDIO_EEE_10GKR 0x0040 |
| 253 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 254 | #define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001 |
| 255 | #define MDIO_PMA_LASI_RX_PCSLFLT 0x0008 |
| 256 | #define MDIO_PMA_LASI_RX_PMALFLT 0x0010 |
| 257 | #define MDIO_PMA_LASI_RX_OPTICPOWERFLT 0x0020 |
| 258 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 259 | #define MDIO_PMA_LASI_RX_WISLFLT 0x0200 |
| 260 | #define MDIO_PMA_LASI_TX_PHYXSLFLT 0x0001 |
| 261 | #define MDIO_PMA_LASI_TX_PCSLFLT 0x0008 |
| 262 | #define MDIO_PMA_LASI_TX_PMALFLT 0x0010 |
| 263 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 264 | #define MDIO_PMA_LASI_TX_LASERPOWERFLT 0x0080 |
| 265 | #define MDIO_PMA_LASI_TX_LASERTEMPFLT 0x0100 |
| 266 | #define MDIO_PMA_LASI_TX_LASERBICURRFLT 0x0200 |
| 267 | #define MDIO_PMA_LASI_LSALARM 0x0001 |
| 268 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 269 | #define MDIO_PMA_LASI_TXALARM 0x0002 |
| 270 | #define MDIO_PMA_LASI_RXALARM 0x0004 |
| 271 | #define MDIO_PHY_ID_C45 0x8000 |
| 272 | #define MDIO_PHY_ID_PRTAD 0x03e0 |
| 273 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 274 | #define MDIO_PHY_ID_DEVAD 0x001f |
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 275 | #define MDIO_PHY_ID_C45_MASK (MDIO_PHY_ID_C45 | MDIO_PHY_ID_PRTAD | MDIO_PHY_ID_DEVAD) |
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 276 | #endif |