blob: dc83088b23a057b664bc873ae7bea36b5ab4e116 [file] [log] [blame]
Raghu Gandham405b8022012-07-25 18:16:42 -07001/* $OpenBSD: asm.h,v 1.7 2004/10/20 12:49:15 pefo Exp $ */
2
3/*
4 * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
16 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
19 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28#ifndef _MIPS64_ASM_H
29#define _MIPS64_ASM_H
30
Dimitry Ivanove6ee9602016-10-27 02:32:47 -070031#define __bionic_asm_align 16
Raghu Gandham405b8022012-07-25 18:16:42 -070032
Elliott Hughes851e68a2014-02-19 16:53:20 -080033#undef __bionic_asm_custom_entry
34#undef __bionic_asm_custom_end
35#define __bionic_asm_custom_entry(f) .ent f
36#define __bionic_asm_custom_end(f) .end f
37
38#include <machine/regdef.h>
39
Raghu Gandham405b8022012-07-25 18:16:42 -070040#define _MIPS_ISA_MIPS1 1 /* R2000/R3000 */
41#define _MIPS_ISA_MIPS2 2 /* R4000/R6000 */
42#define _MIPS_ISA_MIPS3 3 /* R4000 */
43#define _MIPS_ISA_MIPS4 4 /* TFP (R1x000) */
Raghu Gandham405b8022012-07-25 18:16:42 -070044#define _MIPS_ISA_MIPS5 5
45#define _MIPS_ISA_MIPS32 6
46#define _MIPS_ISA_MIPS64 7
Raghu Gandham405b8022012-07-25 18:16:42 -070047
48#if !defined(ABICALLS) && !defined(_NO_ABICALLS)
49#define ABICALLS .abicalls
50#endif
51
52#if defined(ABICALLS) && !defined(_KERNEL)
53 ABICALLS
54#endif
55
Raghu Gandham405b8022012-07-25 18:16:42 -070056/*
57 * Define how to access unaligned data word
58 */
Raghu Gandham405b8022012-07-25 18:16:42 -070059#define LWLO lwl
60#define LWHI lwr
61#define SWLO swl
62#define SWHI swr
63#define LDLO ldl
64#define LDHI ldr
65#define SDLO sdl
66#define SDHI sdr
Raghu Gandham405b8022012-07-25 18:16:42 -070067
68/*
69 * Define programming environment for ABI.
70 */
71#if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE)
72
Raghu Gandham405b8022012-07-25 18:16:42 -070073#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
74#define NARGSAVE 4
75
76#define SETUP_GP \
77 .set noreorder; \
78 .cpload t9; \
79 .set reorder;
80
81#define SAVE_GP(x) \
82 .cprestore x
83
84#define SETUP_GP64(gpoff, name)
85#define RESTORE_GP64
86#endif
87
88#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
89#define NARGSAVE 0
90
91#define SETUP_GP
92#define SAVE_GP(x)
93#define SETUP_GP64(gpoff, name) \
94 .cpsetup t9, gpoff, name
95#define RESTORE_GP64 \
96 .cpreturn
97#endif
98
99#define MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31))
100
101#else /* defined(ABICALLS) && !defined(_KERNEL) */
102
103#define NARGSAVE 4
104#define SETUP_GP
105#define SAVE_GP(x)
106
107#define ALIGNSZ 16 /* Stack layout alignment */
108#define FRAMESZ(sz) (((sz) + (ALIGNSZ-1)) & ~(ALIGNSZ-1))
109
110#endif
111
112/*
113 * Basic register operations based on selected ISA
114 */
115#if (_MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS32)
116#define REGSZ 4 /* 32 bit mode register size */
117#define LOGREGSZ 2 /* log rsize */
118#define REG_S sw
119#define REG_L lw
120#define CF_SZ 24 /* Call frame size */
121#define CF_ARGSZ 16 /* Call frame arg size */
122#define CF_RA_OFFS 20 /* Call ra save offset */
123#endif
124
Elliott Hughes851e68a2014-02-19 16:53:20 -0800125#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS64)
Raghu Gandham405b8022012-07-25 18:16:42 -0700126#define REGSZ 8 /* 64 bit mode register size */
127#define LOGREGSZ 3 /* log rsize */
128#define REG_S sd
129#define REG_L ld
130#define CF_SZ 48 /* Call frame size (multiple of ALIGNSZ) */
131#define CF_ARGSZ 32 /* Call frame arg size */
132#define CF_RA_OFFS 40 /* Call ra save offset */
133#endif
134
135#define REGSZ_FP 8 /* 64 bit FP register size */
136
137#ifndef __LP64__
138#define PTR_L lw
139#define PTR_S sw
140#define PTR_SUB sub
141#define PTR_ADD add
142#define PTR_SUBU subu
143#define PTR_ADDU addu
144#define LI li
145#define LA la
146#define PTR_SLL sll
147#define PTR_SRL srl
148#define PTR_VAL .word
149#else
150#define PTR_L ld
151#define PTR_S sd
152#define PTR_ADD dadd
153#define PTR_SUB dsub
154#define PTR_SUBU dsubu
155#define PTR_ADDU daddu
156#define LI dli
157#define LA dla
158#define PTR_SLL dsll
159#define PTR_SRL dsrl
160#define PTR_VAL .dword
161#endif
162
163/*
Raghu Gandham405b8022012-07-25 18:16:42 -0700164 * LEAF(x, fsize)
165 *
166 * Declare a leaf routine.
167 */
168#define LEAF(x, fsize) \
169 .align 3; \
170 .globl x; \
171 .ent x, 0; \
172x: ; \
Elliott Hughes851e68a2014-02-19 16:53:20 -0800173 .cfi_startproc; \
Raghu Gandham405b8022012-07-25 18:16:42 -0700174 .frame sp, fsize, ra; \
175 SETUP_GP \
Raghu Gandham405b8022012-07-25 18:16:42 -0700176
177/*
178 * NON_LEAF(x)
179 *
180 * Declare a non-leaf routine (a routine that makes other C calls).
181 */
182#define NON_LEAF(x, fsize, retpc) \
183 .align 3; \
184 .globl x; \
185 .ent x, 0; \
186x: ; \
Elliott Hughes851e68a2014-02-19 16:53:20 -0800187 .cfi_startproc; \
Raghu Gandham405b8022012-07-25 18:16:42 -0700188 .frame sp, fsize, retpc; \
189 SETUP_GP \
Raghu Gandham405b8022012-07-25 18:16:42 -0700190
191#endif /* !_MIPS_ASM_H */