blob: 48e100bf77f3827207012228ef5eae2060d10ef9 [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +00001/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Ben Cheng655a7c02013-10-16 16:09:24 -07007#ifndef _LINUX_PRCTL_H
8#define _LINUX_PRCTL_H
Christopher Ferris82d75042015-01-26 10:57:07 -08009#include <linux/types.h>
Ben Cheng655a7c02013-10-16 16:09:24 -070010#define PR_SET_PDEATHSIG 1
Christopher Ferris82d75042015-01-26 10:57:07 -080011#define PR_GET_PDEATHSIG 2
Ben Cheng655a7c02013-10-16 16:09:24 -070012#define PR_GET_DUMPABLE 3
13#define PR_SET_DUMPABLE 4
14#define PR_GET_UNALIGN 5
Christopher Ferris82d75042015-01-26 10:57:07 -080015#define PR_SET_UNALIGN 6
Ben Cheng655a7c02013-10-16 16:09:24 -070016#define PR_UNALIGN_NOPRINT 1
17#define PR_UNALIGN_SIGBUS 2
18#define PR_GET_KEEPCAPS 7
Christopher Ferris82d75042015-01-26 10:57:07 -080019#define PR_SET_KEEPCAPS 8
Ben Cheng655a7c02013-10-16 16:09:24 -070020#define PR_GET_FPEMU 9
21#define PR_SET_FPEMU 10
22#define PR_FPEMU_NOPRINT 1
Christopher Ferris82d75042015-01-26 10:57:07 -080023#define PR_FPEMU_SIGFPE 2
Ben Cheng655a7c02013-10-16 16:09:24 -070024#define PR_GET_FPEXC 11
25#define PR_SET_FPEXC 12
26#define PR_FP_EXC_SW_ENABLE 0x80
Christopher Ferris82d75042015-01-26 10:57:07 -080027#define PR_FP_EXC_DIV 0x010000
Ben Cheng655a7c02013-10-16 16:09:24 -070028#define PR_FP_EXC_OVF 0x020000
29#define PR_FP_EXC_UND 0x040000
30#define PR_FP_EXC_RES 0x080000
Christopher Ferris82d75042015-01-26 10:57:07 -080031#define PR_FP_EXC_INV 0x100000
Ben Cheng655a7c02013-10-16 16:09:24 -070032#define PR_FP_EXC_DISABLED 0
33#define PR_FP_EXC_NONRECOV 1
34#define PR_FP_EXC_ASYNC 2
Christopher Ferris82d75042015-01-26 10:57:07 -080035#define PR_FP_EXC_PRECISE 3
Ben Cheng655a7c02013-10-16 16:09:24 -070036#define PR_GET_TIMING 13
37#define PR_SET_TIMING 14
38#define PR_TIMING_STATISTICAL 0
Christopher Ferris82d75042015-01-26 10:57:07 -080039#define PR_TIMING_TIMESTAMP 1
Ben Cheng655a7c02013-10-16 16:09:24 -070040#define PR_SET_NAME 15
41#define PR_GET_NAME 16
42#define PR_GET_ENDIAN 19
Christopher Ferris82d75042015-01-26 10:57:07 -080043#define PR_SET_ENDIAN 20
Ben Cheng655a7c02013-10-16 16:09:24 -070044#define PR_ENDIAN_BIG 0
45#define PR_ENDIAN_LITTLE 1
46#define PR_ENDIAN_PPC_LITTLE 2
Christopher Ferris82d75042015-01-26 10:57:07 -080047#define PR_GET_SECCOMP 21
Ben Cheng655a7c02013-10-16 16:09:24 -070048#define PR_SET_SECCOMP 22
49#define PR_CAPBSET_READ 23
50#define PR_CAPBSET_DROP 24
Christopher Ferris82d75042015-01-26 10:57:07 -080051#define PR_GET_TSC 25
Ben Cheng655a7c02013-10-16 16:09:24 -070052#define PR_SET_TSC 26
53#define PR_TSC_ENABLE 1
54#define PR_TSC_SIGSEGV 2
Christopher Ferris82d75042015-01-26 10:57:07 -080055#define PR_GET_SECUREBITS 27
Ben Cheng655a7c02013-10-16 16:09:24 -070056#define PR_SET_SECUREBITS 28
57#define PR_SET_TIMERSLACK 29
58#define PR_GET_TIMERSLACK 30
Christopher Ferris82d75042015-01-26 10:57:07 -080059#define PR_TASK_PERF_EVENTS_DISABLE 31
Ben Cheng655a7c02013-10-16 16:09:24 -070060#define PR_TASK_PERF_EVENTS_ENABLE 32
61#define PR_MCE_KILL 33
62#define PR_MCE_KILL_CLEAR 0
Christopher Ferris82d75042015-01-26 10:57:07 -080063#define PR_MCE_KILL_SET 1
Ben Cheng655a7c02013-10-16 16:09:24 -070064#define PR_MCE_KILL_LATE 0
65#define PR_MCE_KILL_EARLY 1
66#define PR_MCE_KILL_DEFAULT 2
Christopher Ferris82d75042015-01-26 10:57:07 -080067#define PR_MCE_KILL_GET 34
Ben Cheng655a7c02013-10-16 16:09:24 -070068#define PR_SET_MM 35
69#define PR_SET_MM_START_CODE 1
70#define PR_SET_MM_END_CODE 2
Christopher Ferris82d75042015-01-26 10:57:07 -080071#define PR_SET_MM_START_DATA 3
Ben Cheng655a7c02013-10-16 16:09:24 -070072#define PR_SET_MM_END_DATA 4
73#define PR_SET_MM_START_STACK 5
74#define PR_SET_MM_START_BRK 6
Christopher Ferris82d75042015-01-26 10:57:07 -080075#define PR_SET_MM_BRK 7
Ben Cheng655a7c02013-10-16 16:09:24 -070076#define PR_SET_MM_ARG_START 8
77#define PR_SET_MM_ARG_END 9
78#define PR_SET_MM_ENV_START 10
Christopher Ferris82d75042015-01-26 10:57:07 -080079#define PR_SET_MM_ENV_END 11
Ben Cheng655a7c02013-10-16 16:09:24 -070080#define PR_SET_MM_AUXV 12
81#define PR_SET_MM_EXE_FILE 13
Christopher Ferris82d75042015-01-26 10:57:07 -080082#define PR_SET_MM_MAP 14
Christopher Ferris82d75042015-01-26 10:57:07 -080083#define PR_SET_MM_MAP_SIZE 15
84struct prctl_mm_map {
Tao Baod7db5942015-01-28 10:07:51 -080085 __u64 start_code;
86 __u64 end_code;
Tao Baod7db5942015-01-28 10:07:51 -080087 __u64 start_data;
88 __u64 end_data;
89 __u64 start_brk;
90 __u64 brk;
Tao Baod7db5942015-01-28 10:07:51 -080091 __u64 start_stack;
92 __u64 arg_start;
93 __u64 arg_end;
94 __u64 env_start;
Tao Baod7db5942015-01-28 10:07:51 -080095 __u64 env_end;
96 __u64 * auxv;
97 __u32 auxv_size;
98 __u32 exe_fd;
Christopher Ferris82d75042015-01-26 10:57:07 -080099};
Ben Cheng655a7c02013-10-16 16:09:24 -0700100#define PR_SET_PTRACER 0x59616d61
Tao Baod7db5942015-01-28 10:07:51 -0800101#define PR_SET_PTRACER_ANY ((unsigned long) - 1)
Ben Cheng655a7c02013-10-16 16:09:24 -0700102#define PR_SET_CHILD_SUBREAPER 36
103#define PR_GET_CHILD_SUBREAPER 37
104#define PR_SET_NO_NEW_PRIVS 38
105#define PR_GET_NO_NEW_PRIVS 39
Ben Cheng655a7c02013-10-16 16:09:24 -0700106#define PR_GET_TID_ADDRESS 40
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700107#define PR_SET_THP_DISABLE 41
108#define PR_GET_THP_DISABLE 42
Christopher Ferris05d08e92016-02-04 13:16:38 -0800109#define PR_MPX_ENABLE_MANAGEMENT 43
110#define PR_MPX_DISABLE_MANAGEMENT 44
Christopher Ferris05d08e92016-02-04 13:16:38 -0800111#define PR_SET_FP_MODE 45
112#define PR_GET_FP_MODE 46
113#define PR_FP_MODE_FR (1 << 0)
114#define PR_FP_MODE_FRE (1 << 1)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800115#define PR_CAP_AMBIENT 47
116#define PR_CAP_AMBIENT_IS_SET 1
117#define PR_CAP_AMBIENT_RAISE 2
118#define PR_CAP_AMBIENT_LOWER 3
Christopher Ferris05d08e92016-02-04 13:16:38 -0800119#define PR_CAP_AMBIENT_CLEAR_ALL 4
Christopher Ferris934ec942018-01-31 15:29:16 -0800120#define PR_SVE_SET_VL 50
121#define PR_SVE_SET_VL_ONEXEC (1 << 18)
122#define PR_SVE_GET_VL 51
123#define PR_SVE_VL_LEN_MASK 0xffff
124#define PR_SVE_VL_INHERIT (1 << 17)
Christopher Ferris76a1d452018-06-27 14:12:29 -0700125#define PR_GET_SPECULATION_CTRL 52
126#define PR_SET_SPECULATION_CTRL 53
127#define PR_SPEC_STORE_BYPASS 0
Christopher Ferris86a48372019-01-10 14:14:59 -0800128#define PR_SPEC_INDIRECT_BRANCH 1
Christopher Ferris2abfa9e2021-11-01 16:26:06 -0700129#define PR_SPEC_L1D_FLUSH 2
Christopher Ferris76a1d452018-06-27 14:12:29 -0700130#define PR_SPEC_NOT_AFFECTED 0
131#define PR_SPEC_PRCTL (1UL << 0)
132#define PR_SPEC_ENABLE (1UL << 1)
133#define PR_SPEC_DISABLE (1UL << 2)
134#define PR_SPEC_FORCE_DISABLE (1UL << 3)
Christopher Ferris24f97eb2019-05-20 12:58:13 -0700135#define PR_SPEC_DISABLE_NOEXEC (1UL << 4)
Christopher Ferrisd842e432019-03-07 10:21:59 -0800136#define PR_PAC_RESET_KEYS 54
137#define PR_PAC_APIAKEY (1UL << 0)
138#define PR_PAC_APIBKEY (1UL << 1)
139#define PR_PAC_APDAKEY (1UL << 2)
140#define PR_PAC_APDBKEY (1UL << 3)
141#define PR_PAC_APGAKEY (1UL << 4)
Christopher Ferris9584fa42019-12-09 15:36:13 -0800142#define PR_SET_TAGGED_ADDR_CTRL 55
143#define PR_GET_TAGGED_ADDR_CTRL 56
144#define PR_TAGGED_ADDR_ENABLE (1UL << 0)
Christopher Ferrisa4792612022-01-10 13:51:15 -0800145#define PR_MTE_TCF_NONE 0UL
Christopher Ferris2abfa9e2021-11-01 16:26:06 -0700146#define PR_MTE_TCF_SYNC (1UL << 1)
147#define PR_MTE_TCF_ASYNC (1UL << 2)
148#define PR_MTE_TCF_MASK (PR_MTE_TCF_SYNC | PR_MTE_TCF_ASYNC)
Christopher Ferris32ff3f82020-12-14 13:10:04 -0800149#define PR_MTE_TAG_SHIFT 3
150#define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
Christopher Ferris2abfa9e2021-11-01 16:26:06 -0700151#define PR_MTE_TCF_SHIFT 1
Christopher Ferrisbb9fcb42020-04-06 11:38:04 -0700152#define PR_SET_IO_FLUSHER 57
153#define PR_GET_IO_FLUSHER 58
Christopher Ferris05667cd2021-02-16 16:01:34 -0800154#define PR_SET_SYSCALL_USER_DISPATCH 59
155#define PR_SYS_DISPATCH_OFF 0
156#define PR_SYS_DISPATCH_ON 1
157#define SYSCALL_DISPATCH_FILTER_ALLOW 0
158#define SYSCALL_DISPATCH_FILTER_BLOCK 1
Christopher Ferrisfcc3b4f2021-07-01 01:30:21 +0000159#define PR_PAC_SET_ENABLED_KEYS 60
160#define PR_PAC_GET_ENABLED_KEYS 61
Christopher Ferris3a39c0b2021-09-02 00:03:38 +0000161#define PR_SCHED_CORE 62
162#define PR_SCHED_CORE_GET 0
163#define PR_SCHED_CORE_CREATE 1
164#define PR_SCHED_CORE_SHARE_TO 2
165#define PR_SCHED_CORE_SHARE_FROM 3
166#define PR_SCHED_CORE_MAX 4
Christopher Ferrisa4792612022-01-10 13:51:15 -0800167#define PR_SCHED_CORE_SCOPE_THREAD 0
168#define PR_SCHED_CORE_SCOPE_THREAD_GROUP 1
169#define PR_SCHED_CORE_SCOPE_PROCESS_GROUP 2
Christopher Ferris80ae69d2022-08-02 16:32:21 -0700170#define PR_SME_SET_VL 63
171#define PR_SME_SET_VL_ONEXEC (1 << 18)
172#define PR_SME_GET_VL 64
173#define PR_SME_VL_LEN_MASK 0xffff
174#define PR_SME_VL_INHERIT (1 << 17)
Christopher Ferrisb7cef6d2023-05-09 19:04:15 +0000175#define PR_SET_MDWE 65
Christopher Ferris0f795212024-01-17 14:17:28 -0800176#define PR_MDWE_REFUSE_EXEC_GAIN (1UL << 0)
177#define PR_MDWE_NO_INHERIT (1UL << 1)
Christopher Ferrisb7cef6d2023-05-09 19:04:15 +0000178#define PR_GET_MDWE 66
Christopher Ferris9584fa42019-12-09 15:36:13 -0800179#define PR_SET_VMA 0x53564d41
180#define PR_SET_VMA_ANON_NAME 0
Christopher Ferris37c3f3c2023-07-10 10:59:05 -0700181#define PR_GET_AUXV 0x41555856
182#define PR_SET_MEMORY_MERGE 67
183#define PR_GET_MEMORY_MERGE 68
Christopher Ferris8666d042023-09-06 14:55:31 -0700184#define PR_RISCV_V_SET_CONTROL 69
185#define PR_RISCV_V_GET_CONTROL 70
186#define PR_RISCV_V_VSTATE_CTRL_DEFAULT 0
187#define PR_RISCV_V_VSTATE_CTRL_OFF 1
188#define PR_RISCV_V_VSTATE_CTRL_ON 2
189#define PR_RISCV_V_VSTATE_CTRL_INHERIT (1 << 4)
190#define PR_RISCV_V_VSTATE_CTRL_CUR_MASK 0x3
191#define PR_RISCV_V_VSTATE_CTRL_NEXT_MASK 0xc
192#define PR_RISCV_V_VSTATE_CTRL_MASK 0x1f
Ruchi Kandoib84926b2014-04-22 19:00:45 -0700193#endif