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gerrit.omnirom.org / android_bionic / 32ff3f831cf358e9f5b9e5bd49f231612eb764e4 / . / libc / kernel / uapi / linux / sdla.h
blob: acdfb6b83fd7694154d445fc45c4f68d617f4eba [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]1/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPISDLA_H
20#define _UAPISDLA_H
21#define SDLA_TYPES
22#define SDLA_S502A 5020
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]23#define SDLA_S502E 5021
24#define SDLA_S503 5030
25#define SDLA_S507 5070
26#define SDLA_S508 5080
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]27#define SDLA_S509 5090
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]28#define SDLA_UNKNOWN - 1
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]29#define SDLA_S508_PORT_V35 0x00
30#define SDLA_S508_PORT_RS232 0x02
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]31#define SDLA_CPU_3M 0x00
32#define SDLA_CPU_5M 0x01
33#define SDLA_CPU_7M 0x02
34#define SDLA_CPU_8M 0x03
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]35#define SDLA_CPU_10M 0x04
36#define SDLA_CPU_16M 0x05
37#define SDLA_CPU_12M 0x06
38#define SDLA_IDENTIFY (FRAD_LAST_IOCTL + 1)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]39#define SDLA_CPUSPEED (FRAD_LAST_IOCTL + 2)
40#define SDLA_PROTOCOL (FRAD_LAST_IOCTL + 3)
41#define SDLA_CLEARMEM (FRAD_LAST_IOCTL + 4)
42#define SDLA_WRITEMEM (FRAD_LAST_IOCTL + 5)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]43#define SDLA_READMEM (FRAD_LAST_IOCTL + 6)
44struct sdla_mem {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]45 int addr;
46 int len;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]47 void __user * data;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]48};
49#define SDLA_START (FRAD_LAST_IOCTL + 7)
50#define SDLA_STOP (FRAD_LAST_IOCTL + 8)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]51#define SDLA_NMIADDR 0x0000
52#define SDLA_CONF_ADDR 0x0010
53#define SDLA_S502A_NMIADDR 0x0066
54#define SDLA_CODE_BASEADDR 0x0100
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]55#define SDLA_WINDOW_SIZE 0x2000
56#define SDLA_ADDR_MASK 0x1FFF
57#define SDLA_MAX_DATA 4080
58#define SDLA_MAX_MTU 4072
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]59#define SDLA_MAX_DLCI 24
60struct sdla_conf {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]61 short station;
62 short config;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]63 short kbaud;
64 short clocking;
65 short max_frm;
66 short T391;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]67 short T392;
68 short N391;
69 short N392;
70 short N393;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]71 short CIR_fwd;
72 short Bc_fwd;
73 short Be_fwd;
74 short CIR_bwd;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]75 short Bc_bwd;
76 short Be_bwd;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]77};
78struct sdla_dlci_conf {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]79 short config;
80 short CIR_fwd;
81 short Bc_fwd;
82 short Be_fwd;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]83 short CIR_bwd;
84 short Bc_bwd;
85 short Be_bwd;
86 short Tc_fwd;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]87 short Tc_bwd;
88 short Tf_max;
89 short Tb_max;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]90};
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]91#endif