blob: 9604b0357ce25b1d033d539e39f72619473c0ea8 [file] [log] [blame]
Christopher Ferris1ed55342022-03-22 16:06:25 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef KFD_SYSFS_H_INCLUDED
20#define KFD_SYSFS_H_INCLUDED
21#define HSA_CAP_HOT_PLUGGABLE 0x00000001
22#define HSA_CAP_ATS_PRESENT 0x00000002
23#define HSA_CAP_SHARED_WITH_GRAPHICS 0x00000004
24#define HSA_CAP_QUEUE_SIZE_POW2 0x00000008
25#define HSA_CAP_QUEUE_SIZE_32BIT 0x00000010
26#define HSA_CAP_QUEUE_IDLE_EVENT 0x00000020
27#define HSA_CAP_VA_LIMIT 0x00000040
28#define HSA_CAP_WATCH_POINTS_SUPPORTED 0x00000080
29#define HSA_CAP_WATCH_POINTS_TOTALBITS_MASK 0x00000f00
30#define HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT 8
31#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK 0x00003000
32#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT 12
33#define HSA_CAP_DOORBELL_TYPE_PRE_1_0 0x0
34#define HSA_CAP_DOORBELL_TYPE_1_0 0x1
35#define HSA_CAP_DOORBELL_TYPE_2_0 0x2
36#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP 0x00004000
37#define HSA_CAP_RESERVED_WAS_SRAM_EDCSUPPORTED 0x00080000
38#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000
39#define HSA_CAP_RASEVENTNOTIFY 0x00200000
40#define HSA_CAP_ASIC_REVISION_MASK 0x03c00000
41#define HSA_CAP_ASIC_REVISION_SHIFT 22
42#define HSA_CAP_SRAM_EDCSUPPORTED 0x04000000
43#define HSA_CAP_SVMAPI_SUPPORTED 0x08000000
44#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000
45#define HSA_CAP_RESERVED 0xe00f8000
46#define HSA_MEM_HEAP_TYPE_SYSTEM 0
47#define HSA_MEM_HEAP_TYPE_FB_PUBLIC 1
48#define HSA_MEM_HEAP_TYPE_FB_PRIVATE 2
49#define HSA_MEM_HEAP_TYPE_GPU_GDS 3
50#define HSA_MEM_HEAP_TYPE_GPU_LDS 4
51#define HSA_MEM_HEAP_TYPE_GPU_SCRATCH 5
52#define HSA_MEM_FLAGS_HOT_PLUGGABLE 0x00000001
53#define HSA_MEM_FLAGS_NON_VOLATILE 0x00000002
54#define HSA_MEM_FLAGS_RESERVED 0xfffffffc
55#define HSA_CACHE_TYPE_DATA 0x00000001
56#define HSA_CACHE_TYPE_INSTRUCTION 0x00000002
57#define HSA_CACHE_TYPE_CPU 0x00000004
58#define HSA_CACHE_TYPE_HSACU 0x00000008
59#define HSA_CACHE_TYPE_RESERVED 0xfffffff0
60#define HSA_IOLINK_TYPE_UNDEFINED 0
61#define HSA_IOLINK_TYPE_HYPERTRANSPORT 1
62#define HSA_IOLINK_TYPE_PCIEXPRESS 2
63#define HSA_IOLINK_TYPE_AMBA 3
64#define HSA_IOLINK_TYPE_MIPI 4
65#define HSA_IOLINK_TYPE_QPI_1_1 5
66#define HSA_IOLINK_TYPE_RESERVED1 6
67#define HSA_IOLINK_TYPE_RESERVED2 7
68#define HSA_IOLINK_TYPE_RAPID_IO 8
69#define HSA_IOLINK_TYPE_INFINIBAND 9
70#define HSA_IOLINK_TYPE_RESERVED3 10
71#define HSA_IOLINK_TYPE_XGMI 11
72#define HSA_IOLINK_TYPE_XGOP 12
73#define HSA_IOLINK_TYPE_GZ 13
74#define HSA_IOLINK_TYPE_ETHERNET_RDMA 14
75#define HSA_IOLINK_TYPE_RDMA_OTHER 15
76#define HSA_IOLINK_TYPE_OTHER 16
77#define HSA_IOLINK_FLAGS_ENABLED (1 << 0)
78#define HSA_IOLINK_FLAGS_NON_COHERENT (1 << 1)
79#define HSA_IOLINK_FLAGS_NO_ATOMICS_32_BIT (1 << 2)
80#define HSA_IOLINK_FLAGS_NO_ATOMICS_64_BIT (1 << 3)
81#define HSA_IOLINK_FLAGS_NO_PEER_TO_PEER_DMA (1 << 4)
82#define HSA_IOLINK_FLAGS_RESERVED 0xffffffe0
83#endif