blob: fd808535e8fe85f27a5cc1261e85b5e04eec4346 [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef DRM_FOURCC_H
20#define DRM_FOURCC_H
Christopher Ferris106b3a82016-08-24 12:15:38 -070021#include "drm.h"
22#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -080023extern "C" {
Christopher Ferris106b3a82016-08-24 12:15:38 -070024#endif
25#define fourcc_code(a,b,c,d) ((__u32) (a) | ((__u32) (b) << 8) | ((__u32) (c) << 16) | ((__u32) (d) << 24))
Tao Baod7db5942015-01-28 10:07:51 -080026#define DRM_FORMAT_BIG_ENDIAN (1 << 31)
Christopher Ferris86a48372019-01-10 14:14:59 -080027#define DRM_FORMAT_INVALID 0
Ben Cheng655a7c02013-10-16 16:09:24 -070028#define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ')
Christopher Ferris05d08e92016-02-04 13:16:38 -080029#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ')
Christopher Ferris525ce912017-07-26 13:12:53 -070030#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ')
Christopher Ferris05d08e92016-02-04 13:16:38 -080031#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8')
Christopher Ferris05d08e92016-02-04 13:16:38 -080032#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8')
Christopher Ferris525ce912017-07-26 13:12:53 -070033#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2')
34#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2')
Ben Cheng655a7c02013-10-16 16:09:24 -070035#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8')
36#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8')
Ben Cheng655a7c02013-10-16 16:09:24 -070037#define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2')
38#define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2')
39#define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2')
40#define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2')
Ben Cheng655a7c02013-10-16 16:09:24 -070041#define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2')
42#define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2')
43#define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2')
44#define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2')
Ben Cheng655a7c02013-10-16 16:09:24 -070045#define DRM_FORMAT_XRGB1555 fourcc_code('X', 'R', '1', '5')
46#define DRM_FORMAT_XBGR1555 fourcc_code('X', 'B', '1', '5')
47#define DRM_FORMAT_RGBX5551 fourcc_code('R', 'X', '1', '5')
48#define DRM_FORMAT_BGRX5551 fourcc_code('B', 'X', '1', '5')
Ben Cheng655a7c02013-10-16 16:09:24 -070049#define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5')
50#define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5')
51#define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5')
52#define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5')
Ben Cheng655a7c02013-10-16 16:09:24 -070053#define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6')
54#define DRM_FORMAT_BGR565 fourcc_code('B', 'G', '1', '6')
55#define DRM_FORMAT_RGB888 fourcc_code('R', 'G', '2', '4')
56#define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4')
Ben Cheng655a7c02013-10-16 16:09:24 -070057#define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4')
58#define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4')
59#define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4')
60#define DRM_FORMAT_BGRX8888 fourcc_code('B', 'X', '2', '4')
Ben Cheng655a7c02013-10-16 16:09:24 -070061#define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4')
62#define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4')
63#define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4')
64#define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4')
Ben Cheng655a7c02013-10-16 16:09:24 -070065#define DRM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0')
66#define DRM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0')
67#define DRM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0')
68#define DRM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0')
Ben Cheng655a7c02013-10-16 16:09:24 -070069#define DRM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0')
70#define DRM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0')
71#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0')
72#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0')
Ben Cheng655a7c02013-10-16 16:09:24 -070073#define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V')
74#define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U')
75#define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y')
76#define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y')
Ben Cheng655a7c02013-10-16 16:09:24 -070077#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V')
Christopher Ferrisd842e432019-03-07 10:21:59 -080078#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V')
79#define DRM_FORMAT_Y0L0 fourcc_code('Y', '0', 'L', '0')
80#define DRM_FORMAT_X0L0 fourcc_code('X', '0', 'L', '0')
81#define DRM_FORMAT_Y0L2 fourcc_code('Y', '0', 'L', '2')
82#define DRM_FORMAT_X0L2 fourcc_code('X', '0', 'L', '2')
Christopher Ferris525ce912017-07-26 13:12:53 -070083#define DRM_FORMAT_XRGB8888_A8 fourcc_code('X', 'R', 'A', '8')
84#define DRM_FORMAT_XBGR8888_A8 fourcc_code('X', 'B', 'A', '8')
85#define DRM_FORMAT_RGBX8888_A8 fourcc_code('R', 'X', 'A', '8')
86#define DRM_FORMAT_BGRX8888_A8 fourcc_code('B', 'X', 'A', '8')
87#define DRM_FORMAT_RGB888_A8 fourcc_code('R', '8', 'A', '8')
88#define DRM_FORMAT_BGR888_A8 fourcc_code('B', '8', 'A', '8')
89#define DRM_FORMAT_RGB565_A8 fourcc_code('R', '5', 'A', '8')
90#define DRM_FORMAT_BGR565_A8 fourcc_code('B', '5', 'A', '8')
Ben Cheng655a7c02013-10-16 16:09:24 -070091#define DRM_FORMAT_NV12 fourcc_code('N', 'V', '1', '2')
92#define DRM_FORMAT_NV21 fourcc_code('N', 'V', '2', '1')
93#define DRM_FORMAT_NV16 fourcc_code('N', 'V', '1', '6')
Ben Cheng655a7c02013-10-16 16:09:24 -070094#define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1')
95#define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4')
96#define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2')
Christopher Ferris24f97eb2019-05-20 12:58:13 -070097#define DRM_FORMAT_P010 fourcc_code('P', '0', '1', '0')
98#define DRM_FORMAT_P012 fourcc_code('P', '0', '1', '2')
99#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6')
Ben Cheng655a7c02013-10-16 16:09:24 -0700100#define DRM_FORMAT_YUV410 fourcc_code('Y', 'U', 'V', '9')
101#define DRM_FORMAT_YVU410 fourcc_code('Y', 'V', 'U', '9')
102#define DRM_FORMAT_YUV411 fourcc_code('Y', 'U', '1', '1')
103#define DRM_FORMAT_YVU411 fourcc_code('Y', 'V', '1', '1')
Ben Cheng655a7c02013-10-16 16:09:24 -0700104#define DRM_FORMAT_YUV420 fourcc_code('Y', 'U', '1', '2')
105#define DRM_FORMAT_YVU420 fourcc_code('Y', 'V', '1', '2')
106#define DRM_FORMAT_YUV422 fourcc_code('Y', 'U', '1', '6')
107#define DRM_FORMAT_YVU422 fourcc_code('Y', 'V', '1', '6')
Ben Cheng655a7c02013-10-16 16:09:24 -0700108#define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4')
109#define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4')
Christopher Ferris05d08e92016-02-04 13:16:38 -0800110#define DRM_FORMAT_MOD_NONE 0
Christopher Ferris525ce912017-07-26 13:12:53 -0700111#define DRM_FORMAT_MOD_VENDOR_NONE 0
Christopher Ferris05d08e92016-02-04 13:16:38 -0800112#define DRM_FORMAT_MOD_VENDOR_INTEL 0x01
113#define DRM_FORMAT_MOD_VENDOR_AMD 0x02
Christopher Ferris76a1d452018-06-27 14:12:29 -0700114#define DRM_FORMAT_MOD_VENDOR_NVIDIA 0x03
Christopher Ferris05d08e92016-02-04 13:16:38 -0800115#define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04
116#define DRM_FORMAT_MOD_VENDOR_QCOM 0x05
Christopher Ferris525ce912017-07-26 13:12:53 -0700117#define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06
Christopher Ferris1308ad32017-11-14 17:32:13 -0800118#define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07
Christopher Ferris9ce28842018-10-25 12:11:39 -0700119#define DRM_FORMAT_MOD_VENDOR_ARM 0x08
Christopher Ferris24f97eb2019-05-20 12:58:13 -0700120#define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09
Christopher Ferris1308ad32017-11-14 17:32:13 -0800121#define DRM_FORMAT_RESERVED ((1ULL << 56) - 1)
Christopher Ferris76a1d452018-06-27 14:12:29 -0700122#define fourcc_mod_code(vendor,val) ((((__u64) DRM_FORMAT_MOD_VENDOR_ ##vendor) << 56) | ((val) & 0x00ffffffffffffffULL))
Christopher Ferris1308ad32017-11-14 17:32:13 -0800123#define DRM_FORMAT_MOD_INVALID fourcc_mod_code(NONE, DRM_FORMAT_RESERVED)
Christopher Ferris525ce912017-07-26 13:12:53 -0700124#define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800125#define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800126#define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2)
127#define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
Christopher Ferris1308ad32017-11-14 17:32:13 -0800128#define I915_FORMAT_MOD_Y_TILED_CCS fourcc_mod_code(INTEL, 4)
129#define I915_FORMAT_MOD_Yf_TILED_CCS fourcc_mod_code(INTEL, 5)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800130#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
Christopher Ferris86a48372019-01-10 14:14:59 -0800131#define DRM_FORMAT_MOD_SAMSUNG_16_16_TILE fourcc_mod_code(SAMSUNG, 2)
Christopher Ferris9ce28842018-10-25 12:11:39 -0700132#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1)
Christopher Ferris525ce912017-07-26 13:12:53 -0700133#define DRM_FORMAT_MOD_VIVANTE_TILED fourcc_mod_code(VIVANTE, 1)
134#define DRM_FORMAT_MOD_VIVANTE_SUPER_TILED fourcc_mod_code(VIVANTE, 2)
135#define DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED fourcc_mod_code(VIVANTE, 3)
136#define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
Christopher Ferris76a1d452018-06-27 14:12:29 -0700137#define DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED fourcc_mod_code(NVIDIA, 1)
138#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(v) fourcc_mod_code(NVIDIA, 0x10 | ((v) & 0xf))
139#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_ONE_GOB fourcc_mod_code(NVIDIA, 0x10)
140#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_TWO_GOB fourcc_mod_code(NVIDIA, 0x11)
141#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_FOUR_GOB fourcc_mod_code(NVIDIA, 0x12)
142#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_EIGHT_GOB fourcc_mod_code(NVIDIA, 0x13)
143#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_SIXTEEN_GOB fourcc_mod_code(NVIDIA, 0x14)
144#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_THIRTYTWO_GOB fourcc_mod_code(NVIDIA, 0x15)
Christopher Ferris9ce28842018-10-25 12:11:39 -0700145#define __fourcc_mod_broadcom_param_shift 8
146#define __fourcc_mod_broadcom_param_bits 48
147#define fourcc_mod_broadcom_code(val,params) fourcc_mod_code(BROADCOM, ((((__u64) params) << __fourcc_mod_broadcom_param_shift) | val))
148#define fourcc_mod_broadcom_param(m) ((int) (((m) >> __fourcc_mod_broadcom_param_shift) & ((1ULL << __fourcc_mod_broadcom_param_bits) - 1)))
149#define fourcc_mod_broadcom_mod(m) ((m) & ~(((1ULL << __fourcc_mod_broadcom_param_bits) - 1) << __fourcc_mod_broadcom_param_shift))
Christopher Ferris1308ad32017-11-14 17:32:13 -0800150#define DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED fourcc_mod_code(BROADCOM, 1)
Christopher Ferris9ce28842018-10-25 12:11:39 -0700151#define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) fourcc_mod_broadcom_code(2, v)
152#define DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(v) fourcc_mod_broadcom_code(3, v)
153#define DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(v) fourcc_mod_broadcom_code(4, v)
154#define DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(v) fourcc_mod_broadcom_code(5, v)
155#define DRM_FORMAT_MOD_BROADCOM_SAND32 DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(0)
156#define DRM_FORMAT_MOD_BROADCOM_SAND64 DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(0)
157#define DRM_FORMAT_MOD_BROADCOM_SAND128 DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(0)
158#define DRM_FORMAT_MOD_BROADCOM_SAND256 DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(0)
159#define DRM_FORMAT_MOD_BROADCOM_UIF fourcc_mod_code(BROADCOM, 6)
160#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) fourcc_mod_code(ARM, __afbc_mode)
161#define AFBC_FORMAT_MOD_BLOCK_SIZE_MASK 0xf
162#define AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 (1ULL)
163#define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8 (2ULL)
Christopher Ferris24f97eb2019-05-20 12:58:13 -0700164#define AFBC_FORMAT_MOD_BLOCK_SIZE_64x4 (3ULL)
165#define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8_64x4 (4ULL)
Christopher Ferris9ce28842018-10-25 12:11:39 -0700166#define AFBC_FORMAT_MOD_YTR (1ULL << 4)
167#define AFBC_FORMAT_MOD_SPLIT (1ULL << 5)
168#define AFBC_FORMAT_MOD_SPARSE (1ULL << 6)
169#define AFBC_FORMAT_MOD_CBR (1ULL << 7)
170#define AFBC_FORMAT_MOD_TILED (1ULL << 8)
171#define AFBC_FORMAT_MOD_SC (1ULL << 9)
Christopher Ferris24f97eb2019-05-20 12:58:13 -0700172#define AFBC_FORMAT_MOD_DB (1ULL << 10)
173#define AFBC_FORMAT_MOD_BCH (1ULL << 11)
174#define DRM_FORMAT_MOD_ALLWINNER_TILED fourcc_mod_code(ALLWINNER, 1)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700175#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -0800176}
Christopher Ferris106b3a82016-08-24 12:15:38 -0700177#endif
Ben Cheng655a7c02013-10-16 16:09:24 -0700178#endif