| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 1 | /**************************************************************************** | 
|  | 2 | **************************************************************************** | 
|  | 3 | *** | 
|  | 4 | ***   This header was automatically generated from a Linux kernel header | 
|  | 5 | ***   of the same name, to make information necessary for userspace to | 
|  | 6 | ***   call into the kernel available to libc.  It contains only constants, | 
|  | 7 | ***   structures, and macros generated from the original header, and thus, | 
|  | 8 | ***   contains no copyrightable information. | 
|  | 9 | *** | 
|  | 10 | ***   To edit the content of this header, modify the corresponding | 
|  | 11 | ***   source file (e.g. under external/kernel-headers/original/) then | 
|  | 12 | ***   run bionic/libc/kernel/tools/update_all.py | 
|  | 13 | *** | 
|  | 14 | ***   Any manual change here will be lost the next time this script will | 
|  | 15 | ***   be run. You've been warned! | 
|  | 16 | *** | 
|  | 17 | **************************************************************************** | 
|  | 18 | ****************************************************************************/ | 
|  | 19 | #ifndef __HDLC_IOCTL_H__ | 
|  | 20 | #define __HDLC_IOCTL_H__ | 
|  | 21 | #define GENERIC_HDLC_VERSION 4 | 
|  | 22 | #define CLOCK_DEFAULT 0 | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 23 | #define CLOCK_EXT 1 | 
|  | 24 | #define CLOCK_INT 2 | 
|  | 25 | #define CLOCK_TXINT 3 | 
|  | 26 | #define CLOCK_TXFROMRX 4 | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 27 | #define ENCODING_DEFAULT 0 | 
|  | 28 | #define ENCODING_NRZ 1 | 
|  | 29 | #define ENCODING_NRZI 2 | 
|  | 30 | #define ENCODING_FM_MARK 3 | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 31 | #define ENCODING_FM_SPACE 4 | 
|  | 32 | #define ENCODING_MANCHESTER 5 | 
|  | 33 | #define PARITY_DEFAULT 0 | 
|  | 34 | #define PARITY_NONE 1 | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 35 | #define PARITY_CRC16_PR0 2 | 
|  | 36 | #define PARITY_CRC16_PR1 3 | 
|  | 37 | #define PARITY_CRC16_PR0_CCITT 4 | 
|  | 38 | #define PARITY_CRC16_PR1_CCITT 5 | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 39 | #define PARITY_CRC32_PR0_CCITT 6 | 
|  | 40 | #define PARITY_CRC32_PR1_CCITT 7 | 
|  | 41 | #define LMI_DEFAULT 0 | 
|  | 42 | #define LMI_NONE 1 | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 43 | #define LMI_ANSI 2 | 
|  | 44 | #define LMI_CCITT 3 | 
|  | 45 | #define LMI_CISCO 4 | 
|  | 46 | #ifndef __ASSEMBLY__ | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 47 | typedef struct { | 
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 48 | unsigned int clock_rate; | 
|  | 49 | unsigned int clock_type; | 
|  | 50 | unsigned short loopback; | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 51 | } sync_serial_settings; | 
|  | 52 | typedef struct { | 
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 53 | unsigned int clock_rate; | 
|  | 54 | unsigned int clock_type; | 
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 55 | unsigned short loopback; | 
|  | 56 | unsigned int slot_map; | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 57 | } te1_settings; | 
|  | 58 | typedef struct { | 
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 59 | unsigned short encoding; | 
|  | 60 | unsigned short parity; | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 61 | } raw_hdlc_proto; | 
|  | 62 | typedef struct { | 
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 63 | unsigned int t391; | 
|  | 64 | unsigned int t392; | 
|  | 65 | unsigned int n391; | 
|  | 66 | unsigned int n392; | 
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 67 | unsigned int n393; | 
|  | 68 | unsigned short lmi; | 
|  | 69 | unsigned short dce; | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 70 | } fr_proto; | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 71 | typedef struct { | 
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 72 | unsigned int dlci; | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 73 | } fr_proto_pvc; | 
|  | 74 | typedef struct { | 
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 75 | unsigned int dlci; | 
|  | 76 | char master[IFNAMSIZ]; | 
|  | 77 | } fr_proto_pvc_info; | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 78 | typedef struct { | 
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 79 | unsigned int interval; | 
|  | 80 | unsigned int timeout; | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 81 | } cisco_proto; | 
| Christopher Ferris | bb9fcb4 | 2020-04-06 11:38:04 -0700 | [diff] [blame] | 82 | typedef struct { | 
|  | 83 | unsigned short dce; | 
|  | 84 | unsigned int modulo; | 
|  | 85 | unsigned int window; | 
|  | 86 | unsigned int t1; | 
|  | 87 | unsigned int t2; | 
|  | 88 | unsigned int n2; | 
|  | 89 | } x25_hdlc_proto; | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 90 | #endif | 
| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 91 | #endif |