Gitiles
Code Review Sign In
gerrit.omnirom.org / android_bionic / 20a9f99b3b600bf49b11bf9169d37d86a8fd21d6 / . / libc / kernel / uapi / linux / hsi / hsi_char.h
blob: b471c3461e1eccf3c28f9e5d2d5833d0e272c78e [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +0000[diff] [blame]1/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]7#ifndef __HSI_CHAR_H
8#define __HSI_CHAR_H
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]9#include <linux/types.h>
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]10#define HSI_CHAR_MAGIC 'k'
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]11#define HSC_IOW(num,dtype) _IOW(HSI_CHAR_MAGIC, num, dtype)
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]12#define HSC_IOR(num,dtype) _IOR(HSI_CHAR_MAGIC, num, dtype)
13#define HSC_IOWR(num,dtype) _IOWR(HSI_CHAR_MAGIC, num, dtype)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]14#define HSC_IO(num) _IO(HSI_CHAR_MAGIC, num)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]15#define HSC_RESET HSC_IO(16)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]16#define HSC_SET_PM HSC_IO(17)
17#define HSC_SEND_BREAK HSC_IO(18)
18#define HSC_SET_RX HSC_IOW(19, struct hsc_rx_config)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]19#define HSC_GET_RX HSC_IOW(20, struct hsc_rx_config)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]20#define HSC_SET_TX HSC_IOW(21, struct hsc_tx_config)
21#define HSC_GET_TX HSC_IOW(22, struct hsc_tx_config)
22#define HSC_PM_DISABLE 0
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]23#define HSC_PM_ENABLE 1
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]24#define HSC_MODE_STREAM 1
25#define HSC_MODE_FRAME 2
26#define HSC_FLOW_SYNC 0
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]27#define HSC_ARB_RR 0
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]28#define HSC_ARB_PRIO 1
29struct hsc_rx_config {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]30 __u32 mode;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]31 __u32 flow;
32 __u32 channels;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]33};
34struct hsc_tx_config {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800[diff] [blame]35 __u32 mode;
36 __u32 channels;
37 __u32 speed;
38 __u32 arb_mode;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]39};
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]40#endif