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gerrit.omnirom.org / android_bionic / 180edefbd287c39caeb9d48784a9a10ac35f3636 / . / libc / kernel / uapi / misc / xilinx_sdfec.h
blob: 1a42307e5be7654e8759faf3794439f433dbec2d [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +0000[diff] [blame^]1/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Christopher Ferris9584fa42019-12-09 15:36:13 -0800[diff] [blame]7#ifndef __XILINX_SDFEC_H__
8#define __XILINX_SDFEC_H__
9#include <linux/types.h>
10#define XSDFEC_LDPC_SC_TABLE_ADDR_BASE (0x10000)
11#define XSDFEC_LDPC_SC_TABLE_ADDR_HIGH (0x10400)
12#define XSDFEC_LDPC_LA_TABLE_ADDR_BASE (0x18000)
13#define XSDFEC_LDPC_LA_TABLE_ADDR_HIGH (0x19000)
14#define XSDFEC_LDPC_QC_TABLE_ADDR_BASE (0x20000)
15#define XSDFEC_LDPC_QC_TABLE_ADDR_HIGH (0x28000)
16#define XSDFEC_SC_TABLE_DEPTH (XSDFEC_LDPC_SC_TABLE_ADDR_HIGH - XSDFEC_LDPC_SC_TABLE_ADDR_BASE)
17#define XSDFEC_LA_TABLE_DEPTH (XSDFEC_LDPC_LA_TABLE_ADDR_HIGH - XSDFEC_LDPC_LA_TABLE_ADDR_BASE)
18#define XSDFEC_QC_TABLE_DEPTH (XSDFEC_LDPC_QC_TABLE_ADDR_HIGH - XSDFEC_LDPC_QC_TABLE_ADDR_BASE)
19enum xsdfec_code {
20 XSDFEC_TURBO_CODE = 0,
21 XSDFEC_LDPC_CODE,
22};
23enum xsdfec_order {
24 XSDFEC_MAINTAIN_ORDER = 0,
25 XSDFEC_OUT_OF_ORDER,
26};
27enum xsdfec_turbo_alg {
28 XSDFEC_MAX_SCALE = 0,
29 XSDFEC_MAX_STAR,
30 XSDFEC_TURBO_ALG_MAX,
31};
32enum xsdfec_state {
33 XSDFEC_INIT = 0,
34 XSDFEC_STARTED,
35 XSDFEC_STOPPED,
36 XSDFEC_NEEDS_RESET,
37 XSDFEC_PL_RECONFIGURE,
38};
39enum xsdfec_axis_width {
40 XSDFEC_1x128b = 1,
41 XSDFEC_2x128b = 2,
42 XSDFEC_4x128b = 4,
43};
44enum xsdfec_axis_word_include {
45 XSDFEC_FIXED_VALUE = 0,
46 XSDFEC_IN_BLOCK,
47 XSDFEC_PER_AXI_TRANSACTION,
48 XSDFEC_AXIS_WORDS_INCLUDE_MAX,
49};
50struct xsdfec_turbo {
51 __u32 alg;
52 __u8 scale;
53};
54struct xsdfec_ldpc_params {
55 __u32 n;
56 __u32 k;
57 __u32 psize;
58 __u32 nlayers;
59 __u32 nqc;
60 __u32 nmqc;
61 __u32 nm;
62 __u32 norm_type;
63 __u32 no_packing;
64 __u32 special_qc;
65 __u32 no_final_parity;
66 __u32 max_schedule;
67 __u32 sc_off;
68 __u32 la_off;
69 __u32 qc_off;
70 __u32 * sc_table;
71 __u32 * la_table;
72 __u32 * qc_table;
73 __u16 code_id;
74};
75struct xsdfec_status {
76 __u32 state;
77 __s8 activity;
78};
79struct xsdfec_irq {
80 __s8 enable_isr;
81 __s8 enable_ecc_isr;
82};
83struct xsdfec_config {
84 __u32 code;
85 __u32 order;
86 __u32 din_width;
87 __u32 din_word_include;
88 __u32 dout_width;
89 __u32 dout_word_include;
90 struct xsdfec_irq irq;
91 __s8 bypass;
92 __s8 code_wr_protect;
93};
94struct xsdfec_stats {
95 __u32 isr_err_count;
96 __u32 cecc_count;
97 __u32 uecc_count;
98};
99struct xsdfec_ldpc_param_table_sizes {
100 __u32 sc_size;
101 __u32 la_size;
102 __u32 qc_size;
103};
104#define XSDFEC_MAGIC 'f'
105#define XSDFEC_START_DEV _IO(XSDFEC_MAGIC, 0)
106#define XSDFEC_STOP_DEV _IO(XSDFEC_MAGIC, 1)
107#define XSDFEC_GET_STATUS _IOR(XSDFEC_MAGIC, 2, struct xsdfec_status)
108#define XSDFEC_SET_IRQ _IOW(XSDFEC_MAGIC, 3, struct xsdfec_irq)
109#define XSDFEC_SET_TURBO _IOW(XSDFEC_MAGIC, 4, struct xsdfec_turbo)
110#define XSDFEC_ADD_LDPC_CODE_PARAMS _IOW(XSDFEC_MAGIC, 5, struct xsdfec_ldpc_params)
111#define XSDFEC_GET_CONFIG _IOR(XSDFEC_MAGIC, 6, struct xsdfec_config)
112#define XSDFEC_GET_TURBO _IOR(XSDFEC_MAGIC, 7, struct xsdfec_turbo)
113#define XSDFEC_SET_ORDER _IOW(XSDFEC_MAGIC, 8, unsigned long)
114#define XSDFEC_SET_BYPASS _IOW(XSDFEC_MAGIC, 9, bool)
115#define XSDFEC_IS_ACTIVE _IOR(XSDFEC_MAGIC, 10, bool)
116#define XSDFEC_CLEAR_STATS _IO(XSDFEC_MAGIC, 11)
117#define XSDFEC_GET_STATS _IOR(XSDFEC_MAGIC, 12, struct xsdfec_stats)
118#define XSDFEC_SET_DEFAULT_CONFIG _IO(XSDFEC_MAGIC, 13)
119#endif