Elliott Hughes | 180edef | 2023-11-02 00:08:05 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * This file is auto-generated. Modifications will be lost. |
| 3 | * |
| 4 | * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ |
| 5 | * for more information. |
| 6 | */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 7 | #ifndef __HDLC_IOCTL_H__ |
| 8 | #define __HDLC_IOCTL_H__ |
| 9 | #define GENERIC_HDLC_VERSION 4 |
| 10 | #define CLOCK_DEFAULT 0 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 11 | #define CLOCK_EXT 1 |
| 12 | #define CLOCK_INT 2 |
| 13 | #define CLOCK_TXINT 3 |
| 14 | #define CLOCK_TXFROMRX 4 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 15 | #define ENCODING_DEFAULT 0 |
| 16 | #define ENCODING_NRZ 1 |
| 17 | #define ENCODING_NRZI 2 |
| 18 | #define ENCODING_FM_MARK 3 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 19 | #define ENCODING_FM_SPACE 4 |
| 20 | #define ENCODING_MANCHESTER 5 |
| 21 | #define PARITY_DEFAULT 0 |
| 22 | #define PARITY_NONE 1 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 23 | #define PARITY_CRC16_PR0 2 |
| 24 | #define PARITY_CRC16_PR1 3 |
| 25 | #define PARITY_CRC16_PR0_CCITT 4 |
| 26 | #define PARITY_CRC16_PR1_CCITT 5 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 27 | #define PARITY_CRC32_PR0_CCITT 6 |
| 28 | #define PARITY_CRC32_PR1_CCITT 7 |
| 29 | #define LMI_DEFAULT 0 |
| 30 | #define LMI_NONE 1 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 31 | #define LMI_ANSI 2 |
| 32 | #define LMI_CCITT 3 |
| 33 | #define LMI_CISCO 4 |
| 34 | #ifndef __ASSEMBLY__ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 35 | typedef struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 36 | unsigned int clock_rate; |
| 37 | unsigned int clock_type; |
| 38 | unsigned short loopback; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 39 | } sync_serial_settings; |
| 40 | typedef struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 41 | unsigned int clock_rate; |
| 42 | unsigned int clock_type; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 43 | unsigned short loopback; |
| 44 | unsigned int slot_map; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 45 | } te1_settings; |
| 46 | typedef struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 47 | unsigned short encoding; |
| 48 | unsigned short parity; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 49 | } raw_hdlc_proto; |
| 50 | typedef struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 51 | unsigned int t391; |
| 52 | unsigned int t392; |
| 53 | unsigned int n391; |
| 54 | unsigned int n392; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 55 | unsigned int n393; |
| 56 | unsigned short lmi; |
| 57 | unsigned short dce; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 58 | } fr_proto; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 59 | typedef struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 60 | unsigned int dlci; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 61 | } fr_proto_pvc; |
| 62 | typedef struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 63 | unsigned int dlci; |
| 64 | char master[IFNAMSIZ]; |
| 65 | } fr_proto_pvc_info; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 66 | typedef struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 67 | unsigned int interval; |
| 68 | unsigned int timeout; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 69 | } cisco_proto; |
Christopher Ferris | bb9fcb4 | 2020-04-06 11:38:04 -0700 | [diff] [blame] | 70 | typedef struct { |
| 71 | unsigned short dce; |
| 72 | unsigned int modulo; |
| 73 | unsigned int window; |
| 74 | unsigned int t1; |
| 75 | unsigned int t2; |
| 76 | unsigned int n2; |
| 77 | } x25_hdlc_proto; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 78 | #endif |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 79 | #endif |