blob: 28d8b4963aea388acbf64780beaf25cf08967ade [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +00001/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Christopher Ferris05d08e92016-02-04 13:16:38 -08007#ifndef __NDCTL_H__
8#define __NDCTL_H__
9#include <linux/types.h>
Christopher Ferris106b3a82016-08-24 12:15:38 -070010struct nd_cmd_dimm_flags {
Christopher Ferris05d08e92016-02-04 13:16:38 -080011 __u32 status;
12 __u32 flags;
Colin Cross4ac33222022-12-15 15:45:35 -080013} __attribute__((__packed__));
Christopher Ferris05d08e92016-02-04 13:16:38 -080014struct nd_cmd_get_config_size {
Christopher Ferris05d08e92016-02-04 13:16:38 -080015 __u32 status;
16 __u32 config_size;
17 __u32 max_xfer;
Colin Cross4ac33222022-12-15 15:45:35 -080018} __attribute__((__packed__));
Christopher Ferris05d08e92016-02-04 13:16:38 -080019struct nd_cmd_get_config_data_hdr {
20 __u32 in_offset;
21 __u32 in_length;
22 __u32 status;
Christopher Ferris7447a1c2022-10-04 18:24:44 -070023 __u8 out_buf[];
Colin Cross4ac33222022-12-15 15:45:35 -080024} __attribute__((__packed__));
Christopher Ferris05d08e92016-02-04 13:16:38 -080025struct nd_cmd_set_config_hdr {
26 __u32 in_offset;
Christopher Ferris05d08e92016-02-04 13:16:38 -080027 __u32 in_length;
Christopher Ferris7447a1c2022-10-04 18:24:44 -070028 __u8 in_buf[];
Colin Cross4ac33222022-12-15 15:45:35 -080029} __attribute__((__packed__));
Christopher Ferris05d08e92016-02-04 13:16:38 -080030struct nd_cmd_vendor_hdr {
Christopher Ferris05d08e92016-02-04 13:16:38 -080031 __u32 opcode;
32 __u32 in_length;
Christopher Ferris7447a1c2022-10-04 18:24:44 -070033 __u8 in_buf[];
Colin Cross4ac33222022-12-15 15:45:35 -080034} __attribute__((__packed__));
Christopher Ferris05d08e92016-02-04 13:16:38 -080035struct nd_cmd_vendor_tail {
36 __u32 status;
37 __u32 out_length;
Christopher Ferris7447a1c2022-10-04 18:24:44 -070038 __u8 out_buf[];
Colin Cross4ac33222022-12-15 15:45:35 -080039} __attribute__((__packed__));
Christopher Ferris05d08e92016-02-04 13:16:38 -080040struct nd_cmd_ars_cap {
41 __u64 address;
42 __u64 length;
Christopher Ferris05d08e92016-02-04 13:16:38 -080043 __u32 status;
Christopher Ferris106b3a82016-08-24 12:15:38 -070044 __u32 max_ars_out;
45 __u32 clear_err_unit;
Christopher Ferris1308ad32017-11-14 17:32:13 -080046 __u16 flags;
47 __u16 reserved;
Colin Cross4ac33222022-12-15 15:45:35 -080048} __attribute__((__packed__));
Christopher Ferris106b3a82016-08-24 12:15:38 -070049struct nd_cmd_ars_start {
Christopher Ferris05d08e92016-02-04 13:16:38 -080050 __u64 address;
51 __u64 length;
52 __u16 type;
Christopher Ferris106b3a82016-08-24 12:15:38 -070053 __u8 flags;
54 __u8 reserved[5];
Christopher Ferris05d08e92016-02-04 13:16:38 -080055 __u32 status;
Christopher Ferris106b3a82016-08-24 12:15:38 -070056 __u32 scrub_time;
Colin Cross4ac33222022-12-15 15:45:35 -080057} __attribute__((__packed__));
Christopher Ferris05d08e92016-02-04 13:16:38 -080058struct nd_cmd_ars_status {
59 __u32 status;
Christopher Ferris05d08e92016-02-04 13:16:38 -080060 __u32 out_length;
61 __u64 address;
62 __u64 length;
Christopher Ferris106b3a82016-08-24 12:15:38 -070063 __u64 restart_address;
64 __u64 restart_length;
Christopher Ferris106b3a82016-08-24 12:15:38 -070065 __u16 type;
66 __u16 flags;
Christopher Ferris05d08e92016-02-04 13:16:38 -080067 __u32 num_records;
68 struct nd_ars_record {
Christopher Ferris106b3a82016-08-24 12:15:38 -070069 __u32 handle;
70 __u32 reserved;
Christopher Ferris05d08e92016-02-04 13:16:38 -080071 __u64 err_address;
72 __u64 length;
Colin Cross4ac33222022-12-15 15:45:35 -080073 } __attribute__((__packed__)) records[];
74} __attribute__((__packed__));
Christopher Ferris106b3a82016-08-24 12:15:38 -070075struct nd_cmd_clear_error {
76 __u64 address;
Christopher Ferris106b3a82016-08-24 12:15:38 -070077 __u64 length;
78 __u32 status;
79 __u8 reserved[4];
80 __u64 cleared;
Colin Cross4ac33222022-12-15 15:45:35 -080081} __attribute__((__packed__));
Christopher Ferris05d08e92016-02-04 13:16:38 -080082enum {
83 ND_CMD_IMPLEMENTED = 0,
84 ND_CMD_ARS_CAP = 1,
Christopher Ferris106b3a82016-08-24 12:15:38 -070085 ND_CMD_ARS_START = 2,
Christopher Ferris05d08e92016-02-04 13:16:38 -080086 ND_CMD_ARS_STATUS = 3,
Christopher Ferris106b3a82016-08-24 12:15:38 -070087 ND_CMD_CLEAR_ERROR = 4,
Christopher Ferris05d08e92016-02-04 13:16:38 -080088 ND_CMD_SMART = 1,
89 ND_CMD_SMART_THRESHOLD = 2,
90 ND_CMD_DIMM_FLAGS = 3,
Christopher Ferris05d08e92016-02-04 13:16:38 -080091 ND_CMD_GET_CONFIG_SIZE = 4,
92 ND_CMD_GET_CONFIG_DATA = 5,
93 ND_CMD_SET_CONFIG_DATA = 6,
94 ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7,
Christopher Ferris05d08e92016-02-04 13:16:38 -080095 ND_CMD_VENDOR_EFFECT_LOG = 8,
96 ND_CMD_VENDOR = 9,
Christopher Ferris106b3a82016-08-24 12:15:38 -070097 ND_CMD_CALL = 10,
Christopher Ferris05d08e92016-02-04 13:16:38 -080098};
99enum {
Christopher Ferris05d08e92016-02-04 13:16:38 -0800100 ND_ARS_VOLATILE = 1,
101 ND_ARS_PERSISTENT = 2,
Christopher Ferris1308ad32017-11-14 17:32:13 -0800102 ND_ARS_RETURN_PREV_DATA = 1 << 1,
Christopher Ferris525ce912017-07-26 13:12:53 -0700103 ND_CONFIG_LOCKED = 1,
Christopher Ferris05d08e92016-02-04 13:16:38 -0800104};
105#define ND_IOCTL 'N'
Christopher Ferris05d08e92016-02-04 13:16:38 -0800106#define ND_IOCTL_DIMM_FLAGS _IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS, struct nd_cmd_dimm_flags)
107#define ND_IOCTL_GET_CONFIG_SIZE _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE, struct nd_cmd_get_config_size)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800108#define ND_IOCTL_GET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA, struct nd_cmd_get_config_data_hdr)
109#define ND_IOCTL_SET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA, struct nd_cmd_set_config_hdr)
110#define ND_IOCTL_VENDOR _IOWR(ND_IOCTL, ND_CMD_VENDOR, struct nd_cmd_vendor_hdr)
111#define ND_IOCTL_ARS_CAP _IOWR(ND_IOCTL, ND_CMD_ARS_CAP, struct nd_cmd_ars_cap)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800112#define ND_IOCTL_ARS_START _IOWR(ND_IOCTL, ND_CMD_ARS_START, struct nd_cmd_ars_start)
113#define ND_IOCTL_ARS_STATUS _IOWR(ND_IOCTL, ND_CMD_ARS_STATUS, struct nd_cmd_ars_status)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700114#define ND_IOCTL_CLEAR_ERROR _IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR, struct nd_cmd_clear_error)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800115#define ND_DEVICE_DIMM 1
116#define ND_DEVICE_REGION_PMEM 2
Christopher Ferris05d08e92016-02-04 13:16:38 -0800117#define ND_DEVICE_REGION_BLK 3
118#define ND_DEVICE_NAMESPACE_IO 4
119#define ND_DEVICE_NAMESPACE_PMEM 5
Christopher Ferris106b3a82016-08-24 12:15:38 -0700120#define ND_DEVICE_DAX_PMEM 7
Christopher Ferris05d08e92016-02-04 13:16:38 -0800121enum nd_driver_flags {
122 ND_DRIVER_DIMM = 1 << ND_DEVICE_DIMM,
123 ND_DRIVER_REGION_PMEM = 1 << ND_DEVICE_REGION_PMEM,
Christopher Ferris106b3a82016-08-24 12:15:38 -0700124 ND_DRIVER_REGION_BLK = 1 << ND_DEVICE_REGION_BLK,
Christopher Ferris05d08e92016-02-04 13:16:38 -0800125 ND_DRIVER_NAMESPACE_IO = 1 << ND_DEVICE_NAMESPACE_IO,
126 ND_DRIVER_NAMESPACE_PMEM = 1 << ND_DEVICE_NAMESPACE_PMEM,
Christopher Ferris106b3a82016-08-24 12:15:38 -0700127 ND_DRIVER_DAX_PMEM = 1 << ND_DEVICE_DAX_PMEM,
128};
Christopher Ferris05d08e92016-02-04 13:16:38 -0800129enum ars_masks {
Christopher Ferris05d08e92016-02-04 13:16:38 -0800130 ARS_STATUS_MASK = 0x0000FFFF,
131 ARS_EXT_STATUS_SHIFT = 16,
Christopher Ferris106b3a82016-08-24 12:15:38 -0700132};
133struct nd_cmd_pkg {
134 __u64 nd_family;
135 __u64 nd_command;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700136 __u32 nd_size_in;
137 __u32 nd_size_out;
138 __u32 nd_reserved2[9];
139 __u32 nd_fw_size;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700140 unsigned char nd_payload[];
141};
142#define NVDIMM_FAMILY_INTEL 0
143#define NVDIMM_FAMILY_HPE1 1
Christopher Ferris106b3a82016-08-24 12:15:38 -0700144#define NVDIMM_FAMILY_HPE2 2
Christopher Ferris49f525c2016-12-12 14:55:36 -0800145#define NVDIMM_FAMILY_MSFT 3
Christopher Ferris24f97eb2019-05-20 12:58:13 -0700146#define NVDIMM_FAMILY_HYPERV 4
Christopher Ferris8177cdf2020-08-03 11:53:55 -0700147#define NVDIMM_FAMILY_PAPR 5
Christopher Ferris25c18d42020-10-14 17:42:58 -0700148#define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_PAPR
149#define NVDIMM_BUS_FAMILY_NFIT 0
150#define NVDIMM_BUS_FAMILY_INTEL 1
151#define NVDIMM_BUS_FAMILY_MAX NVDIMM_BUS_FAMILY_INTEL
Christopher Ferris106b3a82016-08-24 12:15:38 -0700152#define ND_IOCTL_CALL _IOWR(ND_IOCTL, ND_CMD_CALL, struct nd_cmd_pkg)
153#endif