blob: 94ca0a277501b6728bc0ea1fa076be8b30fb5a36 [file] [log] [blame]
Nick Kralevicha67e4de2013-01-14 11:28:26 -08001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
Ben Cheng655a7c02013-10-16 16:09:24 -070019#ifndef _LINUX_VIRTIO_PCI_H
20#define _LINUX_VIRTIO_PCI_H
Christopher Ferris05d08e92016-02-04 13:16:38 -080021#include <linux/types.h>
22#ifndef VIRTIO_PCI_NO_LEGACY
Christopher Ferris05d08e92016-02-04 13:16:38 -080023#define VIRTIO_PCI_HOST_FEATURES 0
Ben Cheng655a7c02013-10-16 16:09:24 -070024#define VIRTIO_PCI_GUEST_FEATURES 4
25#define VIRTIO_PCI_QUEUE_PFN 8
26#define VIRTIO_PCI_QUEUE_NUM 12
Christopher Ferris05d08e92016-02-04 13:16:38 -080027#define VIRTIO_PCI_QUEUE_SEL 14
Ben Cheng655a7c02013-10-16 16:09:24 -070028#define VIRTIO_PCI_QUEUE_NOTIFY 16
29#define VIRTIO_PCI_STATUS 18
30#define VIRTIO_PCI_ISR 19
Ben Cheng655a7c02013-10-16 16:09:24 -070031#define VIRTIO_MSI_CONFIG_VECTOR 20
32#define VIRTIO_MSI_QUEUE_VECTOR 22
Christopher Ferris38062f92014-07-09 15:33:25 -070033#define VIRTIO_PCI_CONFIG_OFF(msix_enabled) ((msix_enabled) ? 24 : 20)
Christopher Ferris38062f92014-07-09 15:33:25 -070034#define VIRTIO_PCI_CONFIG(dev) VIRTIO_PCI_CONFIG_OFF((dev)->msix_enabled)
Ben Cheng655a7c02013-10-16 16:09:24 -070035#define VIRTIO_PCI_ABI_VERSION 0
36#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
37#define VIRTIO_PCI_VRING_ALIGN 4096
Christopher Ferris38062f92014-07-09 15:33:25 -070038#endif
Christopher Ferris05d08e92016-02-04 13:16:38 -080039#define VIRTIO_PCI_ISR_CONFIG 0x2
40#define VIRTIO_MSI_NO_VECTOR 0xffff
41#ifndef VIRTIO_PCI_NO_MODERN
42#define VIRTIO_PCI_CAP_COMMON_CFG 1
Christopher Ferris05d08e92016-02-04 13:16:38 -080043#define VIRTIO_PCI_CAP_NOTIFY_CFG 2
44#define VIRTIO_PCI_CAP_ISR_CFG 3
45#define VIRTIO_PCI_CAP_DEVICE_CFG 4
46#define VIRTIO_PCI_CAP_PCI_CFG 5
Christopher Ferris32ff3f82020-12-14 13:10:04 -080047#define VIRTIO_PCI_CAP_SHARED_MEMORY_CFG 8
Christopher Ferris05d08e92016-02-04 13:16:38 -080048struct virtio_pci_cap {
49 __u8 cap_vndr;
50 __u8 cap_next;
51 __u8 cap_len;
Christopher Ferris05d08e92016-02-04 13:16:38 -080052 __u8 cfg_type;
53 __u8 bar;
Christopher Ferris32ff3f82020-12-14 13:10:04 -080054 __u8 id;
55 __u8 padding[2];
Christopher Ferris05d08e92016-02-04 13:16:38 -080056 __le32 offset;
Christopher Ferris05d08e92016-02-04 13:16:38 -080057 __le32 length;
58};
Christopher Ferris32ff3f82020-12-14 13:10:04 -080059struct virtio_pci_cap64 {
60 struct virtio_pci_cap cap;
61 __le32 offset_hi;
62 __le32 length_hi;
63};
Christopher Ferris05d08e92016-02-04 13:16:38 -080064struct virtio_pci_notify_cap {
65 struct virtio_pci_cap cap;
Christopher Ferris05d08e92016-02-04 13:16:38 -080066 __le32 notify_off_multiplier;
67};
68struct virtio_pci_common_cfg {
69 __le32 device_feature_select;
Christopher Ferris05d08e92016-02-04 13:16:38 -080070 __le32 device_feature;
71 __le32 guest_feature_select;
72 __le32 guest_feature;
73 __le16 msix_config;
Christopher Ferris05d08e92016-02-04 13:16:38 -080074 __le16 num_queues;
75 __u8 device_status;
76 __u8 config_generation;
77 __le16 queue_select;
Christopher Ferris05d08e92016-02-04 13:16:38 -080078 __le16 queue_size;
79 __le16 queue_msix_vector;
80 __le16 queue_enable;
81 __le16 queue_notify_off;
Christopher Ferris05d08e92016-02-04 13:16:38 -080082 __le32 queue_desc_lo;
83 __le32 queue_desc_hi;
84 __le32 queue_avail_lo;
85 __le32 queue_avail_hi;
Christopher Ferris05d08e92016-02-04 13:16:38 -080086 __le32 queue_used_lo;
87 __le32 queue_used_hi;
88};
89struct virtio_pci_cfg_cap {
Christopher Ferris05d08e92016-02-04 13:16:38 -080090 struct virtio_pci_cap cap;
91 __u8 pci_cfg_data[4];
92};
93#define VIRTIO_PCI_CAP_VNDR 0
Christopher Ferris05d08e92016-02-04 13:16:38 -080094#define VIRTIO_PCI_CAP_NEXT 1
95#define VIRTIO_PCI_CAP_LEN 2
96#define VIRTIO_PCI_CAP_CFG_TYPE 3
97#define VIRTIO_PCI_CAP_BAR 4
Christopher Ferris05d08e92016-02-04 13:16:38 -080098#define VIRTIO_PCI_CAP_OFFSET 8
99#define VIRTIO_PCI_CAP_LENGTH 12
100#define VIRTIO_PCI_NOTIFY_CAP_MULT 16
101#define VIRTIO_PCI_COMMON_DFSELECT 0
Christopher Ferris05d08e92016-02-04 13:16:38 -0800102#define VIRTIO_PCI_COMMON_DF 4
103#define VIRTIO_PCI_COMMON_GFSELECT 8
104#define VIRTIO_PCI_COMMON_GF 12
105#define VIRTIO_PCI_COMMON_MSIX 16
Christopher Ferris05d08e92016-02-04 13:16:38 -0800106#define VIRTIO_PCI_COMMON_NUMQ 18
107#define VIRTIO_PCI_COMMON_STATUS 20
108#define VIRTIO_PCI_COMMON_CFGGENERATION 21
109#define VIRTIO_PCI_COMMON_Q_SELECT 22
Christopher Ferris05d08e92016-02-04 13:16:38 -0800110#define VIRTIO_PCI_COMMON_Q_SIZE 24
111#define VIRTIO_PCI_COMMON_Q_MSIX 26
112#define VIRTIO_PCI_COMMON_Q_ENABLE 28
113#define VIRTIO_PCI_COMMON_Q_NOFF 30
Christopher Ferris05d08e92016-02-04 13:16:38 -0800114#define VIRTIO_PCI_COMMON_Q_DESCLO 32
115#define VIRTIO_PCI_COMMON_Q_DESCHI 36
116#define VIRTIO_PCI_COMMON_Q_AVAILLO 40
117#define VIRTIO_PCI_COMMON_Q_AVAILHI 44
Christopher Ferris05d08e92016-02-04 13:16:38 -0800118#define VIRTIO_PCI_COMMON_Q_USEDLO 48
119#define VIRTIO_PCI_COMMON_Q_USEDHI 52
Christopher Ferris7447a1c2022-10-04 18:24:44 -0700120#define VIRTIO_PCI_COMMON_Q_NDATA 56
121#define VIRTIO_PCI_COMMON_Q_RESET 58
Christopher Ferris05d08e92016-02-04 13:16:38 -0800122#endif
123#endif