riscv64: increase ASLR randomness for Sv48/57
Linux 6.9+ supports 33 bits with Sv48 and Sv57. Increase the
maximum and update the comment.
Bug: https://github.com/google/android-riscv64/issues/1
Test: Treehugger
Change-Id: Ia2731143ad30c5febe2058d35a381c01b14d8c3c
diff --git a/init/security.cpp b/init/security.cpp
index 3e15447..a0d63bc 100644
--- a/init/security.cpp
+++ b/init/security.cpp
@@ -114,10 +114,9 @@
return {};
}
#elif defined(__riscv)
- // TODO: sv48 and sv57 have both been added to the kernel, but the kernel
- // still doesn't support more than 24 bits.
- // https://github.com/google/android-riscv64/issues/1
- if (SetMmapRndBitsMin(24, 24, false)) {
+ // riscv64 supports 24 rnd bits with Sv39, and starting with the 6.9 kernel,
+ // 33 bits with Sv48 and Sv57.
+ if (SetMmapRndBitsMin(33, 24, false)) {
return {};
}
#elif defined(__x86_64__)