Atomic/SMP update.
Added atomic-inline.h. Added a platform-specific memory barrier call
there.
Added android_atomic_acquire_cmpxchg() and android_atomic_release_store().
Not tested on Mac OS X or SH.
Added memory barrier calls to linux-x86 atomics. Mac OS X has barrier
functions already. sh isn't really SMP-ready. linux-arm needs work
(to be done in a separate change).
Updated the makefile to make the SMP state visible to the code here.
Note that host binaries are NOT built with SMP enabled; while our hosts
are very likely SMP, it's not worth figuring out e.g. whether it's okay
to use the SSE2 mfence instruction or have to use something else. We
haven't had barriers enabled in host tools before, so there's probably
no need to stat now.
Removed quasiatomic 64-bit calls (now part of Dalvik).
Change-Id: I49e5e6c8abe70f304cdedb9d7b8e6e65f8925815
diff --git a/libcutils/atomic-android-sh.c b/libcutils/atomic-android-sh.c
index acbea97..d95b02b 100644
--- a/libcutils/atomic-android-sh.c
+++ b/libcutils/atomic-android-sh.c
@@ -118,42 +118,8 @@
return result;
}
-int64_t android_quasiatomic_swap_64(int64_t value, volatile int64_t* addr) {
- int64_t oldValue;
- pthread_mutex_t* lock = SWAP_LOCK(addr);
-
- pthread_mutex_lock(lock);
-
- oldValue = *addr;
- *addr = value;
-
- pthread_mutex_unlock(lock);
- return oldValue;
+int android_atomic_acquire_cmpxchg(int32_t oldvalue, int32_t newvalue,
+ volatile int32_t* addr) {
+ return android_atomic_cmpxchg(oldValue, newValue, addr);
}
-int android_quasiatomic_cmpxchg_64(int64_t oldvalue, int64_t newvalue,
- volatile int64_t* addr) {
- int result;
- pthread_mutex_t* lock = SWAP_LOCK(addr);
-
- pthread_mutex_lock(lock);
-
- if (*addr == oldvalue) {
- *addr = newvalue;
- result = 0;
- } else {
- result = 1;
- }
- pthread_mutex_unlock(lock);
- return result;
-}
-
-int64_t android_quasiatomic_read_64(volatile int64_t* addr) {
- int64_t result;
- pthread_mutex_t* lock = SWAP_LOCK(addr);
-
- pthread_mutex_lock(lock);
- result = *addr;
- pthread_mutex_unlock(lock);
- return result;
-}