| David Brazdil | 66fc120 | 2022-07-04 21:48:45 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2022 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * https://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | // |
| 18 | // Initial TTBR0 idmap activated before first memory write. |
| 19 | // Remains active until a new page table is created by early Rust. |
| 20 | // |
| 21 | |
| 22 | .set .SZ_1K, 1024 |
| 23 | .set .SZ_4K, 4 * .SZ_1K |
| 24 | .set .SZ_1M, 1024 * .SZ_1K |
| 25 | .set .SZ_2M, 2 * .SZ_1M |
| 26 | .set .SZ_1G, 1024 * .SZ_1M |
| 27 | |
| 28 | .set .PAGE_SIZE, .SZ_4K |
| 29 | |
| 30 | .set .ORIGIN_ADDR, 2 * .SZ_1G |
| 31 | .set .DTB_ADDR, .ORIGIN_ADDR + (0 * .SZ_2M) |
| 32 | .set .TEXT_ADDR, .ORIGIN_ADDR + (1 * .SZ_2M) |
| 33 | .set .DATA_ADDR, .ORIGIN_ADDR + (2 * .SZ_2M) |
| 34 | |
| 35 | .set .L_TT_TYPE_BLOCK, 0x1 |
| 36 | .set .L_TT_TYPE_PAGE, 0x3 |
| 37 | .set .L_TT_TYPE_TABLE, 0x3 |
| 38 | |
| 39 | .set .L_TT_AF, 0x1 << 10 // Access flag |
| 40 | .set .L_TT_NG, 0x1 << 11 // Not global |
| 41 | .set .L_TT_RO, 0x2 << 6 |
| 42 | .set .L_TT_XN, 0x3 << 53 |
| 43 | |
| 44 | .set .L_TT_MT_DEV, 0x0 << 2 // MAIR #0 (DEV_nGnRE) |
| 45 | .set .L_TT_MT_MEM, (0x1 << 2) | (0x3 << 8) // MAIR #1 (MEM_WBWA), inner shareable |
| 46 | |
| 47 | .set .L_BLOCK_RO, .L_TT_TYPE_BLOCK | .L_TT_MT_MEM | .L_TT_AF | .L_TT_RO | .L_TT_XN |
| 48 | .set .L_BLOCK_DEV, .L_TT_TYPE_BLOCK | .L_TT_MT_DEV | .L_TT_AF | .L_TT_XN |
| 49 | .set .L_BLOCK_MEM, .L_TT_TYPE_BLOCK | .L_TT_MT_MEM | .L_TT_AF | .L_TT_XN | .L_TT_NG |
| 50 | .set .L_BLOCK_MEM_XIP, .L_TT_TYPE_BLOCK | .L_TT_MT_MEM | .L_TT_AF | .L_TT_NG | .L_TT_RO |
| 51 | |
| 52 | .section ".rodata.idmap", "a", %progbits |
| 53 | .global idmap |
| 54 | .balign .PAGE_SIZE |
| 55 | idmap: |
| 56 | /* level 1 */ |
| 57 | .quad .L_BLOCK_DEV | 0x0 // 1 GiB of device mappings |
| 58 | .quad 0x0 // 1 GiB unmapped |
| 59 | .quad .L_TT_TYPE_TABLE + 0f // up to 1 GiB of DRAM |
| 60 | .balign .PAGE_SIZE, 0 // unmapped |
| 61 | |
| 62 | /* level 2 */ |
| 63 | 0: .quad .L_BLOCK_RO | .DTB_ADDR // DT provided by VMM |
| 64 | .quad .L_BLOCK_MEM_XIP | .TEXT_ADDR // 2 MiB of DRAM containing image |
| 65 | .quad .L_BLOCK_MEM | .DATA_ADDR // 2 MiB of writable DRAM |
| 66 | .balign .PAGE_SIZE, 0 // unmapped |