diff --git a/libs/libvmbase/src/arch.rs b/libs/libvmbase/src/arch.rs
index 5cb578b..d6095e5 100644
--- a/libs/libvmbase/src/arch.rs
+++ b/libs/libvmbase/src/arch.rs
@@ -20,6 +20,9 @@
 #[cfg(target_arch = "aarch64")]
 pub use aarch64::platform;
 
+#[cfg(target_arch = "aarch64")]
+pub use aarch64::layout;
+
 /// Write with well-defined compiled behavior.
 ///
 /// See https://github.com/rust-lang/rust/issues/131894
@@ -47,7 +50,6 @@
             let line_size = aarch64::min_dcache_line_size();
             let end = start + size;
             let start = crate::util::unchecked_align_down(start, line_size);
-
             for line in (start..end).step_by(line_size) {
                 crate::dc!("cvau", line);
             }
diff --git a/libs/libvmbase/src/arch/aarch64.rs b/libs/libvmbase/src/arch/aarch64.rs
index 068e001..86a3a03 100644
--- a/libs/libvmbase/src/arch/aarch64.rs
+++ b/libs/libvmbase/src/arch/aarch64.rs
@@ -14,6 +14,7 @@
 
 //! Wrappers of assembly calls.
 
+pub mod layout;
 pub mod platform;
 
 /// Reads a value from a system register.
diff --git a/libs/libvmbase/src/layout/crosvm.rs b/libs/libvmbase/src/arch/aarch64/layout.rs
similarity index 62%
rename from libs/libvmbase/src/layout/crosvm.rs
rename to libs/libvmbase/src/arch/aarch64/layout.rs
index 39a8147..fe72919 100644
--- a/libs/libvmbase/src/layout/crosvm.rs
+++ b/libs/libvmbase/src/arch/aarch64/layout.rs
@@ -16,7 +16,9 @@
 //!
 //! https://crosvm.dev/book/appendix/memory_layout.html#common-layout
 
+use crate::memory::page_4kb_of;
 use core::ops::Range;
+use static_assertions::const_assert_eq;
 
 /// The start address of MMIO space.
 pub const MMIO_START: usize = 0x0;
@@ -33,3 +35,18 @@
 
 /// Size of the FDT region as defined by crosvm, both in kernel and BIOS modes.
 pub const FDT_MAX_SIZE: usize = 2 << 20;
+
+/// First address that can't be translated by a level 1 TTBR0_EL1.
+pub const MAX_VIRT_ADDR: usize = 1 << 40;
+
+/// Base memory-mapped addresses of the UART devices.
+///
+/// See SERIAL_ADDR in https://crosvm.dev/book/appendix/memory_layout.html#common-layout.
+pub const UART_ADDRESSES: [usize; 4] = [0x3f8, 0x2f8, 0x3e8, 0x2e8];
+
+/// Address of the single page containing all the UART devices.
+pub const UART_PAGE_ADDR: usize = 0;
+const_assert_eq!(UART_PAGE_ADDR, page_4kb_of(UART_ADDRESSES[0]));
+const_assert_eq!(UART_PAGE_ADDR, page_4kb_of(UART_ADDRESSES[1]));
+const_assert_eq!(UART_PAGE_ADDR, page_4kb_of(UART_ADDRESSES[2]));
+const_assert_eq!(UART_PAGE_ADDR, page_4kb_of(UART_ADDRESSES[3]));
diff --git a/libs/libvmbase/src/entry.rs b/libs/libvmbase/src/entry.rs
index b681aea..1bd38ca 100644
--- a/libs/libvmbase/src/entry.rs
+++ b/libs/libvmbase/src/entry.rs
@@ -15,9 +15,8 @@
 //! Rust entry point.
 
 use crate::{
-    bionic, console, heap,
-    layout::{UART_ADDRESSES, UART_PAGE_ADDR},
-    logger,
+    arch::layout::{UART_ADDRESSES, UART_PAGE_ADDR},
+    bionic, console, heap, logger,
     memory::{switch_to_dynamic_page_tables, PAGE_SIZE, SIZE_16KB, SIZE_4KB},
     power::{reboot, shutdown},
     rand,
diff --git a/libs/libvmbase/src/exceptions.rs b/libs/libvmbase/src/exceptions.rs
index b04cb16..5965bda 100644
--- a/libs/libvmbase/src/exceptions.rs
+++ b/libs/libvmbase/src/exceptions.rs
@@ -15,8 +15,8 @@
 //! Helper functions and structs for exception handlers.
 
 use crate::{
+    arch::aarch64::layout::UART_PAGE_ADDR,
     eprintln,
-    layout::UART_PAGE_ADDR,
     memory::{page_4kb_of, MemoryTrackerError, MEMORY},
     read_sysreg,
 };
diff --git a/libs/libvmbase/src/layout.rs b/libs/libvmbase/src/layout.rs
index 4c45eb2..56d689d 100644
--- a/libs/libvmbase/src/layout.rs
+++ b/libs/libvmbase/src/layout.rs
@@ -16,33 +16,24 @@
 
 #![allow(unused_unsafe)]
 
-pub mod crosvm;
-
+#[cfg(target_arch = "aarch64")]
 use crate::linker::__stack_chk_guard;
-use crate::memory::{max_stack_size, page_4kb_of, PAGE_SIZE};
+use crate::memory::{max_stack_size, PAGE_SIZE};
+#[cfg(target_arch = "aarch64")]
 use aarch64_paging::paging::VirtualAddress;
 use core::ops::Range;
-use static_assertions::const_assert_eq;
+
+#[cfg(target_arch = "aarch64")]
+pub use crate::arch::aarch64::layout as crosvm;
 
 /// First address that can't be translated by a level 1 TTBR0_EL1.
 pub const MAX_VIRT_ADDR: usize = 1 << 40;
 
-/// Base memory-mapped addresses of the UART devices.
-///
-/// See SERIAL_ADDR in https://crosvm.dev/book/appendix/memory_layout.html#common-layout.
-pub const UART_ADDRESSES: [usize; 4] = [0x3f8, 0x2f8, 0x3e8, 0x2e8];
-
-/// Address of the single page containing all the UART devices.
-pub const UART_PAGE_ADDR: usize = 0;
-const_assert_eq!(UART_PAGE_ADDR, page_4kb_of(UART_ADDRESSES[0]));
-const_assert_eq!(UART_PAGE_ADDR, page_4kb_of(UART_ADDRESSES[1]));
-const_assert_eq!(UART_PAGE_ADDR, page_4kb_of(UART_ADDRESSES[2]));
-const_assert_eq!(UART_PAGE_ADDR, page_4kb_of(UART_ADDRESSES[3]));
-
 /// Get an address from a linker-defined symbol.
 #[macro_export]
 macro_rules! linker_addr {
     ($symbol:ident) => {{
+        #[cfg(target_arch = "aarch64")]
         let addr = (&raw const $crate::linker::$symbol) as usize;
         VirtualAddress(addr)
     }};
@@ -54,7 +45,6 @@
     ($begin:ident,$end:ident) => {{
         let start = linker_addr!($begin);
         let end = linker_addr!($end);
-
         start..end
     }};
 }
@@ -110,8 +100,9 @@
 }
 
 /// Range of the page at UART_PAGE_ADDR of PAGE_SIZE.
+#[cfg(target_arch = "aarch64")]
 pub fn console_uart_page() -> Range<VirtualAddress> {
-    VirtualAddress(UART_PAGE_ADDR)..VirtualAddress(UART_PAGE_ADDR + PAGE_SIZE)
+    VirtualAddress(crosvm::UART_PAGE_ADDR)..VirtualAddress(crosvm::UART_PAGE_ADDR + PAGE_SIZE)
 }
 
 /// Read-write data (original).
diff --git a/libs/libvmbase/src/memory/shared.rs b/libs/libvmbase/src/memory/shared.rs
index 7e5e7e9..a4eb93a 100644
--- a/libs/libvmbase/src/memory/shared.rs
+++ b/libs/libvmbase/src/memory/shared.rs
@@ -74,7 +74,7 @@
         let base = unchecked_align_down(phys, self.granule);
 
         // TODO(ptosi): Share the UART using this method and remove the hardcoded check.
-        if self.frames.contains(&base) || base == layout::UART_PAGE_ADDR {
+        if self.frames.contains(&base) || base == layout::crosvm::UART_PAGE_ADDR {
             return Err(MemoryTrackerError::DuplicateMmioShare(base));
         }
 
diff --git a/libs/libvmbase/src/memory/tracker.rs b/libs/libvmbase/src/memory/tracker.rs
index bbff254..3d1561f 100644
--- a/libs/libvmbase/src/memory/tracker.rs
+++ b/libs/libvmbase/src/memory/tracker.rs
@@ -119,7 +119,7 @@
 /// Unshare the UART page, previously shared with the host.
 pub fn unshare_uart() -> Result<()> {
     let Some(mmio_guard) = get_mmio_guard() else { return Ok(()) };
-    Ok(mmio_guard.unmap(layout::UART_PAGE_ADDR)?)
+    Ok(mmio_guard.unmap(layout::crosvm::UART_PAGE_ADDR)?)
 }
 
 /// Map the provided range as normal memory, with R/W permissions.