[rialto] Adjust FDT size in initialization

And also:
- Add the FDT_SIZE const to vmbase.
- Reuse the const in both rialto and pvmfw.

No behavior change for pvmfw.

Bug: 284462758
Test: atest rialto_test
Test: m pvmfw_img
Change-Id: I39700d9c87bb1edf71a5a8006fc8d0851c2e183a
diff --git a/pvmfw/src/entry.rs b/pvmfw/src/entry.rs
index 96855f2..3a870ab 100644
--- a/pvmfw/src/entry.rs
+++ b/pvmfw/src/entry.rs
@@ -36,7 +36,7 @@
     console,
     layout::{self, crosvm},
     logger, main,
-    memory::{min_dcache_line_size, MemoryTracker, MEMORY, SIZE_2MB, SIZE_4KB},
+    memory::{min_dcache_line_size, MemoryTracker, MEMORY, SIZE_4KB},
     power::reboot,
 };
 use zeroize::Zeroize;
@@ -89,7 +89,7 @@
 impl<'a> MemorySlices<'a> {
     fn new(fdt: usize, kernel: usize, kernel_size: usize) -> Result<Self, RebootReason> {
         // SAFETY - SIZE_2MB is non-zero.
-        const FDT_SIZE: NonZeroUsize = unsafe { NonZeroUsize::new_unchecked(SIZE_2MB) };
+        const FDT_SIZE: NonZeroUsize = unsafe { NonZeroUsize::new_unchecked(crosvm::FDT_MAX_SIZE) };
         // TODO - Only map the FDT as read-only, until we modify it right before jump_to_payload()
         // e.g. by generating a DTBO for a template DT in main() and, on return, re-map DT as RW,
         // overwrite with the template DT and apply the DTBO.
diff --git a/rialto/src/main.rs b/rialto/src/main.rs
index 3328659..11ca570 100644
--- a/rialto/src/main.rs
+++ b/rialto/src/main.rs
@@ -37,7 +37,6 @@
 
 const SZ_1K: usize = 1024;
 const SZ_64K: usize = 64 * SZ_1K;
-const SZ_1M: usize = 1024 * SZ_1K;
 
 #[global_allocator]
 static HEAP_ALLOCATOR: LockedHeap<32> = LockedHeap::<32>::new();
@@ -90,7 +89,7 @@
 unsafe fn try_main(fdt_addr: usize) -> Result<()> {
     info!("Welcome to Rialto!");
     // SAFETY: The caller ensures that `fdt_addr` is valid.
-    let fdt = unsafe { slice::from_raw_parts(fdt_addr as *mut u8, SZ_1M) };
+    let fdt = unsafe { slice::from_raw_parts(fdt_addr as *mut u8, crosvm::FDT_MAX_SIZE) };
     let fdt = libfdt::Fdt::from_slice(fdt)?;
     let pci_info = PciInfo::from_fdt(fdt)?;
     debug!("PCI: {:#x?}", pci_info);
diff --git a/vmbase/src/layout/crosvm.rs b/vmbase/src/layout/crosvm.rs
index 85d1e0b..d859b20 100644
--- a/vmbase/src/layout/crosvm.rs
+++ b/vmbase/src/layout/crosvm.rs
@@ -27,3 +27,6 @@
 
 /// The start of the system's contiguous "main" memory.
 pub const MEM_START: usize = 0x8000_0000;
+
+/// Size of the FDT region as defined by crosvm, both in kernel and BIOS modes.
+pub const FDT_MAX_SIZE: usize = 2 << 20;