Use inline assembly for UART MMIO.
We need to avoid a post-increment instruction being used for MMIO
because of an architectural flaw meaning that the ESR isn't set properly
when it faults.
Bug: 345658173
Test: m pvmfw
Change-Id: I9f8ba94a7dcfdfcaa620317b35718ca2be823a63
diff --git a/vmbase/src/uart.rs b/vmbase/src/uart.rs
index 09d747f..e35555d 100644
--- a/vmbase/src/uart.rs
+++ b/vmbase/src/uart.rs
@@ -16,7 +16,6 @@
//! provided by crosvm, and won't work with real hardware.
use core::fmt::{self, Write};
-use core::ptr::write_volatile;
/// Minimal driver for an 8250 UART. This only implements enough to work with the emulated 8250
/// provided by crosvm, and won't work with real hardware.
@@ -41,7 +40,11 @@
// SAFETY: We know that the base address points to the control registers of a UART device
// which is appropriately mapped.
unsafe {
- write_volatile(self.base_address, byte);
+ core::arch::asm!(
+ "strb {value:w}, [{ptr}]",
+ value = in(reg) byte,
+ ptr = in(reg) self.base_address,
+ );
}
}
}