vmbase: Move CMOs under crate::arch
No functional change intended.
Test: m pvmfw_bin
Bug: 377276983
Change-Id: I203bd4ea358d845e0d7ffedc89117c5d021baf18
diff --git a/libs/libvmbase/src/arch/aarch64.rs b/libs/libvmbase/src/arch/aarch64.rs
index d8bb2f5..5006aca 100644
--- a/libs/libvmbase/src/arch/aarch64.rs
+++ b/libs/libvmbase/src/arch/aarch64.rs
@@ -73,6 +73,23 @@
}};
}
+/// Executes a data cache operation.
+#[macro_export]
+macro_rules! dc {
+ ($option:literal, $addr:expr) => {{
+ let addr: usize = $addr;
+ #[allow(unused_unsafe)] // In case the macro is used within an unsafe block.
+ // SAFETY: Clearing cache lines shouldn't have Rust-visible side effects.
+ unsafe {
+ core::arch::asm!(
+ concat!("dc ", $option, ", {x}"),
+ x = in(reg) addr,
+ options(nomem, nostack, preserves_flags),
+ );
+ }
+ }};
+}
+
/// Invalidates cached leaf PTE entries by virtual address.
#[macro_export]
macro_rules! tlbi {
@@ -111,3 +128,16 @@
);
}
}
+
+/// Reads the number of words in the smallest cache line of all the data caches and unified caches.
+#[inline]
+pub fn min_dcache_line_size() -> usize {
+ const DMINLINE_SHIFT: usize = 16;
+ const DMINLINE_MASK: usize = 0xf;
+ let ctr_el0 = read_sysreg!("ctr_el0");
+
+ // DminLine: log2 of the number of words in the smallest cache line of all the data caches.
+ let dminline = (ctr_el0 >> DMINLINE_SHIFT) & DMINLINE_MASK;
+
+ 1 << dminline
+}