commit 66dd4fed98448d97b999af8f0e3b54a0f099b9a5
author Jiyong Park <jiyong@google.com> Tue Oct 18 13:30:49 2022 +0900
committer Jiyong Park <jiyong@google.com> Tue Oct 18 13:30:49 2022 +0900
tree 22908486f3b53521be6126f3cc341921572c2eaa
parent d3c5542a5aafd41661680652f4c8bd63f08b6233

Update kernel to builds 9186328

git log --first-parent -100 --oneline --no-decorate f1076051b3e9..116049110fe9:
116049110fe9 UPSTREAM: KVM: arm64: Enable stack protection and branch profiling for VHE
e2130dcc2740 UPSTREAM: KVM: arm64: Limit stage2_apply_range() batch size to largest block
c3feb623e558 UPSTREAM: KVM: arm64: Work out supported block level at compile time
7a3109b88269 UPSTREAM: KVM: arm64: Advertise new kvmarm mailing list
333ef9056d7d UPSTREAM: KVM: arm64: Fix comment typo in nvhe/switch.c
fbfb98ef79db UPSTREAM: KVM: arm64: Ignore kvm-arm.mode if !is_hyp_mode_available()
b0adfe8951a8 UPSTREAM: KVM: arm64: vgic: Remove duplicate check in update_affinity_collection()
6b54405d184b UPSTREAM: KVM: arm64: Clear PSTATE.SS when the Software Step state was Active-pending
bf409da6ab78 UPSTREAM: KVM: arm64: Preserve PSTATE.SS for the guest while single-step is enabled
a9758c12946e UPSTREAM: arm64/sysreg: Use feature numbering for PMU and SPE revisions
088a7845221a UPSTREAM: KVM: arm64: Treat 32bit ID registers as RAZ/WI on 64bit-only system
983d6d3ff15b UPSTREAM: KVM: arm64: Add a visibility bit to ignore user writes
d3ba4ecf56d0 UPSTREAM: KVM: arm64: Spin off helper for calling visibility hook
b6560dc8eb53 BACKPORT: KVM: arm64: Drop raz parameter from read_id_reg()
c10b44010f0d UPSTREAM: KVM: arm64: Remove internal accessor helpers for id regs
3299232ccff4 UPSTREAM: KVM: arm64: Use visibility hook to treat ID regs as RAZ
d01fe592078c BACKPORT: arm64: cache: Remove unused CTR_CACHE_MINLINE_MASK
3130e8d2c935 UPSTREAM: arm64/sysreg: Fix a few missed conversions
d6a1f7790572 UPSTREAM: arm64/sysreg: Add _EL1 into ID_AA64DFR0_EL1 definition names
4324ec29f654 UPSTREAM: arm64/sysreg: Align field names in ID_AA64DFR0_EL1 with architecture
c023354bb307 UPSTREAM: arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 SME enumeration
0790b96bc276 UPSTREAM: arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 BTI enumeration
fd6970e8123f UPSTREAM: arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 fractional version fields
76eac5d39473 UPSTREAM: arm64/sysreg: Standardise naming for MTE feature enumeration
09e8085abe9e UPSTREAM: arm64/sysreg: Standardise naming for SSBS feature enumeration
a28f8e2ec6b4 UPSTREAM: arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1.AdvSIMD constants
48bcf915c0f5 UPSTREAM: arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1 constants
510b36408e5d UPSTREAM: arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.CnP
bd568d48d365 BACKPORT: arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.VARange
89388ad4f49e BACKPORT: arm64/sysreg: Standardise naming for ID_AA64MMFR1_EL1 fields
475c494b5d5d UPSTREAM: arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.ASIDBits
665c8a7a28a9 UPSTREAM: arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.BigEnd
44fc6ed1b20d BACKPORT: arm64/sysreg: Add _EL1 into ID_AA64PFR1_EL1 constant names
71e184180a5d BACKPORT: arm64/sysreg: Add _EL1 into ID_AA64PFR0_EL1 definition names
0cb0fd4d2f6b BACKPORT: arm64/sysreg: Add _EL1 into ID_AA64MMFR2_EL1 definition names
def82c15a779 BACKPORT: arm64/sysreg: Add _EL1 into ID_AA64MMFR0_EL1 definition names
61157226850c UPSTREAM: arm64/sysreg: Add _EL1 into ID_AA64ISAR2_EL1 definition names
0994f3c72a34 UPSTREAM: arm64/sysreg: Make BHB clear feature defines match the architecture
a8d83396fdb5 BACKPORT: arm64/sysreg: Add _EL1 into ID_AA64ISAR1_EL1 definition names
8941f2e9f0ee UPSTREAM: arm64/idreg: Fix tab/space damage
2796fe818d58 UPSTREAM: arm64/sysreg: Align pointer auth enumeration defines with architecture
0def03eb82a3 UPSTREAM: arm64/sysreg: Standardise naming for ID_AA64ZFR0_EL1 fields
3ffaa9a1b0a0 UPSTREAM: arm64/sysreg: Standardise naming for ID_AA64SMFR0_EL1 enums
bf808e9dca60 UPSTREAM: arm64/sme: Fix tests for 0b1111 value ID registers
6e316bd046ba UPSTREAM: arm64/sysreg: Standardise naming for WFxT defines
dc164e3eb420 UPSTREAM: arm64/mte: Standardise GMID field name definitions
bb12726e3445 UPSTREAM: arm64/sysreg: Standardise naming for DCZID_EL0 field names
f660cd96148d BACKPORT: arm64/sysreg: Standardise naming for CTR_EL0 fields
984225b8a51c BACKPORT: arm64/cache: Restrict which headers are included in __ASSEMBLY__
291512c539b9 UPSTREAM: arm64/cpuinfo: Remove references to reserved cache type
1baa454b7358 UPSTREAM: arm64/sysreg: Standardise ID_AA64ISAR0_EL1 macro names
162f7a4408b2 UPSTREAM: arm64: Update name of ID_AA64ISAR0_EL1_ATOMIC to reflect ARM
2533256a0e8b UPSTREAM: arm64/sysreg: Guard SYS_FIELD_ macros for asm
9279a569a08d UPSTREAM: arm64/sysreg: Directly include bitfield.h
501dae30058b UPSTREAM: arm64/sysreg: Add SYS_FIELD_GET() helper
1bf4f91abe97 UPSTREAM: arm64/sysreg: Introduce helpers for access to sysreg fields
eb06a93511b0 UPSTREAM: arm64: mm: Use asid feature macro for cheanup
0c91703048ab Merge 5.15.74 into android14-5.15
bc65b070e0e9 ANDROID: clang: update to 15.0.2
2120596d67ea FROMLIST: ARM: NWFPE: avoid compiler-generated __aeabi_uldivmod
6cc9804268ae Merge 5.15.73 into android14-5.15

Test: treehugger
Bug: 233192153
Change-Id: I4ede864d93089ef8029eef4acded23b34b7514c1

microdroid/kernel/arm64/System.map

diff --git a/microdroid/kernel/arm64/System.map b/microdroid/kernel/arm64/System.map
index 0f75562..7aa1208 100644
--- a/microdroid/kernel/arm64/System.map
+++ b/microdroid/kernel/arm64/System.map
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-ffffffc0085489b8 T pci_find_host_bridge
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-ffffffc008550c08 T __pci_reset_function_locked
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-ffffffc0085517f8 T pcix_get_max_mmrbc
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-ffffffc008552744 W pcibios_default_alignment
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-ffffffc008552b74 T pci_bus_find_domain_nr
-ffffffc008552ba0 t of_pci_bus_find_domain_nr.llvm.11761460613565418568
-ffffffc008552c88 W pci_ext_cfg_avail
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-ffffffc008553328 t pci_pme_list_scan
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-ffffffc0085534cc t reset_method_show
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-ffffffc008553748 t reset_method_store
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-ffffffc008553a38 t pci_dev_acpi_reset
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-ffffffc008553a48 t pci_af_flr
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-ffffffc008553b6c t pci_pm_reset
-ffffffc008553b6c t pci_pm_reset.a85545230febf341bc9e9721e6a728e9
-ffffffc008553ca8 t pci_reset_bus_function
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-ffffffc008553d94 t pci_bus_resetable
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-ffffffc00855418c t resource_alignment_show
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-ffffffc008554200 t resource_alignment_store
-ffffffc008554200 t resource_alignment_store.a85545230febf341bc9e9721e6a728e9
-ffffffc0085542bc T pci_add_dynid
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-ffffffc008554460 W pcibios_alloc_irq
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-ffffffc008554724 t pci_bus_match.10e5a183b7f4fc42a45cbced8c2518e4
-ffffffc008554770 t pci_uevent
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-ffffffc00855487c t pci_device_probe
-ffffffc00855487c t pci_device_probe.10e5a183b7f4fc42a45cbced8c2518e4
-ffffffc008554a2c t pci_device_remove
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-ffffffc008554b5c t pci_device_shutdown
-ffffffc008554b5c t pci_device_shutdown.10e5a183b7f4fc42a45cbced8c2518e4
-ffffffc008554bf0 t pci_bus_num_vf
-ffffffc008554bf0 t pci_bus_num_vf.10e5a183b7f4fc42a45cbced8c2518e4
-ffffffc008554c1c t pci_dma_configure
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-ffffffc008554c90 t pcie_port_bus_match
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-ffffffc008585a3c T devm_clk_get
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-ffffffc008585ae0 t devm_clk_release.6ca1f689465455bfb7baa90639a6e446
-ffffffc008585b0c T devm_clk_get_optional
-ffffffc008585bb4 T devm_clk_bulk_get
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-ffffffc008585dd0 t devm_clk_bulk_release_all.6ca1f689465455bfb7baa90639a6e446
-ffffffc008585e00 T devm_clk_put
-ffffffc008585e48 t devm_clk_match
-ffffffc008585e48 t devm_clk_match.6ca1f689465455bfb7baa90639a6e446
-ffffffc008585e78 T devm_get_clk_from_child
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-ffffffc008585f20 t devm_clk_bulk_release.6ca1f689465455bfb7baa90639a6e446
-ffffffc008585f50 T clk_bulk_put
-ffffffc008585fa4 T clk_bulk_get
-ffffffc008585fd0 t __clk_bulk_get.llvm.64802286647701771
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-ffffffc008586148 T clk_bulk_put_all
-ffffffc0085861bc T clk_bulk_get_all
-ffffffc008586340 T clk_bulk_unprepare
-ffffffc008586390 T clk_bulk_prepare
-ffffffc008586448 T clk_bulk_disable
-ffffffc008586498 T clk_bulk_enable
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-ffffffc0085866b8 T clk_get
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-ffffffc008586788 T clkdev_add
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-ffffffc008586aa0 T clk_add_alias
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-ffffffc008586c1c T clk_register_clkdev
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-ffffffc008586ec8 t devm_clk_match_clkdev
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-ffffffc008586ee0 T devm_clk_hw_register_clkdev
-ffffffc008586fcc t __clk_register_clkdev
-ffffffc0085870b0 T __traceiter_clk_enable
-ffffffc008587114 T __traceiter_clk_enable_complete
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-ffffffc0085871dc T __traceiter_clk_disable_complete
-ffffffc008587240 T __traceiter_clk_prepare
-ffffffc0085872a4 T __traceiter_clk_prepare_complete
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-ffffffc00858736c T __traceiter_clk_unprepare_complete
-ffffffc0085873d0 T __traceiter_clk_set_rate
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-ffffffc00858761c T __traceiter_clk_set_parent
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-ffffffc008587778 T __traceiter_clk_set_phase_complete
-ffffffc0085877ec T __traceiter_clk_set_duty_cycle
-ffffffc008587860 T __traceiter_clk_set_duty_cycle_complete
-ffffffc0085878d4 t trace_event_raw_event_clk
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-ffffffc0085879d8 t perf_trace_clk
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-ffffffc008587b58 t trace_event_raw_event_clk_rate
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-ffffffc008587c70 t perf_trace_clk_rate
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-ffffffc008587e00 t trace_event_raw_event_clk_rate_range
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-ffffffc008587f1c t perf_trace_clk_rate_range
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-ffffffc0085880b0 t trace_event_raw_event_clk_parent
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-ffffffc008588228 t perf_trace_clk_parent
-ffffffc008588228 t perf_trace_clk_parent.434e247945b2854ba00f1ad21e38cd79
-ffffffc00858840c t trace_event_raw_event_clk_phase
-ffffffc00858840c t trace_event_raw_event_clk_phase.434e247945b2854ba00f1ad21e38cd79
-ffffffc008588524 t perf_trace_clk_phase
-ffffffc008588524 t perf_trace_clk_phase.434e247945b2854ba00f1ad21e38cd79
-ffffffc0085886b4 t trace_event_raw_event_clk_duty_cycle
-ffffffc0085886b4 t trace_event_raw_event_clk_duty_cycle.434e247945b2854ba00f1ad21e38cd79
-ffffffc0085887d8 t perf_trace_clk_duty_cycle
-ffffffc0085887d8 t perf_trace_clk_duty_cycle.434e247945b2854ba00f1ad21e38cd79
-ffffffc008588974 T __clk_get_name
-ffffffc008588990 T clk_hw_get_name
-ffffffc0085889a4 T __clk_get_hw
-ffffffc0085889c0 T clk_hw_get_num_parents
-ffffffc0085889d4 T clk_hw_get_parent
-ffffffc0085889fc T clk_hw_get_parent_by_index
-ffffffc008588a30 t clk_core_get_parent_by_index
-ffffffc008588b60 T __clk_get_enable_count
-ffffffc008588b7c T clk_hw_get_rate
-ffffffc008588bb0 T clk_hw_get_flags
-ffffffc008588bc4 T clk_hw_is_prepared
-ffffffc008588bf4 t clk_core_is_prepared
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-ffffffc008589198 T clk_hw_set_rate_range
-ffffffc0085891b4 T __clk_mux_determine_rate
-ffffffc0085891e0 T __clk_mux_determine_rate_closest
-ffffffc00858920c T clk_rate_exclusive_put
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-ffffffc008589388 T clk_rate_exclusive_get
-ffffffc00858947c t clk_core_rate_protect
-ffffffc0085894cc T clk_unprepare
-ffffffc008589504 t clk_core_unprepare_lock
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-ffffffc0085898b0 T clk_gate_restore_context
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-ffffffc0085899c8 t clk_core_save_context
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-ffffffc008589b68 T clk_enable
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-ffffffc008589ce4 T clk_is_enabled_when_prepared
-ffffffc008589d1c T clk_sync_state
-ffffffc008589e6c t clk_unprepare_disable_dev_subtree
-ffffffc008589ef0 t clk_core_round_rate_nolock
-ffffffc00858a010 T clk_hw_round_rate
-ffffffc00858a0dc T clk_round_rate
-ffffffc00858a2b0 T clk_get_accuracy
-ffffffc00858a3cc T clk_get_rate
-ffffffc00858a504 T clk_hw_get_parent_index
-ffffffc00858a550 t clk_fetch_parent_index
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-ffffffc00858a9dc T clk_set_rate_exclusive
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-ffffffc00858adf8 T clk_set_min_rate
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-ffffffc00858b024 T clk_get_parent
-ffffffc00858b138 T clk_hw_reparent
-ffffffc00858b23c T clk_has_parent
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-ffffffc00858b314 t clk_core_set_parent_nolock
-ffffffc00858b4d8 T clk_set_parent
-ffffffc00858b620 T clk_set_phase
-ffffffc00858b788 t clk_core_set_phase_nolock
-ffffffc00858b978 T clk_get_phase
-ffffffc00858bac8 T clk_set_duty_cycle
-ffffffc00858bc40 t clk_core_set_duty_cycle_nolock
-ffffffc00858bd98 T clk_get_scaled_duty_cycle
-ffffffc00858bdc8 t clk_core_get_scaled_duty_cycle
-ffffffc00858bee8 T clk_is_match
-ffffffc00858bf34 T clk_hw_create_clk
-ffffffc00858c04c t clk_core_link_consumer
-ffffffc00858c15c T clk_hw_get_clk
-ffffffc00858c1b0 T clk_register
-ffffffc00858c1fc t __clk_register
-ffffffc00858c66c T clk_hw_register
-ffffffc00858c6c0 T of_clk_hw_register
-ffffffc00858c6fc T clk_unregister
-ffffffc00858cae0 t clk_enable_lock
-ffffffc00858cbc8 t kref_put
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-ffffffc00858cde0 t kref_put
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-ffffffc00858cfec t __clk_release
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-ffffffc00858d07c T clk_hw_unregister
-ffffffc00858d0a8 T devm_clk_register
-ffffffc00858d16c t devm_clk_unregister_cb
-ffffffc00858d16c t devm_clk_unregister_cb.434e247945b2854ba00f1ad21e38cd79
-ffffffc00858d198 T devm_clk_hw_register
-ffffffc00858d264 t devm_clk_hw_unregister_cb
-ffffffc00858d264 t devm_clk_hw_unregister_cb.434e247945b2854ba00f1ad21e38cd79
-ffffffc00858d294 T devm_clk_unregister
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-ffffffc00858d304 T devm_clk_hw_unregister
-ffffffc00858d34c t devm_clk_hw_match
-ffffffc00858d34c t devm_clk_hw_match.434e247945b2854ba00f1ad21e38cd79
-ffffffc00858d374 T devm_clk_hw_get_clk
-ffffffc00858d454 t devm_clk_release
-ffffffc00858d454 t devm_clk_release.434e247945b2854ba00f1ad21e38cd79
-ffffffc00858d480 T __clk_put
-ffffffc00858d624 T clk_notifier_register
-ffffffc00858d7e8 T clk_notifier_unregister
-ffffffc00858d9a0 T devm_clk_notifier_register
-ffffffc00858da34 t devm_clk_notifier_release
-ffffffc00858da34 t devm_clk_notifier_release.434e247945b2854ba00f1ad21e38cd79
-ffffffc00858da60 T of_clk_src_simple_get
-ffffffc00858da70 T of_clk_hw_simple_get
-ffffffc00858da80 T of_clk_src_onecell_get
-ffffffc00858dad8 T of_clk_hw_onecell_get
-ffffffc00858db30 T of_clk_add_provider
-ffffffc00858dcb0 t clk_core_reparent_orphans
-ffffffc00858dda4 T of_clk_del_provider
-ffffffc00858de70 T of_clk_add_hw_provider
-ffffffc00858dff0 T devm_of_clk_add_hw_provider
-ffffffc00858e0ec t devm_of_clk_release_provider
-ffffffc00858e0ec t devm_of_clk_release_provider.434e247945b2854ba00f1ad21e38cd79
-ffffffc00858e118 T devm_of_clk_del_provider
-ffffffc00858e1c4 t devm_clk_provider_match
-ffffffc00858e1c4 t devm_clk_provider_match.434e247945b2854ba00f1ad21e38cd79
-ffffffc00858e1f4 T of_clk_get_from_provider
-ffffffc00858e234 t of_clk_get_hw_from_clkspec.llvm.9878310160144236093
-ffffffc00858e320 T of_clk_get_hw
-ffffffc00858e44c T of_clk_get
-ffffffc00858e558 T of_clk_get_by_name
-ffffffc00858e6a4 T of_clk_get_parent_count
-ffffffc00858e6e4 T of_clk_get_parent_name
-ffffffc00858e880 T of_clk_parent_fill
-ffffffc00858e8f8 T of_clk_detect_critical
-ffffffc00858e9d4 t trace_raw_output_clk
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-ffffffc00858ea48 t trace_raw_output_clk_rate
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-ffffffc00858eac0 t trace_raw_output_clk_rate_range
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-ffffffc00858eb38 t trace_raw_output_clk_parent
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-ffffffc00858ebb4 t trace_raw_output_clk_phase
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-ffffffc00858ec2c t trace_raw_output_clk_duty_cycle
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-ffffffc00858eca4 t clk_core_get
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-ffffffc00858f6ac t trace_clk_disable_complete_rcuidle
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-ffffffc00858f8c8 t trace_clk_enable_rcuidle
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-ffffffc00858fb10 t __clk_recalc_accuracies
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-ffffffc00858fcd4 t clk_recalc
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-ffffffc008590248 t clk_change_rate
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-ffffffc008590964 t __clk_set_parent_before
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-ffffffc008590c5c t clk_core_update_orphan_status
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-ffffffc008590dc8 t __clk_set_parent
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-ffffffc008591218 t clk_debug_create_one
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-ffffffc008591490 t clk_summary_show
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-ffffffc008591604 t clk_summary_show_subtree
-ffffffc008591824 t clk_dump_open
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-ffffffc0085919e0 t clk_dump_subtree
-ffffffc008591c68 t clk_rate_fops_open
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-ffffffc008591ca8 t clk_rate_get
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-ffffffc008591cc0 t clk_rate_set
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-ffffffc008591dd4 t clk_min_rate_open
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-ffffffc008591e10 t clk_min_rate_show
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-ffffffc008591f5c t clk_max_rate_open
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-ffffffc008591f98 t clk_max_rate_show
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-ffffffc0085920e4 t clk_flags_open
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-ffffffc008592120 t clk_flags_show
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-ffffffc0085921d4 t clk_duty_cycle_open
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-ffffffc00859224c t clk_prepare_enable_fops_open
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-ffffffc00859228c t clk_prepare_enable_get
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-ffffffc0085922bc t clk_prepare_enable_set
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-ffffffc008592354 t current_parent_open
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-ffffffc0085923d4 t possible_parents_open
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-ffffffc0085924a4 t possible_parent_show
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-ffffffc008592da0 t __clk_core_update_orphan_hold_state
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-ffffffc008592e10 t clk_nodrv_disable_unprepare
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-ffffffc008592e20 t clk_nodrv_set_parent
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-ffffffc008592e30 t clk_nodrv_set_rate
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-ffffffc008592e40 t clk_core_evict_parent_cache_subtree
-ffffffc008592ed4 T divider_recalc_rate
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-ffffffc008593950 t clk_divider_round_rate
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-ffffffc008593ebc T __clk_hw_register_divider
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-ffffffc008594108 T clk_hw_unregister_divider
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-ffffffc00859424c t devm_clk_hw_release_divider
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-ffffffc00859428c t clk_factor_recalc_rate
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-ffffffc0085942a4 t clk_factor_round_rate
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-ffffffc008594320 t clk_factor_set_rate
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-ffffffc008594330 T clk_hw_register_fixed_factor
-ffffffc008594474 T clk_register_fixed_factor
-ffffffc0085944a8 T clk_unregister_fixed_factor
-ffffffc0085944f4 T clk_hw_unregister_fixed_factor
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-ffffffc008594684 t _of_fixed_factor_clk_setup
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-ffffffc0085948c0 t of_fixed_factor_clk_probe
-ffffffc0085948c0 t of_fixed_factor_clk_probe.a117d2432262fb6e5cb8565fa101225e
-ffffffc008594908 t of_fixed_factor_clk_remove
-ffffffc008594908 t of_fixed_factor_clk_remove.a117d2432262fb6e5cb8565fa101225e
-ffffffc008594954 t clk_fixed_rate_recalc_rate
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-ffffffc008594964 t clk_fixed_rate_recalc_accuracy
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-ffffffc008594984 T __clk_hw_register_fixed_rate
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microdroid/kernel/arm64/kernel-5.15

diff --git a/microdroid/kernel/arm64/kernel-5.15 b/microdroid/kernel/arm64/kernel-5.15
index 44c9e6e..7d6d93a 100644
--- a/microdroid/kernel/arm64/kernel-5.15
+++ b/microdroid/kernel/arm64/kernel-5.15
Binary files differ

microdroid/kernel/arm64/kernel-5.15-gz

diff --git a/microdroid/kernel/arm64/kernel-5.15-gz b/microdroid/kernel/arm64/kernel-5.15-gz
index bcfc63d..409c8fa 100644
--- a/microdroid/kernel/arm64/kernel-5.15-gz
+++ b/microdroid/kernel/arm64/kernel-5.15-gz
Binary files differ

microdroid/kernel/arm64/kernel-5.15-lz4

diff --git a/microdroid/kernel/arm64/kernel-5.15-lz4 b/microdroid/kernel/arm64/kernel-5.15-lz4
index 15c845b..38808bf 100644
--- a/microdroid/kernel/arm64/kernel-5.15-lz4
+++ b/microdroid/kernel/arm64/kernel-5.15-lz4
Binary files differ

microdroid/kernel/arm64/prebuilt-info.txt

diff --git a/microdroid/kernel/arm64/prebuilt-info.txt b/microdroid/kernel/arm64/prebuilt-info.txt
index f0cf412..1272594 100644
--- a/microdroid/kernel/arm64/prebuilt-info.txt
+++ b/microdroid/kernel/arm64/prebuilt-info.txt
@@ -1,3 +1,3 @@
 {
-    "kernel-build-id": 9170280
+    "kernel-build-id": 9186328
 }