Merge changes I9980d82c,I8c9eb371,I6d737a0c

* changes:
  vmbase: entry.S: Reset if relocated
  vmbase: Introduce the reset_or_hang macro
  vmbase: Introduce common.h for assembly code
diff --git a/vmbase/common.h b/vmbase/common.h
new file mode 100644
index 0000000..788dcf0
--- /dev/null
+++ b/vmbase/common.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2022 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#pragma once
+
+#define PSCI_SYSTEM_RESET (0x84000009)
+
+.macro adr_l, reg:req, sym:req
+	adrp \reg, \sym
+	add \reg, \reg, :lo12:\sym
+.endm
+
+.macro mov_i, reg:req, imm:req
+	movz \reg, :abs_g3:\imm
+	movk \reg, :abs_g2_nc:\imm
+	movk \reg, :abs_g1_nc:\imm
+	movk \reg, :abs_g0_nc:\imm
+.endm
+
+.macro reset_or_hang
+	mov_i x0, PSCI_SYSTEM_RESET
+	hvc 0
+999:	wfi
+	b 999b
+.endm
diff --git a/vmbase/entry.S b/vmbase/entry.S
index 75ab90b..5f0a2ce 100644
--- a/vmbase/entry.S
+++ b/vmbase/entry.S
@@ -14,17 +14,7 @@
  * limitations under the License.
  */
 
-.macro adr_l, reg:req, sym:req
-	adrp \reg, \sym
-	add \reg, \reg, :lo12:\sym
-.endm
-
-.macro mov_i, reg:req, imm:req
-	movz \reg, :abs_g3:\imm
-	movk \reg, :abs_g2_nc:\imm
-	movk \reg, :abs_g1_nc:\imm
-	movk \reg, :abs_g0_nc:\imm
-.endm
+#include <common.h>
 
 .set .L_MAIR_DEV_nGnRE,	0x04
 .set .L_MAIR_MEM_WBWA,	0xff
@@ -95,6 +85,16 @@
 	adr x30, vector_table_panic
 	msr vbar_el1, x30
 
+	/*
+	 * Our load address is set by the host so validate it before proceeding.
+	 */
+	adr x30, entry
+	mov_i x29, entry
+	cmp x29, x30
+	b.eq 1f
+	reset_or_hang
+1:
+
 	adrp x30, idmap
 	msr ttbr0_el1, x30
 
diff --git a/vmbase/exceptions_panic.S b/vmbase/exceptions_panic.S
index 4a3f2db..54735b2 100644
--- a/vmbase/exceptions_panic.S
+++ b/vmbase/exceptions_panic.S
@@ -14,6 +14,8 @@
  * limitations under the License.
  */
 
+#include <common.h>
+
 /**
  * The following table is intended to trap any fault resulting from the very
  * first memory accesses. They assume that PSCI v0.2 is available and provides
@@ -21,80 +23,69 @@
  * results in the core busy-looping.
  */
 
-.macro exception_panic
-	mov	x0, 0x84000000
-	movk	x0, 9
-	mov	x1, 0
-	mov	x2, 0
-	mov	x3, 0
-	hvc	0
-0:	wfi
-	b	0b
-.endm
-
 .section .text.vector_table_panic, "ax"
 .global vector_table_panic
 .balign 0x800
 vector_table_panic:
 sync_cur_sp0_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 irq_cur_sp0_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 fiq_cur_sp0_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 serr_cur_sp0_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 sync_cur_spx_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 irq_cur_spx_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 fiq_cur_spx_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 serr_cur_spx_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 sync_lower_64_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 irq_lower_64_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 fiq_lower_64_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 serr_lower_64_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 sync_lower_32_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 irq_lower_32_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 fiq_lower_32_panic:
-	exception_panic
+	reset_or_hang
 
 .balign 0x80
 serr_lower_32_panic:
-	exception_panic
+	reset_or_hang