pvmfw: Manage dirty state in hardware if possible
Manage dirty state in hardware on devices that support `FEAT_HAFDBS`.
Check presence of feature and enable dirty state management in TCR_EL1.
Bug: 269738062
Test: atest MicrodroidTestApp
Change-Id: If9044702a02fa2f29a747d9d80cc958773bdfe17
diff --git a/pvmfw/src/helpers.rs b/pvmfw/src/helpers.rs
index 4b669d7..9c4cb1b 100644
--- a/pvmfw/src/helpers.rs
+++ b/pvmfw/src/helpers.rs
@@ -187,6 +187,16 @@
}};
}
+/// Returns `true` if hardware dirty state management is available.
+pub fn dbm_available() -> bool {
+ if !cfg!(feature = "cpu_feat_hafdbs") {
+ return false;
+ }
+ // Hardware dirty bit management available flag (ID_AA64MMFR1_EL1.HAFDBS[1])
+ const DBM_AVAILABLE: usize = 1 << 1;
+ read_sysreg!("id_aa64mmfr1_el1") & DBM_AVAILABLE != 0
+}
+
/// Executes a data synchronization barrier.
#[macro_export]
macro_rules! dsb {