Check correct bit for PCI range prefetchable attribute.
This seems to have been wrong the whole time.
Test: vmbase_example.integration_test
Change-Id: I88ec99392905ad8fdfb998ba8f6247e2ffd8d444
diff --git a/guest/pvmfw/src/fdt.rs b/guest/pvmfw/src/fdt.rs
index 939a4ea..953fdae 100644
--- a/guest/pvmfw/src/fdt.rs
+++ b/guest/pvmfw/src/fdt.rs
@@ -593,7 +593,6 @@
) -> Result<(), RebootReason> {
let mem_flags = PciMemoryFlags(range.addr.0);
let range_type = mem_flags.range_type();
- let prefetchable = mem_flags.prefetchable();
let bus_addr = range.addr.1;
let cpu_addr = range.parent_addr;
let size = range.size;
@@ -602,10 +601,6 @@
error!("Invalid range type {:?} for bus address {:#x} in PCI node", range_type, bus_addr);
return Err(RebootReason::InvalidFdt);
}
- if prefetchable {
- error!("PCI bus address {:#x} in PCI node is prefetchable", bus_addr);
- return Err(RebootReason::InvalidFdt);
- }
// Enforce ID bus-to-cpu mappings, as used by crosvm.
if bus_addr != cpu_addr {
error!("PCI bus address: {:#x} is different from CPU address: {:#x}", bus_addr, cpu_addr);
diff --git a/libs/fdtpci/src/lib.rs b/libs/fdtpci/src/lib.rs
index 602f736..bdd904f 100644
--- a/libs/fdtpci/src/lib.rs
+++ b/libs/fdtpci/src/lib.rs
@@ -206,7 +206,7 @@
impl PciMemoryFlags {
/// Returns whether this PCI range is prefetchable
pub fn prefetchable(self) -> bool {
- self.0 & 0x80000000 != 0
+ self.0 & 0x40000000 != 0
}
/// Returns the type of this PCI range