pvmfw: Fix /cpus/cpu@X using non-hex @unit-address
Match what crosvm generates and what the kernel documentation mandates.
Note that this hasn't affected AVF pVMs because we never boot with 10+
vCPUs.
Test: TH
Bug: 331408546
Change-Id: I019cb1211c6c1fc85c3432d3c42c2fb43ed9a7ed
diff --git a/pvmfw/platform.dts b/pvmfw/platform.dts
index 8074188..e63e42f 100644
--- a/pvmfw/platform.dts
+++ b/pvmfw/platform.dts
@@ -84,7 +84,7 @@
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <0>;
+ reg = <0x0>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table0>;
opp_table0: opp-table-0 {
@@ -116,7 +116,7 @@
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <1>;
+ reg = <0x1>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table1>;
opp_table1: opp-table-1 {
@@ -148,7 +148,7 @@
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <2>;
+ reg = <0x2>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table2>;
opp_table2: opp-table-2 {
@@ -180,7 +180,7 @@
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <3>;
+ reg = <0x3>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table3>;
opp_table3: opp-table-3 {
@@ -212,7 +212,7 @@
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <4>;
+ reg = <0x4>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table4>;
opp_table4: opp-table-4 {
@@ -244,7 +244,7 @@
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <5>;
+ reg = <0x5>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table5>;
opp_table5: opp-table-5 {
@@ -276,7 +276,7 @@
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <6>;
+ reg = <0x6>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table6>;
opp_table6: opp-table-6 {
@@ -308,7 +308,7 @@
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <7>;
+ reg = <0x7>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table7>;
opp_table7: opp-table-7 {
@@ -340,7 +340,7 @@
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <8>;
+ reg = <0x8>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table8>;
opp_table8: opp-table-8 {
@@ -372,7 +372,7 @@
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <9>;
+ reg = <0x9>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table9>;
opp_table9: opp-table-9 {
@@ -400,11 +400,11 @@
opp20 { opp-hz = <PLACEHOLDER2>; };
};
};
- cpu10: cpu@10 {
+ cpu10: cpu@a {
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <10>;
+ reg = <0xa>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table10>;
opp_table10: opp-table-10 {
@@ -432,11 +432,11 @@
opp20 { opp-hz = <PLACEHOLDER2>; };
};
};
- cpu11: cpu@11 {
+ cpu11: cpu@b {
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <11>;
+ reg = <0xb>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table11>;
opp_table11: opp-table-11 {
@@ -464,11 +464,11 @@
opp20 { opp-hz = <PLACEHOLDER2>; };
};
};
- cpu12: cpu@12 {
+ cpu12: cpu@c {
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <12>;
+ reg = <0xc>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table12>;
opp_table12: opp-table-12 {
@@ -496,11 +496,11 @@
opp20 { opp-hz = <PLACEHOLDER2>; };
};
};
- cpu13: cpu@13 {
+ cpu13: cpu@d {
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <13>;
+ reg = <0xd>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table13>;
opp_table13: opp-table-13 {
@@ -528,11 +528,11 @@
opp20 { opp-hz = <PLACEHOLDER2>; };
};
};
- cpu14: cpu@14 {
+ cpu14: cpu@e {
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <14>;
+ reg = <0xe>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table14>;
opp_table14: opp-table-14 {
@@ -560,11 +560,11 @@
opp20 { opp-hz = <PLACEHOLDER2>; };
};
};
- cpu15: cpu@15 {
+ cpu15: cpu@f {
device_type = "cpu";
compatible = "arm,arm-v8";
enable-method = "psci";
- reg = <15>;
+ reg = <0xf>;
capacity-dmips-mhz = <PLACEHOLDER>;
operating-points-v2 = <&opp_table15>;
opp_table15: opp-table-15 {