commit 1a3de7fa5592bbd8042be17430bae6b19af72f0a
author Treehugger Robot <android-test-infra-autosubmit@system.gserviceaccount.com> Tue Jun 06 14:15:07 2023 +0000
committer Gerrit Code Review <noreply-gerritcodereview@google.com> Tue Jun 06 14:15:07 2023 +0000
tree 6aa4e40e237e6cb04b3fc5b229f3de16e5c3da48
parent 81e8f1421ddd0980464eb2e03f4c9f1c095e7b3b
parent 4b3cc1199cf6d10faf4c6e650dd7a944bd0ccda6

Merge "[pvmfw][vmbase] Add constant PAGE_SIZE to vmbase"

pvmfw/src/helpers.rs

diff --git a/pvmfw/src/helpers.rs b/pvmfw/src/helpers.rs
index 07b3e28..b22acc1 100644
--- a/pvmfw/src/helpers.rs
+++ b/pvmfw/src/helpers.rs
@@ -15,10 +15,10 @@
 //! Miscellaneous helper functions.
 
 use core::ops::Range;
-use vmbase::memory::SIZE_4KB;
+use vmbase::memory::{PAGE_SIZE, SIZE_4KB};
 
 pub const GUEST_PAGE_SIZE: usize = SIZE_4KB;
-pub const PVMFW_PAGE_SIZE: usize = SIZE_4KB;
+pub const PVMFW_PAGE_SIZE: usize = PAGE_SIZE;
 
 /// Trait to check containment of one range within another.
 pub(crate) trait RangeExt {

rialto/src/main.rs

diff --git a/rialto/src/main.rs b/rialto/src/main.rs
index 30bc5b0..77044a2 100644
--- a/rialto/src/main.rs
+++ b/rialto/src/main.rs
@@ -29,10 +29,13 @@
 use fdtpci::PciInfo;
 use hyp::get_hypervisor;
 use log::{debug, error, info};
-use vmbase::{layout, main, memory::PageTable, power::reboot};
+use vmbase::{
+    layout, main,
+    memory::{PageTable, PAGE_SIZE},
+    power::reboot,
+};
 
 const SZ_1K: usize = 1024;
-const SZ_4K: usize = 4 * SZ_1K;
 const SZ_64K: usize = 64 * SZ_1K;
 const SZ_1M: usize = 1024 * SZ_1K;
 const SZ_1G: usize = 1024 * SZ_1M;
@@ -60,7 +63,7 @@
     // The first 1 GiB of address space is used by crosvm for MMIO.
     page_table.map_device(&(0..SZ_1G))?;
     page_table.map_data(&layout::scratch_range())?;
-    page_table.map_data(&layout::stack_range(40 * SZ_4K))?;
+    page_table.map_data(&layout::stack_range(40 * PAGE_SIZE))?;
     page_table.map_code(&layout::text_range())?;
     page_table.map_rodata(&layout::rodata_range())?;
     page_table.map_device(&layout::console_uart_range())?;

vmbase/src/memory/mod.rs

diff --git a/vmbase/src/memory/mod.rs b/vmbase/src/memory/mod.rs
index e5e0305..13f1af5 100644
--- a/vmbase/src/memory/mod.rs
+++ b/vmbase/src/memory/mod.rs
@@ -24,5 +24,5 @@
 pub use shared::MemorySharer;
 pub use util::{
     flush, flushed_zeroize, min_dcache_line_size, page_4kb_of, phys_to_virt, virt_to_phys,
-    SIZE_2MB, SIZE_4KB, SIZE_4MB,
+    PAGE_SIZE, SIZE_2MB, SIZE_4KB, SIZE_4MB,
 };

vmbase/src/memory/util.rs

diff --git a/vmbase/src/memory/util.rs b/vmbase/src/memory/util.rs
index 3739d28..04d42cd 100644
--- a/vmbase/src/memory/util.rs
+++ b/vmbase/src/memory/util.rs
@@ -27,6 +27,9 @@
 /// The size of a 4MB memory in bytes.
 pub const SIZE_4MB: usize = 4 << 20;
 
+/// The page size in bytes assumed by vmbase - 4 KiB.
+pub const PAGE_SIZE: usize = SIZE_4KB;
+
 /// Reads the number of words in the smallest cache line of all the data caches and unified caches.
 #[inline]
 pub fn min_dcache_line_size() -> usize {