No need to allocate PCI BARs after all.
Apparently crosvm does this for us, so we can save a bunch of code.
Bug: 237249743
Test: Ran vmbase and pVM firmware manually
Test: atest vmbase_example.integration_test
Change-Id: I3efde5ad1af554a8a1c50fb23d6d1d1de082d25d
diff --git a/vmbase/example/src/pci.rs b/vmbase/example/src/pci.rs
index 82ea7cc..bd5b5ba 100644
--- a/vmbase/example/src/pci.rs
+++ b/vmbase/example/src/pci.rs
@@ -12,7 +12,7 @@
// See the License for the specific language governing permissions and
// limitations under the License.
-//! Functions to scan the PCI bus for VirtIO device and allocate BARs.
+//! Functions to scan the PCI bus for VirtIO device.
use aarch64_paging::paging::MemoryRegion;
use alloc::alloc::{alloc, dealloc, Layout};
@@ -21,7 +21,7 @@
use log::{debug, info};
use virtio_drivers::{
pci::{
- bus::{BarInfo, Cam, Command, DeviceFunction, MemoryBarType, PciRoot},
+ bus::{Cam, PciRoot},
virtio_device_type, PciTransport,
},
DeviceType, Hal, PhysAddr, Transport, VirtAddr, VirtIOBlk, PAGE_SIZE,
@@ -41,7 +41,7 @@
.unwrap()
}
-pub fn check_pci(reg: Reg<u64>, allocator: &mut PciMemory32Allocator) {
+pub fn check_pci(reg: Reg<u64>) {
let mut pci_root = unsafe { PciRoot::new(reg.addr as *mut u8, Cam::MmioCam) };
let mut checked_virtio_device_count = 0;
for (device_function, info) in pci_root.enumerate_bus(0) {
@@ -49,7 +49,6 @@
info!("Found {} at {}, status {:?} command {:?}", info, device_function, status, command);
if let Some(virtio_type) = virtio_device_type(&info) {
info!(" VirtIO {:?}", virtio_type);
- allocate_bars(&mut pci_root, device_function, allocator);
let mut transport =
PciTransport::new::<HalImpl>(&mut pci_root, device_function).unwrap();
info!(
@@ -152,20 +151,6 @@
pub fn get_region(&self) -> MemoryRegion {
MemoryRegion::new(self.start as usize, self.end as usize)
}
-
- /// Allocates a 32-bit memory address region for a PCI BAR of the given power-of-2 size.
- ///
- /// It will have alignment matching the size. The size must be a power of 2.
- pub fn allocate_memory_32(&mut self, size: u32) -> Option<u32> {
- assert!(size.is_power_of_two());
- let allocated_address = align_up(self.start, size);
- if allocated_address + size <= self.end {
- self.start = allocated_address + size;
- Some(allocated_address)
- } else {
- None
- }
- }
}
#[derive(Copy, Clone, Debug, Eq, PartialEq)]
@@ -188,53 +173,6 @@
}
}
-/// Allocates appropriately-sized memory regions and assigns them to the device's BARs.
-fn allocate_bars(
- root: &mut PciRoot,
- device_function: DeviceFunction,
- allocator: &mut PciMemory32Allocator,
-) {
- let mut bar_index = 0;
- while bar_index < 6 {
- let info = root.bar_info(device_function, bar_index).unwrap();
- debug!("BAR {}: {}", bar_index, info);
- // Ignore I/O bars, as they aren't required for the VirtIO driver.
- if let BarInfo::Memory { address_type, size, .. } = info {
- match address_type {
- _ if size == 0 => {}
- MemoryBarType::Width32 => {
- let address = allocator.allocate_memory_32(size).unwrap();
- debug!("Allocated address {:#010x}", address);
- root.set_bar_32(device_function, bar_index, address);
- }
- MemoryBarType::Width64 => {
- let address = allocator.allocate_memory_32(size).unwrap();
- debug!("Allocated address {:#010x}", address);
- root.set_bar_64(device_function, bar_index, address.into());
- }
- _ => panic!("Memory BAR address type {:?} not supported.", address_type),
- }
- }
-
- bar_index += 1;
- if info.takes_two_entries() {
- bar_index += 1;
- }
- }
-
- // Enable the device to use its BARs.
- root.set_command(
- device_function,
- Command::IO_SPACE | Command::MEMORY_SPACE | Command::BUS_MASTER,
- );
- let (status, command) = root.get_status_command(device_function);
- debug!("Allocated BARs and enabled device, status {:?} command {:?}", status, command);
-}
-
-const fn align_up(value: u32, alignment: u32) -> u32 {
- ((value - 1) | (alignment - 1)) + 1
-}
-
struct HalImpl;
impl Hal for HalImpl {