No need to allocate PCI BARs after all.
Apparently crosvm does this for us, so we can save a bunch of code.
Bug: 237249743
Test: Ran vmbase and pVM firmware manually
Test: atest vmbase_example.integration_test
Change-Id: I3efde5ad1af554a8a1c50fb23d6d1d1de082d25d
diff --git a/vmbase/example/src/main.rs b/vmbase/example/src/main.rs
index 96c10a4..888f273 100644
--- a/vmbase/example/src/main.rs
+++ b/vmbase/example/src/main.rs
@@ -82,7 +82,7 @@
// access it; maybe there is some new version of PCI we don't know about.
assert_eq!(pci_reg.size.unwrap(), AARCH64_PCI_CFG_SIZE);
// Parse ranges property to find memory ranges from which to allocate PCI BARs.
- let mut pci_allocator = PciMemory32Allocator::for_pci_ranges(&pci_node);
+ let pci_allocator = PciMemory32Allocator::for_pci_ranges(&pci_node);
modify_fdt(fdt);
@@ -139,7 +139,7 @@
check_data();
check_dice();
- check_pci(pci_reg, &mut pci_allocator);
+ check_pci(pci_reg);
}
fn check_stack_guard() {