commit b51bd6f6114b46540c2923b4ac5189a4065f820b
author Jiyong Park <jiyong@google.com> Tue Oct 18 13:30:52 2022 +0900
committer Jiyong Park <jiyong@google.com> Tue Oct 18 13:30:52 2022 +0900
tree 8a43a43c97ec01376f3e6d694b0b30ff37877cde
parent 66dd4fed98448d97b999af8f0e3b54a0f099b9a5

Update kernel to builds 9186328

git log --first-parent -100 --oneline --no-decorate f1076051b3e9..116049110fe9:
116049110fe9 UPSTREAM: KVM: arm64: Enable stack protection and branch profiling for VHE
e2130dcc2740 UPSTREAM: KVM: arm64: Limit stage2_apply_range() batch size to largest block
c3feb623e558 UPSTREAM: KVM: arm64: Work out supported block level at compile time
7a3109b88269 UPSTREAM: KVM: arm64: Advertise new kvmarm mailing list
333ef9056d7d UPSTREAM: KVM: arm64: Fix comment typo in nvhe/switch.c
fbfb98ef79db UPSTREAM: KVM: arm64: Ignore kvm-arm.mode if !is_hyp_mode_available()
b0adfe8951a8 UPSTREAM: KVM: arm64: vgic: Remove duplicate check in update_affinity_collection()
6b54405d184b UPSTREAM: KVM: arm64: Clear PSTATE.SS when the Software Step state was Active-pending
bf409da6ab78 UPSTREAM: KVM: arm64: Preserve PSTATE.SS for the guest while single-step is enabled
a9758c12946e UPSTREAM: arm64/sysreg: Use feature numbering for PMU and SPE revisions
088a7845221a UPSTREAM: KVM: arm64: Treat 32bit ID registers as RAZ/WI on 64bit-only system
983d6d3ff15b UPSTREAM: KVM: arm64: Add a visibility bit to ignore user writes
d3ba4ecf56d0 UPSTREAM: KVM: arm64: Spin off helper for calling visibility hook
b6560dc8eb53 BACKPORT: KVM: arm64: Drop raz parameter from read_id_reg()
c10b44010f0d UPSTREAM: KVM: arm64: Remove internal accessor helpers for id regs
3299232ccff4 UPSTREAM: KVM: arm64: Use visibility hook to treat ID regs as RAZ
d01fe592078c BACKPORT: arm64: cache: Remove unused CTR_CACHE_MINLINE_MASK
3130e8d2c935 UPSTREAM: arm64/sysreg: Fix a few missed conversions
d6a1f7790572 UPSTREAM: arm64/sysreg: Add _EL1 into ID_AA64DFR0_EL1 definition names
4324ec29f654 UPSTREAM: arm64/sysreg: Align field names in ID_AA64DFR0_EL1 with architecture
c023354bb307 UPSTREAM: arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 SME enumeration
0790b96bc276 UPSTREAM: arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 BTI enumeration
fd6970e8123f UPSTREAM: arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 fractional version fields
76eac5d39473 UPSTREAM: arm64/sysreg: Standardise naming for MTE feature enumeration
09e8085abe9e UPSTREAM: arm64/sysreg: Standardise naming for SSBS feature enumeration
a28f8e2ec6b4 UPSTREAM: arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1.AdvSIMD constants
48bcf915c0f5 UPSTREAM: arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1 constants
510b36408e5d UPSTREAM: arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.CnP
bd568d48d365 BACKPORT: arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.VARange
89388ad4f49e BACKPORT: arm64/sysreg: Standardise naming for ID_AA64MMFR1_EL1 fields
475c494b5d5d UPSTREAM: arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.ASIDBits
665c8a7a28a9 UPSTREAM: arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.BigEnd
44fc6ed1b20d BACKPORT: arm64/sysreg: Add _EL1 into ID_AA64PFR1_EL1 constant names
71e184180a5d BACKPORT: arm64/sysreg: Add _EL1 into ID_AA64PFR0_EL1 definition names
0cb0fd4d2f6b BACKPORT: arm64/sysreg: Add _EL1 into ID_AA64MMFR2_EL1 definition names
def82c15a779 BACKPORT: arm64/sysreg: Add _EL1 into ID_AA64MMFR0_EL1 definition names
61157226850c UPSTREAM: arm64/sysreg: Add _EL1 into ID_AA64ISAR2_EL1 definition names
0994f3c72a34 UPSTREAM: arm64/sysreg: Make BHB clear feature defines match the architecture
a8d83396fdb5 BACKPORT: arm64/sysreg: Add _EL1 into ID_AA64ISAR1_EL1 definition names
8941f2e9f0ee UPSTREAM: arm64/idreg: Fix tab/space damage
2796fe818d58 UPSTREAM: arm64/sysreg: Align pointer auth enumeration defines with architecture
0def03eb82a3 UPSTREAM: arm64/sysreg: Standardise naming for ID_AA64ZFR0_EL1 fields
3ffaa9a1b0a0 UPSTREAM: arm64/sysreg: Standardise naming for ID_AA64SMFR0_EL1 enums
bf808e9dca60 UPSTREAM: arm64/sme: Fix tests for 0b1111 value ID registers
6e316bd046ba UPSTREAM: arm64/sysreg: Standardise naming for WFxT defines
dc164e3eb420 UPSTREAM: arm64/mte: Standardise GMID field name definitions
bb12726e3445 UPSTREAM: arm64/sysreg: Standardise naming for DCZID_EL0 field names
f660cd96148d BACKPORT: arm64/sysreg: Standardise naming for CTR_EL0 fields
984225b8a51c BACKPORT: arm64/cache: Restrict which headers are included in __ASSEMBLY__
291512c539b9 UPSTREAM: arm64/cpuinfo: Remove references to reserved cache type
1baa454b7358 UPSTREAM: arm64/sysreg: Standardise ID_AA64ISAR0_EL1 macro names
162f7a4408b2 UPSTREAM: arm64: Update name of ID_AA64ISAR0_EL1_ATOMIC to reflect ARM
2533256a0e8b UPSTREAM: arm64/sysreg: Guard SYS_FIELD_ macros for asm
9279a569a08d UPSTREAM: arm64/sysreg: Directly include bitfield.h
501dae30058b UPSTREAM: arm64/sysreg: Add SYS_FIELD_GET() helper
1bf4f91abe97 UPSTREAM: arm64/sysreg: Introduce helpers for access to sysreg fields
eb06a93511b0 UPSTREAM: arm64: mm: Use asid feature macro for cheanup
0c91703048ab Merge 5.15.74 into android14-5.15
bc65b070e0e9 ANDROID: clang: update to 15.0.2
2120596d67ea FROMLIST: ARM: NWFPE: avoid compiler-generated __aeabi_uldivmod
6cc9804268ae Merge 5.15.73 into android14-5.15

Test: treehugger
Bug: 233192153
Change-Id: Idc4a6ebde4f4608032a86eefb919a0c8d3e3aaec