diff --git a/audio/core/4.0/vts/functional/AudioPrimaryHidlHalTest.cpp b/audio/core/4.0/vts/functional/AudioPrimaryHidlHalTest.cpp
index de0df40..0bf32b5 100644
--- a/audio/core/4.0/vts/functional/AudioPrimaryHidlHalTest.cpp
+++ b/audio/core/4.0/vts/functional/AudioPrimaryHidlHalTest.cpp
@@ -74,6 +74,7 @@
 using ReadStatus = ::android::hardware::audio::V4_0::IStreamIn::ReadStatus;
 using ::android::hardware::audio::V4_0::IStreamOut;
 using ::android::hardware::audio::V4_0::IStreamOutCallback;
+using ::android::hardware::audio::V4_0::MicrophoneInfo;
 using ::android::hardware::audio::V4_0::MmapBufferInfo;
 using ::android::hardware::audio::V4_0::MmapPosition;
 using ::android::hardware::audio::V4_0::ParameterValue;
@@ -478,6 +479,17 @@
 }
 
 //////////////////////////////////////////////////////////////////////////////
+/////////////////////////////// getMicrophones ///////////////////////////////
+//////////////////////////////////////////////////////////////////////////////
+
+TEST_F(AudioPrimaryHidlTest, GetMicrophonesTest) {
+    doc::test("Make sure getMicrophones always succeeds");
+    hidl_vec<MicrophoneInfo> microphones;
+    ASSERT_OK(device->getMicrophones(returnIn(res, microphones)));
+    ASSERT_OK(res);
+}
+
+//////////////////////////////////////////////////////////////////////////////
 //////////////////////////////// debugDebug //////////////////////////////////
 //////////////////////////////////////////////////////////////////////////////
 
@@ -1081,6 +1093,14 @@
     ASSERT_OK(stream->updateSinkMetadata(initialMetadata));
 }
 
+TEST_P(InputStreamTest, getActiveMicrophones) {
+    doc::test("Getting active microphones should always succeed");
+    hidl_vec<MicrophoneInfo> microphones;
+    ASSERT_OK(device->getMicrophones(returnIn(res, microphones)));
+    ASSERT_OK(res);
+    ASSERT_TRUE(microphones.size() > 0);
+}
+
 //////////////////////////////////////////////////////////////////////////////
 ///////////////////////////////// StreamOut //////////////////////////////////
 //////////////////////////////////////////////////////////////////////////////
diff --git a/audio/core/all-versions/default/include/core/all-versions/default/Conversions.impl.h b/audio/core/all-versions/default/include/core/all-versions/default/Conversions.impl.h
index 004a99e..5828c3f 100644
--- a/audio/core/all-versions/default/include/core/all-versions/default/Conversions.impl.h
+++ b/audio/core/all-versions/default/include/core/all-versions/default/Conversions.impl.h
@@ -18,6 +18,8 @@
 
 #include <stdio.h>
 
+#include <log/log.h>
+
 namespace android {
 namespace hardware {
 namespace audio {
@@ -108,6 +110,9 @@
             return AudioMicrophoneChannelMapping::DIRECT;
         case AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED:
             return AudioMicrophoneChannelMapping::PROCESSED;
+        default:
+            ALOGE("Invalid channel mapping type: %d", mapping);
+            return AudioMicrophoneChannelMapping::UNUSED;
     }
 }
 
diff --git a/automotive/vehicle/2.0/default/impl/vhal_v2_0/DefaultConfig.h b/automotive/vehicle/2.0/default/impl/vhal_v2_0/DefaultConfig.h
index 56813ce..48ee1bb 100644
--- a/automotive/vehicle/2.0/default/impl/vhal_v2_0/DefaultConfig.h
+++ b/automotive/vehicle/2.0/default/impl/vhal_v2_0/DefaultConfig.h
@@ -242,17 +242,18 @@
          },
      .initialValue = {.int32Values = {0, 0, 0}}},
 
-    {.config =
-         {
-             .prop = toInt(VehicleProperty::HVAC_POWER_ON),
-             .access = VehiclePropertyAccess::READ_WRITE,
-             .changeMode = VehiclePropertyChangeMode::ON_CHANGE,
-             .areaConfigs = {VehicleAreaConfig{
-                 .areaId = (VehicleAreaSeat::ROW_1_LEFT | VehicleAreaSeat::ROW_1_RIGHT)}},
-             // TODO(bryaneyler): Ideally, this is generated dynamically from
-             // kHvacPowerProperties.
-             .configString = "0x12400500,0x12400501"  // HVAC_FAN_SPEED,HVAC_FAN_DIRECTION
-         },
+    {.config = {.prop = toInt(VehicleProperty::HVAC_POWER_ON),
+                .access = VehiclePropertyAccess::READ_WRITE,
+                .changeMode = VehiclePropertyChangeMode::ON_CHANGE,
+                .areaConfigs = {VehicleAreaConfig{
+                    .areaId = (VehicleAreaSeat::ROW_1_LEFT | VehicleAreaSeat::ROW_1_RIGHT)}},
+                // TODO(bryaneyler): Ideally, this is generated dynamically from
+                // kHvacPowerProperties.
+                .configArray =
+                    {
+                        0x12400500,  // HVAC_FAN_SPEED
+                        0x12400501   // HVAC_FAN_DIRECTION
+                    }},
      .initialValue = {.int32Values = {1}}},
 
     {
diff --git a/camera/device/3.2/default/CameraDeviceSession.cpp b/camera/device/3.2/default/CameraDeviceSession.cpp
index 60a57cd..1cef882 100644
--- a/camera/device/3.2/default/CameraDeviceSession.cpp
+++ b/camera/device/3.2/default/CameraDeviceSession.cpp
@@ -393,7 +393,11 @@
         return;
     }
 
-    mCallback->notify(batch->mShutterMsgs);
+    auto ret = mCallback->notify(batch->mShutterMsgs);
+    if (!ret.isOk()) {
+        ALOGE("%s: notify shutter transaction failed: %s",
+                __FUNCTION__, ret.description().c_str());
+    }
     batch->mShutterDelivered = true;
     batch->mShutterMsgs.clear();
 }
@@ -563,7 +567,11 @@
 }
 
 void CameraDeviceSession::ResultBatcher::notifySingleMsg(NotifyMsg& msg) {
-    mCallback->notify({msg});
+    auto ret = mCallback->notify({msg});
+    if (!ret.isOk()) {
+        ALOGE("%s: notify transaction failed: %s",
+                __FUNCTION__, ret.description().c_str());
+    }
     return;
 }
 
@@ -654,7 +662,11 @@
             }
         }
     }
-    mCallback->processCaptureResult(results);
+    auto ret = mCallback->processCaptureResult(results);
+    if (!ret.isOk()) {
+        ALOGE("%s: processCaptureResult transaction failed: %s",
+                __FUNCTION__, ret.description().c_str());
+    }
     mProcessCaptureResultLock.unlock();
 }
 
diff --git a/compatibility_matrices/Android.mk b/compatibility_matrices/Android.mk
index ee97433..9e48588 100644
--- a/compatibility_matrices/Android.mk
+++ b/compatibility_matrices/Android.mk
@@ -18,68 +18,64 @@
 
 BUILD_FRAMEWORK_COMPATIBILITY_MATRIX := $(LOCAL_PATH)/compatibility_matrix.mk
 
-# Clear potential input variables to BUILD_FRAMEWORK_COMPATIBILITY_MATRIX
-LOCAL_ADD_VBMETA_VERSION :=
-LOCAL_ASSEMBLE_VINTF_ENV_VARS :=
-LOCAL_ASSEMBLE_VINTF_ENV_VARS_OVERRIDE :=
-LOCAL_ASSEMBLE_VINTF_ERROR_MESSAGE :=
-LOCAL_ASSEMBLE_VINTF_FLAGS :=
-LOCAL_KERNEL_VERSIONS :=
-LOCAL_GEN_FILE_DEPENDENCIES :=
+my_kernel_config_data := kernel/configs
 
 # Install all compatibility_matrix.*.xml to /system/etc/vintf
 
-
 include $(CLEAR_VARS)
+include $(LOCAL_PATH)/clear_vars.mk
 LOCAL_MODULE := framework_compatibility_matrix.legacy.xml
 LOCAL_MODULE_STEM := compatibility_matrix.legacy.xml
 LOCAL_SRC_FILES := $(LOCAL_MODULE_STEM)
-LOCAL_KERNEL_VERSIONS := \
-    3.18.0 \
-    4.4.0 \
-    4.9.0 \
-    4.14.0 \
+LOCAL_KERNEL_CONFIG_DATA_PATHS := \
+    3.18.0:$(my_kernel_config_data)/o/android-3.18 \
+    4.4.0:$(my_kernel_config_data)/o/android-4.4 \
+    4.9.0:$(my_kernel_config_data)/o/android-4.9 \
 
 include $(BUILD_FRAMEWORK_COMPATIBILITY_MATRIX)
 
 include $(CLEAR_VARS)
+include $(LOCAL_PATH)/clear_vars.mk
 LOCAL_MODULE := framework_compatibility_matrix.1.xml
 LOCAL_MODULE_STEM := compatibility_matrix.1.xml
 LOCAL_SRC_FILES := $(LOCAL_MODULE_STEM)
-LOCAL_KERNEL_VERSIONS := \
-    3.18.0 \
-    4.4.0 \
-    4.9.0 \
-    4.14.0 \
+LOCAL_KERNEL_CONFIG_DATA_PATHS := \
+    3.18.0:$(my_kernel_config_data)/o/android-3.18 \
+    4.4.0:$(my_kernel_config_data)/o/android-4.4 \
+    4.9.0:$(my_kernel_config_data)/o/android-4.9 \
 
 include $(BUILD_FRAMEWORK_COMPATIBILITY_MATRIX)
 
 include $(CLEAR_VARS)
+include $(LOCAL_PATH)/clear_vars.mk
 LOCAL_MODULE := framework_compatibility_matrix.2.xml
 LOCAL_MODULE_STEM := compatibility_matrix.2.xml
 LOCAL_SRC_FILES := $(LOCAL_MODULE_STEM)
-LOCAL_KERNEL_VERSIONS := \
-    3.18.0 \
-    4.4.0 \
-    4.9.0 \
-    4.14.0 \
+LOCAL_KERNEL_CONFIG_DATA_PATHS := \
+    3.18.0:$(my_kernel_config_data)/o-mr1/android-3.18 \
+    4.4.0:$(my_kernel_config_data)/o-mr1/android-4.4 \
+    4.9.0:$(my_kernel_config_data)/o-mr1/android-4.9 \
 
 include $(BUILD_FRAMEWORK_COMPATIBILITY_MATRIX)
 
 include $(CLEAR_VARS)
+include $(LOCAL_PATH)/clear_vars.mk
 LOCAL_MODULE := framework_compatibility_matrix.3.xml
 LOCAL_MODULE_STEM := compatibility_matrix.3.xml
 LOCAL_SRC_FILES := $(LOCAL_MODULE_STEM)
-LOCAL_KERNEL_VERSIONS := \
-    4.4.0 \
-    4.9.0 \
-    4.14.0 \
+LOCAL_KERNEL_CONFIG_DATA_PATHS := \
+    4.4.0:$(my_kernel_config_data)/android-4.4 \
+    4.9.0:$(my_kernel_config_data)/android-4.9 \
+    4.14.0:$(my_kernel_config_data)/android-4.14 \
 
 include $(BUILD_FRAMEWORK_COMPATIBILITY_MATRIX)
 
+my_kernel_config_data :=
+
 # Framework Compatibility Matrix (common to all FCM versions)
 
 include $(CLEAR_VARS)
+include $(LOCAL_PATH)/clear_vars.mk
 LOCAL_MODULE := framework_compatibility_matrix.device.xml
 LOCAL_MODULE_STEM := compatibility_matrix.device.xml
 # define LOCAL_MODULE_CLASS for local-generated-sources-dir.
@@ -126,6 +122,7 @@
 # Framework Compatibility Matrix
 
 include $(CLEAR_VARS)
+include $(LOCAL_PATH)/clear_vars.mk
 LOCAL_MODULE := framework_compatibility_matrix.xml
 LOCAL_MODULE_STEM := compatibility_matrix.xml
 LOCAL_MODULE_PATH := $(TARGET_OUT)
diff --git a/compatibility_matrices/clear_vars.mk b/compatibility_matrices/clear_vars.mk
new file mode 100644
index 0000000..8fde301
--- /dev/null
+++ b/compatibility_matrices/clear_vars.mk
@@ -0,0 +1,24 @@
+#
+# Copyright (C) 2017 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# Clear input variables to BUILD_FRAMEWORK_COMPATIBILITY_MATRIX
+LOCAL_ADD_VBMETA_VERSION :=
+LOCAL_ASSEMBLE_VINTF_ENV_VARS :=
+LOCAL_ASSEMBLE_VINTF_ENV_VARS_OVERRIDE :=
+LOCAL_ASSEMBLE_VINTF_ERROR_MESSAGE :=
+LOCAL_ASSEMBLE_VINTF_FLAGS :=
+LOCAL_KERNEL_CONFIG_DATA_PATHS :=
+LOCAL_GEN_FILE_DEPENDENCIES :=
diff --git a/compatibility_matrices/compatibility_matrix.mk b/compatibility_matrices/compatibility_matrix.mk
index 6dc2b4f..1b6fd3b 100644
--- a/compatibility_matrices/compatibility_matrix.mk
+++ b/compatibility_matrices/compatibility_matrix.mk
@@ -14,17 +14,6 @@
 # limitations under the License.
 #
 
-###########################################################
-## Remove minor revision from a kernel version. For example,
-## 3.18.0 becomes 3.18.
-## $(1): kernel version
-###########################################################
-define remove-minor-revision
-$(strip $(subst $(space),.,$(wordlist 1,2,$(subst .,$(space),$(strip $(1))))))
-endef
-
-# $(warning $(call remove-minor-revision,3.18.0))
-
 ##### Input Variables:
 # LOCAL_MODULE: required. Module name for the build system.
 # LOCAL_MODULE_CLASS: optional. Default is ETC.
@@ -42,8 +31,8 @@
 # LOCAL_ASSEMBLE_VINTF_ENV_VARS_OVERRIDE: Add a list of environment variables that is local to
 #       assemble_vintf invocation. Format is "VINTF_ENFORCE_NO_UNUSED_HALS=true".
 # LOCAL_ASSEMBLE_VINTF_FLAGS: Add additional command line arguments to assemble_vintf invocation.
-# LOCAL_KERNEL_VERSIONS: Parse kernel configurations and add to the output matrix
-#       (corresponds to <kernel> tags.)
+# LOCAL_KERNEL_CONFIG_DATA_PATHS: Paths to search for kernel config requirements. Format for each is
+#       <kernel version x.y.z>:<path that contains android-base*.cfg>.
 # LOCAL_GEN_FILE_DEPENDENCIES: A list of additional dependencies for the generated file.
 
 ifndef LOCAL_MODULE
@@ -88,14 +77,13 @@
 $(GEN): PRIVATE_ENV_VARS += FRAMEWORK_VBMETA_VERSION
 endif # LOCAL_ADD_VBMETA_VERSION
 
-ifneq (,$(strip $(LOCAL_KERNEL_VERSIONS)))
-$(GEN): PRIVATE_KERNEL_CONFIG_DATA := kernel/configs
-$(GEN): PRIVATE_KERNEL_VERSIONS := $(LOCAL_KERNEL_VERSIONS)
-$(GEN): $(foreach version,$(PRIVATE_KERNEL_VERSIONS),\
-    $(wildcard $(PRIVATE_KERNEL_CONFIG_DATA)/android-$(call remove-minor-revision,$(version))/android-base*.cfg))
-$(GEN): PRIVATE_FLAGS += $(foreach version,$(PRIVATE_KERNEL_VERSIONS),\
-    --kernel=$(version):$(call normalize-path-list,\
-        $(wildcard $(PRIVATE_KERNEL_CONFIG_DATA)/android-$(call remove-minor-revision,$(version))/android-base*.cfg)))
+ifneq (,$(strip $(LOCAL_KERNEL_CONFIG_DATA_PATHS)))
+$(GEN): PRIVATE_KERNEL_CONFIG_DATA_PATHS := $(LOCAL_KERNEL_CONFIG_DATA_PATHS)
+$(GEN): $(foreach pair,$(PRIVATE_KERNEL_CONFIG_DATA_PATHS),\
+    $(wildcard $(call word-colon,2,$(pair))/android-base*.cfg))
+$(GEN): PRIVATE_FLAGS += $(foreach pair,$(PRIVATE_KERNEL_CONFIG_DATA_PATHS),\
+	--kernel=$(call word-colon,1,$(pair)):$(call normalize-path-list,\
+		$(wildcard $(call word-colon,2,$(pair))/android-base*.cfg)))
 endif
 
 my_matrix_src_files := \
@@ -124,15 +112,7 @@
 LOCAL_SRC_FILES :=
 LOCAL_GENERATED_SOURCES :=
 
-LOCAL_ADD_VBMETA_VERSION :=
-LOCAL_ASSEMBLE_VINTF_ENV_VARS :=
-LOCAL_ASSEMBLE_VINTF_ENV_VARS_OVERRIDE :=
-LOCAL_ASSEMBLE_VINTF_ERROR_MESSAGE :=
-LOCAL_ASSEMBLE_VINTF_FLAGS :=
-LOCAL_KERNEL_VERSIONS :=
-LOCAL_GEN_FILE_DEPENDENCIES :=
+include $(LOCAL_PATH)/clear_vars.mk
 my_matrix_src_files :=
 
 include $(BUILD_PREBUILT)
-
-remove-minor-revision :=
diff --git a/confirmationui/1.0/default/PlatformSpecifics.cpp b/confirmationui/1.0/default/PlatformSpecifics.cpp
index dd039e2..03d6165 100644
--- a/confirmationui/1.0/default/PlatformSpecifics.cpp
+++ b/confirmationui/1.0/default/PlatformSpecifics.cpp
@@ -36,11 +36,11 @@
     }
 }
 
-support::NullOr<support::array<uint8_t, 32>> HMacImplementation::hmac256(
-    const uint8_t key[32], std::initializer_list<support::ByteBufferProxy> buffers) {
+support::NullOr<support::hmac_t> HMacImplementation::hmac256(
+    const support::auth_token_key_t& key, std::initializer_list<support::ByteBufferProxy> buffers) {
     HMAC_CTX hmacCtx;
     HMAC_CTX_init(&hmacCtx);
-    if (!HMAC_Init_ex(&hmacCtx, key, 32, EVP_sha256(), nullptr)) {
+    if (!HMAC_Init_ex(&hmacCtx, key.data(), key.size(), EVP_sha256(), nullptr)) {
         return {};
     }
     for (auto& buffer : buffers) {
@@ -48,7 +48,7 @@
             return {};
         }
     }
-    support::array<uint8_t, 32> result;
+    support::hmac_t result;
     if (!HMAC_Final(&hmacCtx, result.data(), nullptr)) {
         return {};
     }
diff --git a/confirmationui/1.0/default/PlatformSpecifics.h b/confirmationui/1.0/default/PlatformSpecifics.h
index 488da6d..29f299c 100644
--- a/confirmationui/1.0/default/PlatformSpecifics.h
+++ b/confirmationui/1.0/default/PlatformSpecifics.h
@@ -48,8 +48,9 @@
 
 class HMacImplementation {
    public:
-    static support::NullOr<support::array<uint8_t, 32>> hmac256(
-        const uint8_t key[32], std::initializer_list<support::ByteBufferProxy> buffers);
+    static support::NullOr<support::hmac_t> hmac256(
+        const support::auth_token_key_t& key,
+        std::initializer_list<support::ByteBufferProxy> buffers);
 };
 
 class MyOperation : public generic::Operation<sp<IConfirmationResultCallback>,
diff --git a/confirmationui/1.0/vts/functional/VtsHalConfirmationUIV1_0TargetTest.cpp b/confirmationui/1.0/vts/functional/VtsHalConfirmationUIV1_0TargetTest.cpp
index 463bb40..278d1f4 100644
--- a/confirmationui/1.0/vts/functional/VtsHalConfirmationUIV1_0TargetTest.cpp
+++ b/confirmationui/1.0/vts/functional/VtsHalConfirmationUIV1_0TargetTest.cpp
@@ -46,13 +46,16 @@
 
 namespace test {
 namespace {
+const support::auth_token_key_t testKey(static_cast<uint8_t>(TestKeyBits::BYTE));
+
 class HMacImplementation {
    public:
-    static support::NullOr<support::array<uint8_t, 32>> hmac256(
-        const uint8_t key[32], std::initializer_list<support::ByteBufferProxy> buffers) {
+    static support::NullOr<support::hmac_t> hmac256(
+        const support::auth_token_key_t& key,
+        std::initializer_list<support::ByteBufferProxy> buffers) {
         HMAC_CTX hmacCtx;
         HMAC_CTX_init(&hmacCtx);
-        if (!HMAC_Init_ex(&hmacCtx, key, 32, EVP_sha256(), nullptr)) {
+        if (!HMAC_Init_ex(&hmacCtx, key.data(), key.size(), EVP_sha256(), nullptr)) {
             return {};
         }
         for (auto& buffer : buffers) {
@@ -60,7 +63,7 @@
                 return {};
             }
         }
-        support::array<uint8_t, 32> result;
+        support::hmac_t result;
         if (!HMAC_Final(&hmacCtx, result.data(), nullptr)) {
             return {};
         }
@@ -70,23 +73,15 @@
 
 using HMacer = support::HMac<HMacImplementation>;
 
-constexpr uint8_t testKeyByte = static_cast<uint8_t>(TestKeyBits::BYTE);
-
 template <typename... Data>
 hidl_vec<uint8_t> testHMAC(const Data&... data) {
-    constexpr uint8_t testKey[32] = {testKeyByte, testKeyByte, testKeyByte, testKeyByte,
-                                     testKeyByte, testKeyByte, testKeyByte, testKeyByte,
-                                     testKeyByte, testKeyByte, testKeyByte, testKeyByte,
-                                     testKeyByte, testKeyByte, testKeyByte, testKeyByte};
-    constexpr uint8_t hmac_size_bytes = sizeof testKey;
-
     auto hmac = HMacer::hmac256(testKey, data...);
     if (!hmac.isOk()) {
         EXPECT_TRUE(false) << "Failed to compute test hmac.  This is a self-test error.";
         return {};
     }
-    hidl_vec<uint8_t> result(hmac_size_bytes);
-    copy(hmac.value().data(), hmac.value().data() + hmac_size_bytes, result.data());
+    hidl_vec<uint8_t> result(hmac.value().size());
+    copy(hmac.value().data(), hmac.value().data() + hmac.value().size(), result.data());
     return result;
 }
 
diff --git a/confirmationui/support/include/android/hardware/confirmationui/1.0/generic/GenericOperation.h b/confirmationui/support/include/android/hardware/confirmationui/1.0/generic/GenericOperation.h
index b480942..b1c322c 100644
--- a/confirmationui/support/include/android/hardware/confirmationui/1.0/generic/GenericOperation.h
+++ b/confirmationui/support/include/android/hardware/confirmationui/1.0/generic/GenericOperation.h
@@ -99,7 +99,8 @@
 
     void setPending() { error_ = ResponseCode::OK; }
 
-    void setHmacKey(const uint8_t (&key)[32]) { hmacKey_ = {key}; }
+    void setHmacKey(const auth_token_key_t& key) { hmacKey_ = key; }
+    NullOr<auth_token_key_t> hmacKey() const { return hmacKey_; }
 
     void abort() {
         if (isPending()) {
@@ -112,7 +113,7 @@
         if (isPending()) error_ = ResponseCode::Canceled;
     }
 
-    void finalize(const uint8_t key[32]) {
+    void finalize(const auth_token_key_t& key) {
         if (error_ == ResponseCode::Ignored) return;
         resultCB_->result(error_, getMessage(), userConfirm(key));
         error_ = ResponseCode::Ignored;
@@ -127,11 +128,7 @@
     }
 
     ResponseCode deliverSecureInputEvent(const HardwareAuthToken& secureInputToken) {
-        constexpr uint8_t testKeyByte = static_cast<uint8_t>(TestKeyBits::BYTE);
-        constexpr uint8_t testKey[32] = {testKeyByte, testKeyByte, testKeyByte, testKeyByte,
-                                         testKeyByte, testKeyByte, testKeyByte, testKeyByte,
-                                         testKeyByte, testKeyByte, testKeyByte, testKeyByte,
-                                         testKeyByte, testKeyByte, testKeyByte, testKeyByte};
+        const auth_token_key_t testKey(static_cast<uint8_t>(TestKeyBits::BYTE));
 
         auto hmac = HMacer::hmac256(testKey, "\0", bytes_cast(secureInputToken.challenge),
                                     bytes_cast(secureInputToken.userId),
@@ -171,7 +168,7 @@
         result.setToExternal(formattedMessageBuffer_, formattedMessageLength_);
         return result;
     }
-    hidl_vec<uint8_t> userConfirm(const uint8_t key[32]) {
+    hidl_vec<uint8_t> userConfirm(const auth_token_key_t& key) {
         if (error_ != ResponseCode::OK) return {};
         confirmationTokenScratchpad_ = HMacer::hmac256(key, "confirmation token", getMessage());
         if (!confirmationTokenScratchpad_.isOk()) {
@@ -188,10 +185,10 @@
     uint8_t formattedMessageBuffer_[uint32_t(MessageSize::MAX)];
     char promptStringBuffer_[uint32_t(MessageSize::MAX)];
     size_t formattedMessageLength_ = 0;
-    NullOr<array<uint8_t, 32>> confirmationTokenScratchpad_;
+    NullOr<hmac_t> confirmationTokenScratchpad_;
     Callback resultCB_;
     typename TimeStamper::TimeStamp startTime_;
-    NullOr<array<uint8_t, 32>> hmacKey_;
+    NullOr<auth_token_key_t> hmacKey_;
 };
 
 }  // namespace
diff --git a/confirmationui/support/include/android/hardware/confirmationui/support/confirmationui_utils.h b/confirmationui/support/include/android/hardware/confirmationui/support/confirmationui_utils.h
index d551433..a01b5e3 100644
--- a/confirmationui/support/include/android/hardware/confirmationui/support/confirmationui_utils.h
+++ b/confirmationui/support/include/android/hardware/confirmationui/support/confirmationui_utils.h
@@ -58,7 +58,8 @@
 
    public:
     NullOr() : value_(initializer_t<ValueT>::init()), null_(true) {}
-    NullOr(ValueT&& value) : value_(std::forward<ValueT>(value)), null_(false) {}
+    template <typename T>
+    NullOr(T&& value) : value_(std::forward<T>(value)), null_(false) {}
 
     bool isOk() const { return !null_; }
 
@@ -81,17 +82,23 @@
    public:
     array() : data_{} {}
     array(const T (&data)[elements]) { std::copy(data, data + elements, data_); }
+    explicit array(const T& v) { fill(v); }
 
     T* data() { return data_; }
     const T* data() const { return data_; }
     constexpr size_t size() const { return elements; }
-    operator const array_type&() const { return data_; }
 
     T* begin() { return data_; }
     T* end() { return data_ + elements; }
     const T* begin() const { return data_; }
     const T* end() const { return data_ + elements; }
 
+    void fill(const T& v) {
+        for (size_t i = 0; i < elements; ++i) {
+            data_[i] = v;
+        }
+    }
+
    private:
     array_type data_;
 };
@@ -157,6 +164,11 @@
     size_t size_;
 };
 
+constexpr uint8_t auth_token_key_size = 32;
+constexpr uint8_t hmac_size_bytes = support::auth_token_key_size;
+using auth_token_key_t = array<uint8_t, auth_token_key_size>;
+using hmac_t = auth_token_key_t;
+
 /**
  * Implementer are expected to provide an implementation with the following prototype:
  *  static NullOr<array<uint8_t, 32>> hmac256(const uint8_t key[32],
@@ -166,7 +178,7 @@
 class HMac {
    public:
     template <typename... Data>
-    static NullOr<array<uint8_t, 32>> hmac256(const uint8_t key[32], const Data&... data) {
+    static NullOr<hmac_t> hmac256(const auth_token_key_t& key, const Data&... data) {
         return Impl::hmac256(key, {data...});
     }
 };
diff --git a/current.txt b/current.txt
index d5ee5dc..5ccd6ab 100644
--- a/current.txt
+++ b/current.txt
@@ -260,7 +260,7 @@
 4e7169919d24fbe5573e5bcd683d0bd7abf553a4e6c34c41f9dfc1e12050db07 android.hardware.gnss@1.0::IGnssNavigationMessageCallback
 5804ca86611d72e5481f022b3a0c1b334217f2e4988dad25730c42af2d1f4d1c android.hardware.neuralnetworks@1.0::IDevice
 12e8dca4ab7d8aadd0ef8f1b438021938e2396139e85db2ed65783b08800aa52 android.hardware.neuralnetworks@1.0::IExecutionCallback
-702f9a4cd3b7486a4b04f7155b737757ac2ca4b3548976d5782ad3cae9ff9780 android.hardware.neuralnetworks@1.0::types
+18e6885e184fe48401c2c53f1d1b8bfb07240f40c81ae6b9d2e336fca6efdbb7 android.hardware.neuralnetworks@1.0::types
 d4840db8efabdf1e4b344fc981cd36e5fe81a39aff6e199f6d06c1c8da413efd android.hardware.radio@1.0::types
 b280c4704dfcc548a9bf127b59b7c3578f460c50cce70a06b66fe0df8b27cff0 android.hardware.wifi@1.0::types
 
@@ -339,7 +339,7 @@
 4a2c0dc82780e6c90731725a103feab8ab6ecf85a64e049b9cbd2b2c61620fe1 android.hardware.media.bufferpool@1.0::IConnection
 6aef1218e5949f867b0104752ac536c1b707222a403341720de90141df129e3e android.hardware.media.bufferpool@1.0::types
 7698dc2382a2eeb43541840e3ee624f34108efdfb976b2bfa7c13ef15fb8c4c4 android.hardware.neuralnetworks@1.1::IDevice
-5604001029a255648a9e955de0a822a48d9ba7cc259b106fb8be0cd43dc8eece android.hardware.neuralnetworks@1.1::types
+72cc6126632456e8fbb8776fe50150c3c4dd5d09145653193affb70785211dfa android.hardware.neuralnetworks@1.1::types
 8d3d86da0bfa4bf070970d8303c659f67f35d670c287d45a3f542e4fedadd578 android.hardware.nfc@1.1::INfc
 e85f566698d2a2c28100e264fcf2c691a066756ddf8dd341d009ff50cfe10614 android.hardware.nfc@1.1::INfcClientCallback
 5e278fcaa3287d397d8eebe1c22aaa28150f5caae1cf9381cd6dc32cb37899c5 android.hardware.nfc@1.1::types
diff --git a/neuralnetworks/1.0/types.hal b/neuralnetworks/1.0/types.hal
index 8c07fcc..4efa13a 100644
--- a/neuralnetworks/1.0/types.hal
+++ b/neuralnetworks/1.0/types.hal
@@ -42,7 +42,8 @@
     TENSOR_FLOAT32      = 3,
     /** A tensor of 32 bit integer values. */
     TENSOR_INT32        = 4,
-    /** A tensor of 8 bit integers that represent real numbers.
+    /**
+     * A tensor of 8 bit integers that represent real numbers.
      *
      * Attached to this tensor are two numbers that can be used to convert the
      * 8 bit integer to the real value and vice versa. These two numbers are:
@@ -70,15 +71,17 @@
     /**
      * Adds two tensors, element-wise.
      *
-     * Takes two input tensors of identical type and compatible dimensions. The output
-     * is the sum of both input tensors, optionally modified by an activation function.
+     * Takes two input tensors of identical {@link OperandType} and compatible
+     * dimensions. The output is the sum of both input tensors, optionally
+     * modified by an activation function.
      *
      * Two dimensions are compatible when:
      *     1. they are equal, or
      *     2. one of them is 1
      *
-     * The size of the output is the maximum size along each dimension of the input operands.
-     * It starts with the trailing dimensions, and works its way forward.
+     * The size of the output is the maximum size along each dimension of the
+     * input operands. It starts with the trailing dimensions, and works its
+     * way forward.
      *
      * Example:
      *
@@ -86,7 +89,7 @@
      *     input2.dimension = {5, 4, 3, 1}
      *     output.dimension = {5, 4, 3, 2}
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -94,98 +97,119 @@
      *
      * Inputs:
      * * 0: A tensor.
-     * * 1: A tensor of the same type, and compatible dimensions as input0.
-     * * 2: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 1: A tensor of the same {@link OperandType}, and compatible dimensions
+     *      as input0.
+     * * 2: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The sum, a tensor of the same type as input0.
+     * * 0: The sum, a tensor of the same {@link OperandType} as input0.
      */
     ADD = 0,
 
     /**
      * Performs a 2-D average pooling operation.
      *
-     * The output dimensions are functions of the filter dimensions, stride, and padding.
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
      *
      * The values in the output tensor are computed as:
      *
      *     output[batch, row, col, channel] =
      *         sum_{i, j}(input[batch, row + i, col + j, channel]) / sum(1)
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
-     * Supported tensor rank: 4, with "NHWC" (i.e., Num_samples, Height, Width, and Channels)
-     * data layout.
+     * Supported tensor rank: 4, with "NHWC" (i.e., Num_samples, Height, Width,
+     * and Channels) data layout.
      *
      * Both explicit padding and implicit padding are supported.
      *
      * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
-     * * 2: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the padding on the top, in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the padding on the bottom, in the ‘height’ dimension.
-     * * 5: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 6: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 7: An INT32 value, specifying the filter width.
-     * * 8: An INT32 value, specifying the filter height.
-     * * 9: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 7: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 8: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 9: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
      *      following values: {0 (NONE), 1 (SAME), 2 (VALID)}.
-     * * 2: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the filter width.
-     * * 5: An INT32 value, specifying the filter height.
-     * * 6: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 6: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth].
+     * * 0: The output 4-D tensor, of shape
+            [batches, out_height, out_width, depth].
      */
     AVERAGE_POOL_2D = 1,
 
     /**
      * Concatenates the input tensors along the given dimension.
      *
-     * The input tensors must have identical type and the same dimensions except the
-     * dimension along the concatenation axis.
+     * The input tensors must have identical {@link OperandType} and the same
+     * dimensions except the dimension along the concatenation axis.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * * 0 ~ n-1: The list of n input tensors, of shape [D0, D1, ..., Daxis(i), ..., Dm].
-     *            For inputs of {@link OperandType::TENSOR_QUANT8_ASYMM} type, all
-     *            input tensors must have the same scale and zeroPoint.
-     * * n: An INT32 value, specifying the concatenation axis.
+     * * 0 ~ n-1: The list of n input tensors, of shape
+     *            [D0, D1, ..., Daxis(i), ..., Dm]. For inputs of
+     *            {@link OperandType::TENSOR_QUANT8_ASYMM}, all input tensors
+     *            must have the same scale and zeroPoint.
+     * * n: An {@link OperandType::INT32} scalar, specifying the
+     *      concatenation axis.
      *
      * Outputs:
-     * * 0: The output, a tensor of the same type as the input tensors.
-     *      The output shape is [D0, D1, ..., sum(Daxis(i)), ..., Dm].
+     * * 0: The output, a tensor of the same {@link OperandType} as the input
+     *      tensors. The output shape is [D0, D1, ..., sum(Daxis(i)), ..., Dm].
      */
     CONCATENATION = 2,
 
     /**
      * Performs an 2-D convolution operation.
      *
-     * The CONV_2D op sweeps a 2-D filter that can mix channels together over a batch of
-     * images, applying the filter to each window of each image of the appropriate size.
+     * The CONV_2D op sweeps a 2-D filter that can mix channels together over a
+     * batch of images, applying the filter to each window of each image of the
+     * appropriate size.
      *
-     * The output dimensions are functions of the filter dimensions, stride, and padding.
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
      *
      * The values in the output tensor are computed as:
      *
@@ -196,7 +220,7 @@
      *             bias[channel]
      *         )
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -205,63 +229,77 @@
      * Both explicit padding and implicit padding are supported.
      *
      * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
-     * * 1: A 4-D tensor, of shape [depth_out, filter_height, filter_width, depth_in],
-     *      specifying the filter.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: A 4-D tensor, of shape
+     *      [depth_out, filter_height, filter_width, depth_in], specifying the
+     *      filter.
      * * 2: A 1-D tensor, of shape [depth_out], specifying the bias.
-     *      For input tensor of {@link OperandType::TENSOR_FLOAT32} type, the bias should
-     *      also be of {@link OperandType::TENSOR_FLOAT32}.
-     *      For input tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the bias
-     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
-     *      bias_scale == input_scale * filter_scale.
-     * * 3: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
-     * * 4: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
-     * * 5: An INT32 value, specifying the padding on the top, in the ‘height’ dimension.
-     * * 6: An INT32 value, specifying the padding on the bottom, in the ‘height’ dimension.
-     * * 7: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 8: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 9: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     *      For input tensor of {@link OperandType::TENSOR_FLOAT32}, the bias
+     *      should also be of {@link OperandType::TENSOR_FLOAT32}. For input
+     *      tensor of {@link OperandType::TENSOR_QUANT8_ASYMM}, the bias
+     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of
+     *      0 and bias_scale == input_scale * filter_scale.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 7: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 8: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 9: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
-     * * 1: A 4-D tensor, of shape [depth_out, filter_height, filter_width, depth_in],
-     *      specifying the filter.
-     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias.
-     *      For input tensor of {@link OperandType::TENSOR_FLOAT32} type, the bias should
-     *      also be of {@link OperandType::TENSOR_FLOAT32}.
-     *      For input tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the bias
-     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: A 4-D tensor, of shape
+     *      [depth_out, filter_height, filter_width, depth_in], specifying the
+     *      filter.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of {@link OperandType::TENSOR_FLOAT32}, the bias should
+     *      also be of {@link OperandType::TENSOR_FLOAT32}. For input tensor
+     *      of {@link OperandType::TENSOR_QUANT8_ASYMM}, the bias should be
+     *      of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
      *      bias_scale == input_scale * filter_scale.
-     * * 3: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     * * 3: An {@link OperandType::INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
      *      following values: {0 (NONE), 1 (SAME), 2 (VALID)}.
-     * * 4: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 5: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 6: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the stride when
+    *       walking through input in the ‘height’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth_out].
-     *      For output tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the following
-     *      condition must be satisfied: output_scale > input_scale * filter_scale.
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth_out]. For output tensor of
+     *      {@link OperandType::TENSOR_QUANT8_ASYMM}, the following condition
+     *      must be satisfied: output_scale > input_scale * filter_scale.
      */
     CONV_2D = 3,
 
     /**
      * Performs a depthwise 2-D convolution operation.
      *
-     * Given an input tensor of shape [batches, height, width, depth_in] and a filter
-     * tensor of shape [1, filter_height, filter_width, depth_out] containing
-     * depth_out convolutional filters of depth 1, DEPTHWISE_CONV applies a different
-     * filter to each input channel (expanding from 1 channel to channel_multiplier channels
-     * for each), then concatenates the results together.
+     * Given an input tensor of shape [batches, height, width, depth_in] and a
+     * filter tensor of shape [1, filter_height, filter_width, depth_out]
+     * containing depth_out convolutional filters of depth 1, DEPTHWISE_CONV
+     * applies a different filter to each input channel (expanding from 1
+     * channel to channel_multiplier channels for each), then concatenates the
+     * results together.
      *
      * The output has depth_out = depth_in * depth_multiplier channels.
-     * The output dimensions are functions of the filter dimensions, stride, and padding.
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
      *
      * The values in the output tensor are computed as:
      *
@@ -271,7 +309,7 @@
      *             filter[1, di, dj, k * channel_multiplier + q]
      *         )
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -280,82 +318,97 @@
      * Both explicit padding and implicit padding are supported.
      *
      * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
      * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
      *      specifying the filter.
-     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias.
-     *      For input tensor of {@link OperandType::TENSOR_FLOAT32} type, the bias should
-     *      also be of {@link OperandType::TENSOR_FLOAT32}.
-     *      For input tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the bias
-     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of {@link OperandType::TENSOR_FLOAT32}, the bias should
+     *      also be of {@link OperandType::TENSOR_FLOAT32}. For input tensor
+     *      of {@link OperandType::TENSOR_QUANT8_ASYMM}, the bias should be
+     *      of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
      *      bias_scale == input_scale * filter_scale.
-     * * 3: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
-     * * 4: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
-     * * 5: An INT32 value, specifying the padding on the top, in the ‘height’ dimension.
-     * * 6: An INT32 value, specifying the padding on the bottom, in the ‘height’ dimension.
-     * * 7: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 8: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 9: An INT32 value, specifying the depthwise multiplier.
-     * * 10: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *       Specifies the activation to invoke on the result of each addition.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 7: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 8: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 9: An {@link OperandType::INT32} scalar, specifying the depthwise
+     *      multiplier.
+     * * 10: An {@link OperandType::INT32} scalar, and has to be one of the
+     *       {@link FusedActivationFunc} values. Specifies the activation to
+     *       invoke on the result.
      *
      * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
      * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
      *      specifying the filter.
-     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias.
-     *      For input tensor of {@link OperandType::TENSOR_FLOAT32} type, the bias should
-     *      also be of {@link OperandType::TENSOR_FLOAT32}.
-     *      For input tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the bias
-     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of {@link OperandType::TENSOR_FLOAT32}, the bias should
+     *      also be of {@link OperandType::TENSOR_FLOAT32}. For input tensor
+     *      of {@link OperandType::TENSOR_QUANT8_ASYMM}, the bias should be
+     *      of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
      *      bias_scale == input_scale * filter_scale.
-     * * 3: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     * * 3: An {@link OperandType::INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
      *      following values: {0 (NONE), 1 (SAME), 2 (VALID)}.
-     * * 4: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 5: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 6: An INT32 value, specifying the depthwise multiplier.
-     * * 7: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *       Specifies the activation to invoke on the result of each addition.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the depthwise
+     *      multiplier.
+     * * 7: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth_out].
-     *      For output tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the following
-     *      condition must be satisfied: output_scale > input_scale * filter_scale.
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth_out]. For output tensor of
+     *      {@link OperandType::TENSOR_QUANT8_ASYMM}, the following condition
+     *      must be satisfied: output_scale > input_scale * filter_scale.
      */
     DEPTHWISE_CONV_2D = 4,
 
     /**
      * Rearranges data from depth into blocks of spatial data.
      *
-     * More specifically, this op outputs a copy of the input tensor where values from
-     * the depth dimension are moved in spatial blocks to the height and width dimensions.
-     * The value block_size indicates the input block size and how the data is moved.
+     * More specifically, this op outputs a copy of the input tensor where
+     * values from the depth dimension are moved in spatial blocks to the height
+     * and width dimensions. The value block_size indicates the input block size
+     * and how the data is moved.
      *
-     * Chunks of data of size block_size * block_size from depth are rearranged into
-     * non-overlapping blocks of size block_size x block_size.
+     * Chunks of data of size block_size * block_size from depth are rearranged
+     * into non-overlapping blocks of size block_size x block_size.
      *
-     * The width of the output tensor is input_depth * block_size, whereas the height is
-     * input_height * block_size.
-     * The depth of the input tensor must be divisible by block_size * block_size
+     * The width of the output tensor is input_depth * block_size, whereas the
+     * height is input_height * block_size. The depth of the input tensor must
+     * be divisible by block_size * block_size
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
      * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
-     * * 1: An INT32 value, specifying the block_size. block_size must be >=1 and
-     *      block_size * block_size must be a divisor of the input depth.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the block_size.
+     *      block_size must be >=1 and block_size * block_size must be a divisor
+     *      of the input depth.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batch, height*block_size, width*block_size,
-     *      depth/(block_size*block_size)].
+     * * 0: The output 4-D tensor, of shape [batch, height*block_size,
+     *      width*block_size, depth/(block_size*block_size)].
      */
     DEPTH_TO_SPACE = 5,
 
@@ -366,16 +419,16 @@
      *
      *     output = (input - zeroPoint) * scale.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * * 0: A tensor of type {@link OperandType::TENSOR_QUANT8_ASYMM}.
+     * * 0: A tensor of {@link OperandType::TENSOR_QUANT8_ASYMM}.
      *
      * Outputs:
-     * * 0: The output tensor of same shape as input0, but with type
+     * * 0: The output tensor of same shape as input0, but with
      *      {@link OperandType::TENSOR_FLOAT32}.
      */
     DEQUANTIZE = 6,
@@ -401,7 +454,7 @@
      * and an error must be reported.
      *
      * Inputs:
-     * * 0: Lookups. A 1-D tensor of {@link OperandType::TENSOR_INT32} type.
+     * * 0: Lookups. A 1-D tensor of {@link OperandType::TENSOR_INT32}.
      *      The values are indices into the first dimension of Values.
      * * 1: Values. An n-D tensor, where n >= 2, from which sub-tensors are
      *      extracted.
@@ -416,7 +469,7 @@
     /**
      * Computes element-wise floor() on the input tensor.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: up to 4
@@ -425,44 +478,51 @@
      * * 0: A tensor.
      *
      * Outputs:
-     * * 0: The output tensor, of the same type and dimensions as the input tensor.
+     * * 0: The output tensor, of the same {@link OperandType} and dimensions as
+     *      the input tensor.
      */
     FLOOR = 8,
 
     /**
-     * Denotes a fully (densely) connected layer, which connects all elements in the input
-     * tensor with each element in the output tensor.
+     * Denotes a fully (densely) connected layer, which connects all elements
+     * in the input tensor with each element in the output tensor.
      *
      * This layer implements the operation:
      *
      *     outputs = activation(inputs * weights’ + bias)
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4.
      *
      * Inputs:
-     * * 0: A tensor, specifying the input. If rank is greater than 2, then it gets flattened to
-     *      a 2-D Tensor. The 2-D Tensor is handled as if dimensions corresponded to shape
-     *      [batch_size, input_size], where “batch_size” corresponds to the batching dimension,
-     *      and “input_size” is the size of the input.
-     * * 1: A 2-D tensor, specifying the weights, of shape [num_units, input_size], where
-     *      "num_units" corresponds to the number of output nodes.
-     * * 2: A 1-D tensor, of shape [num_units], specifying the bias.
-     *      For input tensor of {@link OperandType::TENSOR_FLOAT32} type, the bias should
-     *      also be of {@link OperandType::TENSOR_FLOAT32}.
-     *      For input tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the bias
-     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
+     * * 0: A tensor of at least rank 2, specifying the input. If rank is
+     *      greater than 2, then it gets flattened to a 2-D Tensor. The
+     *      (flattened) 2-D Tensor is reshaped (if necessary) to
+     *      [batch_size, input_size], where "input_size" corresponds to the
+     *      number of inputs to the layer, matching the second dimension of
+     *      weights, and "batch_size" is calculated by dividing the number of
+     *      elements by "input_size".
+     * * 1: A 2-D tensor, specifying the weights, of shape
+     *      [num_units, input_size], where "num_units" corresponds to the number
+     *      of output nodes.
+     * * 2: A 1-D tensor, of shape [num_units], specifying the bias. For input
+     *      tensor of {@link OperandType::TENSOR_FLOAT32}, the bias should
+     *      also be of {@link OperandType::TENSOR_FLOAT32}. For input tensor
+     *      of {@link OperandType::TENSOR_QUANT8_ASYMM}, the bias should be
+     *      of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
      *      bias_scale == input_scale * filter_scale.
-     * * 3: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 3: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output tensor, of shape [batch_size, num_units].
-     *      For output tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the following
-     *      condition must be satisfied: output_scale > input_scale * filter_scale.
+     * * 0: The output tensor, of shape [batch_size, num_units]. For output
+     *      tensor of {@link OperandType::TENSOR_QUANT8_ASYMM}, the following
+     *      condition must be satisfied:
+     *      output_scale > input_scale * filter_scale.
      */
     FULLY_CONNECTED = 9,
 
@@ -494,19 +554,22 @@
      * must be concatenated.
      *
      * Inputs:
-     * * 0: Lookups. A 1-D {@link OperandType::TENSOR_INT32} tensor with shape [ k ].
-     * * 1: Keys. A 1-D {@link OperandType::TENSOR_INT32} tensor with shape [ n ];
-     *      Keys and Values pair represent a map, i.e., the ith element
-     *      in Keys (Keys[i]) is the key to select the ith sub-tensor
-     *      in Values (Values[i]), where 0 <= i <= n-1.
-     *      Keys tensor *MUST* be sorted in ascending order.
-     * * 2: Values. A tensor with shape of [ n, … ]; i.e., the first dimension must be n.
+     * * 0: Lookups. A 1-D {@link OperandType::TENSOR_INT32} tensor with
+     *      shape [ k ].
+     * * 1: Keys. A 1-D {@link OperandType::TENSOR_INT32} tensor with shape
+     *      [ n ]; Keys and Values pair represent a map, i.e., the ith element
+     *      in Keys (Keys[i]) is the key to select the ith sub-tensor in Values
+     *      (Values[i]), where 0 <= i <= n-1. Keys tensor *MUST* be sorted in
+     *      ascending order.
+     * * 2: Values. A tensor with shape of [ n, … ]; i.e., the first dimension
+     *      must be n.
      *
      * Outputs:
      * * 0: Output. A tensor with shape [ k …].
      * * 1: Hits. A boolean tensor with shape [ k ] indicates whether the lookup
      *      hits (True) or not (False).
-     *      Stored as {@link OperandType::TENSOR_QUANT8_ASYMM} with offset 0 and scale 1.0f.
+     *      Stored as {@link OperandType::TENSOR_QUANT8_ASYMM} with offset 0
+     *      and scale 1.0f.
      *      A non-zero byte represents True, a hit. A zero indicates otherwise.
      */
     HASHTABLE_LOOKUP = 10,
@@ -520,32 +583,37 @@
      *         input[batch, row, col, channel] /
      *         sqrt(sum_{c} pow(input[batch, row, col, c], 2))
      *
-     * For input tensor with more dimensions, independently normalizes each 1-D slice along dimension dim.
+     * For input tensor with more dimensions, independently normalizes each 1-D
+     * slice along dimension dim.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
-     * Supported tensor rank: 4, with "NHWC" data layout (i.e., Num_samples, Height, Width, and Channels).
+     * Supported tensor rank: 4, with "NHWC" data layout (i.e., Num_samples,
+     * Height, Width, and Channels).
      *
      * Inputs:
      * * 0: A 4-D tensor, of shape [batches, height, width, depth].
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth].
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth].
      */
     L2_NORMALIZATION = 11,
 
     /**
      * Performs an 2-D L2 pooling operation.
      *
-     * The output dimensions are functions of the filter dimensions, stride, and padding.
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
      *
      * The values in the output tensor are computed as:
      *
      *     output[batch, row, col, channel] =
-     *         sqrt(sum_{i, j} pow(input[batch, row + i, col + j, channel], 2) / sum(1))
+     *         sqrt(sum_{i, j} pow(input[batch, row + i, col + j, channel], 2) /
+     *              sum(1))
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
@@ -553,62 +621,82 @@
      * Both explicit padding and implicit padding are supported.
      *
      * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
-     * * 2: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the padding on the top, in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the padding on the bottom, in the ‘height’ dimension.
-     * * 5: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 6: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 7: An INT32 value, specifying the filter width.
-     * * 8: An INT32 value, specifying the filter height.
-     * * 9: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 7: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 8: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 9: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
      *      following values: {0 (NONE), 1 (SAME), 2 (VALID)}.
-     * * 2: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the filter width.
-     * * 5: An INT32 value, specifying the filter height.
-     * * 6: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 6: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth].
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth].
      */
     L2_POOL_2D = 12,
 
     /**
      * Applies Local Response Normalization along the depth dimension.
      *
-     * The 4-D input tensor is treated as a 3-D array of 1-D vectors (along the last
-     * dimension), and each vector is normalized independently. Within a given vector,
-     * each component is divided by the weighted, squared sum of inputs within depth_radius.
+     * The 4-D input tensor is treated as a 3-D array of 1-D vectors (along the
+     * last dimension), and each vector is normalized independently. Within a
+     * given vector, each component is divided by the weighted, squared sum of
+     * inputs within depth_radius.
      *
      * The output is calculated using this formula:
      *
-     *     sqr_sum[a, b, c, d] =
-     *         sum(pow(input[a, b, c, d - depth_radius : d + depth_radius + 1], 2)
+     *     sqr_sum[a, b, c, d] = sum(
+     *         pow(input[a, b, c, d - depth_radius : d + depth_radius + 1], 2))
      *     output = input / pow((bias + alpha * sqr_sum), beta)
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
      * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the radius of the normalization window.
-     * * 2: A FLOAT32 value, specifying the bias, must not be zero.
-     * * 3: A FLOAT32 value, specifying the scale factor, alpha.
-     * * 4: A FLOAT32 value, specifying the exponent, beta.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the radius of
+     *      the normalization window.
+     * * 2: An {@link OperandType::FLOAT32} scalar, specifying the bias, must
+     *      not be zero.
+     * * 3: An {@link OperandType::FLOAT32} scalar, specifying the scale
+     *      factor, alpha.
+     * * 4: An {@link OperandType::FLOAT32} scalar, specifying the exponent,
+     *      beta.
      *
      * Outputs:
      * * 0: The output tensor of same shape as input0.
@@ -622,7 +710,7 @@
      *
      *     output = 1 / (1 + exp(-input))
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -633,7 +721,7 @@
      *
      * Outputs:
      * * 0: The output tensor of same shape as input0.
-     *      For {@link OperandType::TENSOR_QUANT8_ASYMM} type,
+     *      For {@link OperandType::TENSOR_QUANT8_ASYMM},
      *      the scale must be 1.f / 256 and the zeroPoint must be 0.
      */
     LOGISTIC = 14,
@@ -649,18 +737,19 @@
      *
      * * 1: Input. Dim.size >= 1, no restriction on DataType.
      * * 2: Weight. Optional. Dim.size == 1, DataType: Float.
-     *     If not set, each input element is considered to have the same weight of
-     *     1.0.
+     *     If not set, each input element is considered to have the same weight
+     *     of 1.0.
      *     Tensor[1].Dim[0] == Tensor[2].Dim[0]
      * * 3: Type:
      *        Sparse: Value LSHProjectionType_SPARSE(=1).
      *          Computed bit vector is considered to be sparse.
-     *          Each output element is an int32 made up of multiple bits computed from
-     *          hash functions.
+     *          Each output element is an int32 made up of multiple bits
+     *          computed from hash functions.
      *
      *        Dense: Value LSHProjectionType_DENSE(=2).
-     *          Computed bit vector is considered to be dense. Each output element
-     *          represents a bit and can take the value of either 0 or 1.
+     *          Computed bit vector is considered to be dense. Each output
+     *          element represents a bit and can take the value of either
+     *          0 or 1.
      *
      * Outputs:
      * * 0: If the projection type is sparse:
@@ -680,9 +769,12 @@
      * \f{eqnarray*}{
      * i_t =& \sigma(W_{xi}x_t+W_{hi}h_{t-1}+W_{ci}C_{t-1}+b_i) & \\
      * f_t =& \sigma(W_{xf}x_t+W_{hf}h_{t-1}+W_{cf}C_{t-1}+b_f) & \\
-     * C_t =& clip(f_t \odot C_{t-1} + i_t \odot g(W_{xc}x_t+W_{hc}h_{t-1}+b_c),\ t_{cell})& \\
-     * o_t =& \sigma(W_{xo}x_t+W_{ho}h_{t-1}+W_{co}C_t+b_o)& \\
-     *      & clip(W_{proj}(o_t \odot g(C_t))+b_{proj},\ t_{proj}) & if\ there\ is\ a\ projection; \\
+     * C_t =& clip(f_t \odot C_{t-1} + i_t \odot
+     *        g(W_{xc}x_t+W_{hc}h_{t-1}+b_c),\ t_{cell}) & \\
+     * o_t =& \sigma(W_{xo}x_t+W_{ho}h_{t-1}+W_{co}C_t+b_o) & \\
+     *      & & \\
+     *      & clip(W_{proj}(o_t \odot g(C_t))+b_{proj},\ t_{proj})
+     *      & if\ there\ is\ a\ projection; \\
      * h_t =& & \\
      *      & o_t \odot g(C_t) & otherwise. \\
      * \f}
@@ -694,7 +786,8 @@
      * * \f$o_t\f$ is the output,
      * * \f$h_t\f$ is the output state,
      * * \f$\sigma\f$ is the logistic sigmoid function,
-     * * \f$g\f$ is the cell input and cell output activation function, usually \f$tahn\f$,
+     * * \f$g\f$ is the cell input and cell output activation function, usually
+     *   \f$tahn\f$,
      * * \f$W_{xi}\f$ is the input-to-input weight matrix,
      * * \f$W_{hi}\f$ is the recurrent to input weight matrix,
      * * \f$W_{ci}\f$ is the cell-to-input weight matrix,
@@ -714,27 +807,32 @@
      * * \f$b_{proj}\f$ is the projection bias,
      * * \f$t_{cell}\f$ is the threshold for clipping the cell state, and
      * * \f$t_{proj}\f$ is the threshold for clipping the projected output.
-     * * \f$\odot\f$ is the <a href="https://en.wikipedia.org/wiki/Hadamard_product_(matrices)">
+     * * \f$\odot\f$ is the
+     *   <a href="https://en.wikipedia.org/wiki/Hadamard_product_(matrices)">
      *   Hadamard product</a> that takes two matrices and produces another
      *   matrix, each element of which is the product of the corresponding
      *   elements of the input matrices.
      *
      * The operation has the following independently optional inputs:
-     * * The input-to-input weights (\f$W_{xi}\f$), recurrent-to-input weights (\f$W_{hi}\f$),
-     *   cell-to-input (\f$W_{ci}\f$) weights, and input gate bias (\f$b_i\f$) either all have values,
-     *   or none of them have values (i.e., all set to null). If they have no
-     *   values, coupling of input and forget gates (CIFG) is used, in which case
-     *   the input gate (\f$i_t\f$) is calculated using the following equation instead.
+     * * The input-to-input weights (\f$W_{xi}\f$), recurrent-to-input weights
+     *   (\f$W_{hi}\f$), cell-to-input (\f$W_{ci}\f$) weights, and input gate
+     *   bias (\f$b_i\f$) either all have values, or none of them have values
+     *   (i.e., all set to null). If they have no values, coupling of input and
+     *   forget gates (CIFG) is used, in which case the input gate (\f$i_t\f$)
+     *   is calculated using the following equation instead.
      *   \f{eqnarray*}{
      *   i_t = 1 - f_t
      *   \f}
-     * * The cell-to-input weights (\f$W_{ci}\f$), cell-to-forget weights (\f$W_{cf}\f$), and cell-to-output
-     *   weights (\f$W_{co}\f$) either all have values or none of them have values.
-     *   If they have values, the peephole optimization is used.
-     * * The projection weights (\f$W_{proj}\f$) is required only for the recurrent projection
-     *   layer, and should otherwise have no value.
-     * * The projection bias (\f$b_{proj}\f$) may (but not required to) have a value if the
-     *   recurrent projection layer exists, and should otherwise have no value.
+     * * The cell-to-forget weights (\f$W_{cf}\f$) and cell-to-output weights
+     *   (\f$W_{co}\f$) either both have values or neither of them have values.
+     *   If they have values, the peephole optimization is used. Additionally,
+     *   if CIFG is not used, cell-to-input weights (\f$W_{ci}\f$) is also
+     *   required to have values for peephole optimization.
+     * * The projection weights (\f$W_{proj}\f$) is required only for the
+     *   recurrent projection layer, and should otherwise have no value.
+     * * The projection bias (\f$b_{proj}\f$) may (but not required to) have a
+     *   value if the recurrent projection layer exists, and should otherwise
+     *   have no value.
      *
      * References:
      *
@@ -746,8 +844,8 @@
      * The peephole implementation and projection layer is based on:
      * https://research.google.com/pubs/archive/43905.pdf
      * Hasim Sak, Andrew Senior, and Francoise Beaufays. "Long short-term memory
-     * recurrent neural network architectures for large scale acoustic modeling."
-     * INTERSPEECH, 2014.
+     * recurrent neural network architectures for large scale acoustic
+     * modeling." INTERSPEECH, 2014.
      * (However, the concept of peephole optimization was introduced in work
      * prior to this paper.)
      *
@@ -755,56 +853,74 @@
      * http://arxiv.org/pdf/1503.04069.pdf
      * Greff et al. "LSTM: A Search Space Odyssey"
      *
-     * Supported tensor types (type T):
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Inputs:
      * * 0: The input (\f$x_t\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, input_size], where
-     *      “batch_size” corresponds to the batching dimension, and “input_size”
-     *      is the size of the input.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, input_size], where “batch_size” corresponds to the
+     *      batching dimension, and “input_size” is the size of the input.
      * * 1: The input-to-input weights (\f$W_{xi}\f$). Optional.
-     *      A 2-D tensor of type T, of shape [num_units, input_size], where
-     *      “num_units” corresponds to the number of cell units.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size], where “num_units” corresponds to the
+     *      number of cell units.
      * * 2: The input-to-forget weights (\f$W_{xf}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, input_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size].
      * * 3: The input-to-cell weights (\f$W_{xc}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, input_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size].
      * * 4: The input-to-output weights (\f$W_{xo}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, input_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size].
      * * 5: The recurrent-to-input weights (\f$W_{hi}\f$). Optional.
-     *      A 2-D tensor of type T, of shape [num_units, output_size], where
-     *      “output_size” corresponds to either the number of cell units (i.e.,
-     *      “num_units”), or the second dimension of the “projection_weights”, if
-     *      defined.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, output_size], where “output_size” corresponds to either
+     *      the number of cell units (i.e., “num_units”), or the second
+     *      dimension of the “projection_weights”, if defined.
      * * 6: The recurrent-to-forget weights (\f$W_{hf}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, output_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, output_size].
      * * 7: The recurrent-to-cell weights (\f$W_{hc}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, output_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, output_size].
      * * 8: The recurrent-to-output weights (\f$W_{ho}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, output_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, output_size].
      * * 9: The cell-to-input weights (\f$W_{ci}\f$). Optional.
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 10:The cell-to-forget weights (\f$W_{cf}\f$). Optional.
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 11:The cell-to-output weights (\f$W_{co}\f$). Optional.
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 12:The input gate bias (\f$b_i\f$). Optional.
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 13:The forget gate bias (\f$b_f\f$).
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 14:The cell bias (\f$b_c\f$).
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 15:The output gate bias (\f$b_o\f$).
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 16:The projection weights (\f$W_{proj}\f$). Optional.
-     *      A 2-D tensor of type T, of shape [output_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [output_size, num_units].
      * * 17:The projection bias (\f$b_{proj}\f$). Optional.
-     *      A 1-D tensor of type T, of shape [output_size].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [output_size].
      * * 18:The output state (in) (\f$h_{t-1}\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, output_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, output_size].
      * * 19:The cell state (in) (\f$C_{t-1}\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units].
      * * 20:The activation function (\f$g\f$).
      *      A value indicating the activation function:
      *      <ul>
@@ -814,38 +930,43 @@
      *      <li>4: Tanh;
      *      <li>6: Sigmoid.
      *      </ul>
-     * * 21:The clipping threshold (\f$t_{cell}\f$) for the cell state, such that values are bound
-     *      within [-cell_clip, cell_clip]. If set to 0.0 then clipping is
-     *      disabled.
-     * * 22:The clipping threshold (\f$t_{proj}\f$) for the output from the projection layer, such
-     *      that values are bound within [-proj_clip, proj_clip]. If set to 0.0
+     * * 21:The clipping threshold (\f$t_{cell}\f$) for the cell state, such
+     *      that values are bound within [-cell_clip, cell_clip]. If set to 0.0
      *      then clipping is disabled.
+     * * 22:The clipping threshold (\f$t_{proj}\f$) for the output from the
+     *      projection layer, such that values are bound within
+     *      [-proj_clip, proj_clip]. If set to 0.0 then clipping is disabled.
      *
      * Outputs:
      * * 0: The scratch buffer.
-     *      A 2-D tensor of type T, of shape [batch_size, num_units * 4] with
-     *      CIFG, or [batch_size, num_units * 3] without CIFG.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units * 4] with CIFG, or
+     *      [batch_size, num_units * 3] without CIFG.
      * * 1: The output state (out) (\f$h_t\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, output_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, output_size].
      * * 2: The cell state (out) (\f$C_t\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units].
      * * 3: The output (\f$o_t\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, output_size]. This is
-     *      effectively the same as the current “output state (out)” value.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, output_size]. This is effectively the same as the
+     *      current “output state (out)” value.
      */
     LSTM = 16,
 
     /**
      * Performs an 2-D max pooling operation.
      *
-     * The output dimensions are functions of the filter dimensions, stride, and padding.
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
      *
      * The values in the output tensor are computed as:
      *
      *     output[batch, row, col, channel] =
      *         max_{i, j} (input[batch, row + i, col + j, channel])
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -854,52 +975,68 @@
      * Both explicit padding and implicit padding are supported.
      *
      * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
-     * * 2: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the padding on the top, in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the padding on the bottom, in the ‘height’ dimension.
-     * * 5: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 6: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 7: An INT32 value, specifying the filter width.
-     * * 8: An INT32 value, specifying the filter height.
-     * * 9: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 7: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 8: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 9: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
      *      following values: {0 (NONE), 1 (SAME), 2 (VALID)}.
-     * * 2: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the filter width.
-     * * 5: An INT32 value, specifying the filter height.
-     * * 6: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 6: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth].
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth].
      */
     MAX_POOL_2D = 17,
 
     /**
      * Multiplies two tensors, element-wise.
      *
-     * Takes two input tensors of identical type and compatible dimensions. The output
-     * is the product of both input tensors, optionally modified by an activation function.
+     * Takes two input tensors of identical {@link OperandType} and compatible
+     * dimensions. The output is the product of both input tensors, optionally
+     * modified by an activation function.
      *
      * Two dimensions are compatible when:
      *     1. they are equal, or
      *     2. one of them is 1
      *
-     * The size of the resulting output is the maximum size along each dimension of the
-     * input operands. It starts with the trailing dimensions, and works its way forward.
+     * The size of the resulting output is the maximum size along each dimension
+     * of the input operands. It starts with the trailing dimensions, and works
+     * its way forward.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -907,14 +1044,17 @@
      *
      * Inputs:
      * * 0: A tensor.
-     * * 1: A tensor of the same type, and compatible dimensions as input0.
-     * * 2: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 1: A tensor of the same {@link OperandType}, and compatible dimensions
+     *      as input0.
+     * * 2: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The product, a tensor of the same type as input0.
-     *      For output tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the following
-     *      condition must be satisfied: output_scale > input1_scale * input2_scale.
+     * * 0: The product, a tensor of the same {@link OperandType} as input0.
+     *      For output tensor of {@link OperandType::TENSOR_QUANT8_ASYMM},
+     *      the following condition must be satisfied:
+     *      output_scale > input1_scale * input2_scale.
      */
     MUL = 18,
 
@@ -925,7 +1065,7 @@
      *
      *     output = max(0, input)
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -946,7 +1086,7 @@
      *
      *     output = min(1.f, max(-1.f, input))
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -967,7 +1107,7 @@
      *
      *     output = min(6, max(0, input))
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -984,10 +1124,10 @@
     /**
      * Reshapes a tensor.
      *
-     * Given tensor, this operation returns a tensor that has the same values as tensor,
-     * but with a newly specified shape.
+     * Given tensor, this operation returns a tensor that has the same values as
+     * tensor, but with a newly specified shape.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -995,9 +1135,9 @@
      *
      * Inputs:
      * * 0: A tensor, specifying the tensor to be reshaped.
-     * * 1: A 1-D tensor of type {@link OperandType::TENSOR_INT32}, defining the shape
-     *      of the output tensor. The number of elements implied by shape must be the same
-     *      as the number of elements in the input tensor.
+     * * 1: A 1-D tensor of {@link OperandType::TENSOR_INT32}, defining the
+     *      shape of the output tensor. The number of elements implied by shape
+     *      must be the same as the number of elements in the input tensor.
      *
      * Outputs:
      * * 0: The output tensor, of shape specified by the input shape.
@@ -1007,21 +1147,26 @@
     /**
      * Resizes images to given size using the bilinear interpretation.
      *
-     * Resized images must be distorted if their output aspect ratio is not the same as
-     * input aspect ratio.
+     * Resized images must be distorted if their output aspect ratio is not the
+     * same as input aspect ratio. The corner pixels of output may not be the
+     * same as corner pixels of input.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
      * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the output height of the output tensor.
-     * * 2: An INT32 value, specifying the output width of the output tensor.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the output
+     *      height of the output tensor.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the output
+     *      width of the output tensor.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, new_height, new_width, depth].
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, new_height, new_width, depth].
      */
     RESIZE_BILINEAR = 23,
 
@@ -1029,7 +1174,8 @@
      * A basic recurrent neural network layer.
      *
      * This layer implements the operation:
-     * outputs = state = activation(inputs * input_weights + state * recurrent_weights + bias)
+     * outputs = state = activation(inputs * input_weights +
+     *                              state * recurrent_weights + bias)
      *
      * Where:
      * * “input_weights” is a weight matrix that multiplies the inputs;
@@ -1040,42 +1186,49 @@
      * * “activation” is the function passed as the “fused_activation_function”
      *   argument (if not “NONE”).
      *
-     * Supported tensor types (Type T):
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Inputs:
      * * 0: input.
-     *      A 2-D tensor of type T, of shape [batch_size, input_size], where
-     *      “batch_size” corresponds to the batching dimension, and “input_size” is
-     *      the size of the input.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32} of shape
+     *      [batch_size, input_size], where “batch_size” corresponds to the
+     *      batching dimension, and “input_size” is the size of the input.
      * * 1: weights.
-     *      A 2-D tensor of type T, of shape [num_units, input_size], where
-     *      “num_units” corresponds to the number of units.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size], where “num_units” corresponds to the
+     *      number of units.
      * * 2: recurrent_weights.
-     *      A 2-D tensor of type T, of shape [num_units, num_units], with columns
-     *      corresponding to the weights from each unit.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, num_units], with columns corresponding to the weights
+     *      from each unit.
      * * 3: bias.
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 4: hidden state (in).
-     *      A 2-D tensor of type T, of shape [batch_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units].
      * * 5: fused_activation_function.
-     *      An optional {@link FusedActivationFunc} value indicating the activation
-     *      function. If “NONE” is specified then it results in a linear
-     *      activation.
+     *      An optional {@link FusedActivationFunc} value indicating the
+     *      activation function. If “NONE” is specified then it results in a
+     *      linear activation.
      *
      * Outputs:
      * * 0: hidden state (out).
-     *      A 2-D tensor of type T, of shape [batch_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units].
      *
      * * 1: output.
-     *      A 2-D tensor of type T, of shape [batch_size, num_units]. This is
-     *      effectively the same as the current state value.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units]. This is effectively the same as the
+     *      current state value.
      */
     RNN = 24,
 
     /**
-     * Computes the softmax activation on the input tensor element-wise, per batch, by
-     * normalizing the input vector so the maximum coefficient is zero.
+     * Computes the softmax activation on the input tensor element-wise, per
+     * batch, by normalizing the input vector so the maximum coefficient is
+     * zero.
      *
      * The output is calculated using this formula:
      *
@@ -1083,7 +1236,7 @@
      *         exp((input[batch, i] - max(input[batch, :])) * beta) /
      *         sum_{k}{exp((input[batch, k] - max(input[batch, :])) * beta)}
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -1091,11 +1244,12 @@
      *
      * Inputs:
      * * 0: A 2-D or 4-D tensor, specifying the tensor to be reshaped.
-     * * 1: A FLOAT32 value, specifying the positive scaling factor for the exponent, beta.
+     * * 1: An {@link OperandType::FLOAT32} scalar, specifying the positive
+     *      scaling factor for the exponent, beta.
      *
      * Outputs:
      * * 0: The output tensor of same shape as input0.
-     *      For {@link OperandType::TENSOR_QUANT8_ASYMM} type,
+     *      For {@link OperandType::TENSOR_QUANT8_ASYMM},
      *      the scale must be 1.f / 256 and the zeroPoint must be 0.
      */
     SOFTMAX = 25,
@@ -1103,30 +1257,33 @@
     /**
      * Rearranges blocks of spatial data, into depth.
      *
-     * More specifically, this op outputs a copy of the input tensor where values from
-     * the height and width dimensions are moved to the depth dimension.
-     * The value block_size indicates the input block size and how the data is moved.
+     * More specifically, this op outputs a copy of the input tensor where
+     * values from the height and width dimensions are moved to the depth
+     * dimension. The value block_size indicates the input block size and how
+     * the data is moved.
      *
-     * Chunks of data of size block_size * block_size from depth are rearranged into
-     * non-overlapping blocks of size block_size x block_size.
+     * Chunks of data of size block_size * block_size from depth are rearranged
+     * into non-overlapping blocks of size block_size x block_size.
      *
      * The depth of the output tensor is input_depth * block_size * block_size.
      * The input tensor's height and width must be divisible by block_size.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
      * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
-     * * 1: An INT32 value, specifying the block_size. block_size must be >=1 and
-     *      block_size must be a divisor of both the input height and width.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the block_size.
+     *      block_size must be >=1 and block_size must be a divisor of both the
+     *      input height and width.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batch, height/block_size, width/block_size,
-     *      depth*block_size*block_size].
+     * * 0: The output 4-D tensor, of shape [batch, height/block_size,
+     *      width/block_size, depth*block_size*block_size].
      */
     SPACE_TO_DEPTH = 26,
 
@@ -1143,21 +1300,22 @@
      * INTERSPEECH, 2015.
      *
      * It processes the incoming input using a 2-stage filtering mechanism:
-     * * stage 1 performs filtering on the "features" dimension, whose outputs get
-     *   pushed into a memory of fixed-size memory_size.
+     * * stage 1 performs filtering on the "features" dimension, whose outputs
+     *   get pushed into a memory of fixed-size memory_size.
      * * stage 2 performs filtering on the "time" dimension of the memory_size
      *   memoized outputs of stage 1.
      *
      * Specifically, for rank 1, this layer implements the operation:
      *
-     *     memory = push(conv1d(inputs, weights_feature, feature_dim, "PADDING_VALID"));
+     *     memory = push(conv1d(inputs, weights_feature, feature_dim,
+     *                          "PADDING_VALID"));
      *     outputs = activation(memory * weights_time + bias);
      *
      * Where:
      * * “weights_feature” is a weights matrix that processes the inputs (by
-     *   convolving the input with every “feature filter”), and whose outputs get
-     *   pushed, stacked in order, into the fixed-size “memory” (the oldest entry
-     *   gets dropped);
+     *   convolving the input with every “feature filter”), and whose outputs
+     *   get pushed, stacked in order, into the fixed-size “memory” (the oldest
+     *   entry gets dropped);
      * * “weights_time” is a weights matrix that processes the “memory” (by a
      *   batched matrix multiplication on the num_units);
      * * “bias” is an optional bias vector (added to each output vector in the
@@ -1168,35 +1326,42 @@
      * Each rank adds a dimension to the weights matrices by means of stacking
      * the filters.
      *
-     * Supported tensor types (type T):
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Inputs:
      * * 0: input.
-     *      A 2-D tensor of type T, of shape [batch_size, input_size], where
-     *      “batch_size” corresponds to the batching dimension, and “input_size” is
-     *      the size of the input.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, input_size], where “batch_size” corresponds to the
+     *      batching dimension, and “input_size” is the size of the input.
      * * 1: weights_feature.
-     *      A 2-D tensor of type T, of shape [num_units, input_size], where
-     *      “num_units” corresponds to the number of units.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size], where “num_units” corresponds to the
+     *      number of units.
      * * 2: weights_time.
-     *      A 2-D tensor of type T, of shape [num_units, memory_size], where
-     *      “memory_size” corresponds to the fixed-size of the memory.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, memory_size], where “memory_size” corresponds to the
+     *      fixed-size of the memory.
      * * 3: bias.
-     *      An optional 1-D tensor of type T, of shape [num_units].
+     *      An optional 1-D tensor of {@link OperandType::TENSOR_FLOAT32},
+     *      of shape [num_units].
      * * 4: state (in).
-     *      A 2-D tensor of type T, of shape [batch_size, (memory_size - 1) * num_units * rank].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, (memory_size - 1) * num_units * rank].
      * * 5: rank.
      *      The rank of the SVD approximation.
      * * 6: fused_activation_function.
-     *      An optional {@link FusedActivationFunc} value indicating the activation function.
-     *      If “NONE” is specified then it results in a linear activation.
+     *      An optional {@link FusedActivationFunc} value indicating the
+     *      activation function. If “NONE” is specified then it results in a
+     *      linear activation.
      *
      * Outputs:
      * * 0: state (out).
-     *      A 2-D tensor of type T, of shape [batch_size, (memory_size - 1) * num_units * rank].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, (memory_size - 1) * num_units * rank].
      * * 1: output.
-     *      A 2-D tensor of type T, of shape [batch_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+         *      [batch_size, num_units].
      */
     SVDF = 27,
 
@@ -1207,7 +1372,7 @@
      *
      *     output = tanh(input)
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: up to 4.
@@ -1223,7 +1388,8 @@
     /**
      * OEM specific operation.
      *
-     * This operation is OEM specific. It should only be used for OEM applications.
+     * This operation is OEM specific. It should only be used for OEM
+     * applications.
      */
     OEM_OPERATION = 10000,
 };
@@ -1270,8 +1436,8 @@
     CONSTANT_REFERENCE,
 
     /**
-     * The operand does not have a value. This is valid only for optional arguments
-     * of operations.
+     * The operand does not have a value. This is valid only for optional
+     * arguments of operations.
      */
     NO_VALUE,
 };
@@ -1387,7 +1553,8 @@
 
     /**
      * Where to find the data for this operand.
-     * If the lifetime is TEMPORARY_VARIABLE, MODEL_INPUT, MODEL_OUTPUT, or NO_VALUE:
+     * If the lifetime is TEMPORARY_VARIABLE, MODEL_INPUT, MODEL_OUTPUT, or
+     * NO_VALUE:
      * - All the fields must be 0.
      * If the lifetime is CONSTANT_COPY:
      * - location.poolIndex is 0.
@@ -1481,9 +1648,9 @@
  */
 struct RequestArgument {
     /**
-     * If true, the argument does not have a value. This can be used for operations
-     * that take optional arguments. If true, the fields of location are set to 0 and
-     * the dimensions vector is left empty.
+     * If true, the argument does not have a value. This can be used for
+     * operations that take optional arguments. If true, the fields of location
+     * are set to 0 and the dimensions vector is left empty.
      */
     bool hasNoValue;
 
@@ -1495,10 +1662,10 @@
     /**
      * Updated dimension information.
      *
-     * If dimensions.size() > 0, dimension information was provided along with the
-     * argument. This can be the case for models that accept inputs of varying size.
-     * This can't change the rank, just the value of the dimensions that were
-     * unspecified in the model.
+     * If dimensions.size() > 0, dimension information was provided along with
+     * the argument. This can be the case for models that accept inputs of
+     * varying size. This can't change the rank, just the value of the
+     * dimensions that were unspecified in the model.
      */
     vec<uint32_t> dimensions;
 };
diff --git a/neuralnetworks/1.0/vts/functional/GeneratedTestHarness.cpp b/neuralnetworks/1.0/vts/functional/GeneratedTestHarness.cpp
index ed1fb94..0682ab9 100644
--- a/neuralnetworks/1.0/vts/functional/GeneratedTestHarness.cpp
+++ b/neuralnetworks/1.0/vts/functional/GeneratedTestHarness.cpp
@@ -36,16 +36,16 @@
 namespace generated_tests {
 using ::android::hardware::neuralnetworks::V1_0::implementation::ExecutionCallback;
 using ::android::hardware::neuralnetworks::V1_0::implementation::PreparedModelCallback;
-using ::generated_tests::filter;
-using ::generated_tests::for_all;
-using ::generated_tests::for_each;
-using ::generated_tests::resize_accordingly;
-using ::generated_tests::MixedTyped;
-using ::generated_tests::MixedTypedExampleType;
-using ::generated_tests::Float32Operands;
-using ::generated_tests::Int32Operands;
-using ::generated_tests::Quant8Operands;
-using ::generated_tests::compare;
+using ::test_helper::filter;
+using ::test_helper::for_all;
+using ::test_helper::for_each;
+using ::test_helper::resize_accordingly;
+using ::test_helper::MixedTyped;
+using ::test_helper::MixedTypedExampleType;
+using ::test_helper::Float32Operands;
+using ::test_helper::Int32Operands;
+using ::test_helper::Quant8Operands;
+using ::test_helper::compare;
 
 template <typename T>
 void copy_back_(MixedTyped* dst, const std::vector<RequestArgument>& ra, char* src) {
diff --git a/neuralnetworks/1.0/vts/functional/GeneratedTests.cpp b/neuralnetworks/1.0/vts/functional/GeneratedTests.cpp
index 2107333..d84479c 100644
--- a/neuralnetworks/1.0/vts/functional/GeneratedTests.cpp
+++ b/neuralnetworks/1.0/vts/functional/GeneratedTests.cpp
@@ -31,7 +31,7 @@
 namespace neuralnetworks {
 
 namespace generated_tests {
-using ::generated_tests::MixedTypedExampleType;
+using ::test_helper::MixedTypedExampleType;
 extern void Execute(const sp<V1_0::IDevice>&, std::function<V1_0::Model(void)>,
                     std::function<bool(int)>, const std::vector<MixedTypedExampleType>&);
 }  // namespace generated_tests
@@ -45,7 +45,7 @@
 using ::android::nn::allocateSharedMemory;
 
 // Mixed-typed examples
-typedef generated_tests::MixedTypedExampleType MixedTypedExample;
+typedef test_helper::MixedTypedExampleType MixedTypedExample;
 
 // in frameworks/ml/nn/runtime/tests/generated/
 #include "all_generated_V1_0_vts_tests.cpp"
diff --git a/neuralnetworks/1.0/vts/functional/Models.h b/neuralnetworks/1.0/vts/functional/Models.h
index a1fbe92..751ab32 100644
--- a/neuralnetworks/1.0/vts/functional/Models.h
+++ b/neuralnetworks/1.0/vts/functional/Models.h
@@ -30,7 +30,7 @@
 namespace vts {
 namespace functional {
 
-using MixedTypedExample = generated_tests::MixedTypedExampleType;
+using MixedTypedExample = test_helper::MixedTypedExampleType;
 
 #define FOR_EACH_TEST_MODEL(FN)                          \
     FN(add_broadcast_quant8)                             \
diff --git a/neuralnetworks/1.0/vts/functional/ValidateRequest.cpp b/neuralnetworks/1.0/vts/functional/ValidateRequest.cpp
index 08f2613..09c1878 100644
--- a/neuralnetworks/1.0/vts/functional/ValidateRequest.cpp
+++ b/neuralnetworks/1.0/vts/functional/ValidateRequest.cpp
@@ -36,9 +36,9 @@
 using ::android::hardware::neuralnetworks::V1_0::implementation::ExecutionCallback;
 using ::android::hardware::neuralnetworks::V1_0::implementation::PreparedModelCallback;
 using ::android::hidl::memory::V1_0::IMemory;
-using generated_tests::MixedTyped;
-using generated_tests::MixedTypedExampleType;
-using generated_tests::for_all;
+using test_helper::MixedTyped;
+using test_helper::MixedTypedExampleType;
+using test_helper::for_all;
 
 ///////////////////////// UTILITY FUNCTIONS /////////////////////////
 
diff --git a/neuralnetworks/1.1/types.hal b/neuralnetworks/1.1/types.hal
index 8290fbb..e4c656d 100644
--- a/neuralnetworks/1.1/types.hal
+++ b/neuralnetworks/1.1/types.hal
@@ -29,87 +29,95 @@
     /**
      * BatchToSpace for N-dimensional tensors.
      *
-     * This operation reshapes the batch dimension (dimension 0) into M + 1 dimensions of shape
-     * block_shape + [batch], interleaves these blocks back into the grid defined by the
-     * spatial dimensions [1, ..., M], to obtain a result with the same rank as the input.
+     * This operation reshapes the batch dimension (dimension 0) into M + 1
+     * dimensions of shape block_shape + [batch], interleaves these blocks back
+     * into the grid defined by the spatial dimensions [1, ..., M], to obtain a
+     * result with the same rank as the input.
      *
      * This is the reverse of SpaceToBatch.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the tensor to be reshaped
-     * 1: A 1-D Tensor of type TENSOR_INT32, the block sizes for each spatial dimension of the
-     *    input tensor. All values must be >= 1.
+     * * 0: An n-D tensor, specifying the tensor to be reshaped
+     * * 1: A 1-D Tensor of {@link OperandType::TENSOR_INT32}, the block
+     *      sizes for each spatial dimension of the input tensor. All values
+     *      must be >= 1.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     BATCH_TO_SPACE_ND = 29,
 
     /**
      * Element-wise division of two tensors.
      *
-     * Takes two input tensors of identical type and compatible dimensions. The output
-     * is the result of dividing the first input tensor by the second, optionally
-     * modified by an activation function.
+     * Takes two input tensors of identical {@link OperandType} and compatible
+     * dimensions. The output is the result of dividing the first input tensor
+     * by the second, optionally modified by an activation function.
      *
      * Two dimensions are compatible when:
      *     1. they are equal, or
      *     2. one of them is 1
      *
-     * The size of the output is the maximum size along each dimension of the input operands.
-     * It starts with the trailing dimensions, and works its way forward.
+     * The size of the output is the maximum size along each dimension of the
+     * input operands. It starts with the trailing dimensions, and works its way
+     * forward.
      *
      * Example:
      *     input1.dimension =    {4, 1, 2}
      *     input2.dimension = {5, 4, 3, 1}
      *     output.dimension = {5, 4, 3, 2}
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the first input.
-     * 1: A tensor of the same type, and compatible dimensions as input0.
-     * 2: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *    Specifies the activation to invoke on the result of each addition.
+     * * 0: An n-D tensor, specifying the first input.
+     * * 1: A tensor of the same {@link OperandType}, and compatible dimensions
+     *      as input0.
+     * * 2: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     DIV = 30,
 
     /**
      * Computes the mean of elements across dimensions of a tensor.
      *
-     * Reduces the input tensor along the given dimensions to reduce. Unless keep_dims
-     * is true, the rank of the tensor is reduced by 1 for each entry in axis.
-     * If keep_dims is true, the reduced dimensions are retained with length 1.
+     * Reduces the input tensor along the given dimensions to reduce. Unless
+     * keep_dims is true, the rank of the tensor is reduced by 1 for each entry
+     * in axis. If keep_dims is true, the reduced dimensions are retained with
+     * length 1.
      *
-     * If dimensions to reduce have no entries, all dimensions are reduced, and a tensor with
-     * a single element is returned.
+     * If dimensions to reduce have no entries, all dimensions are reduced, and
+     * a tensor with a single element is returned.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: A tensor, specifying the input.
-     * 1: A 1-D Tensor of type TENSOR_INT32. The dimensions to reduce. If None (the default),
-     *    reduces all dimensions. Must be in the range [-rank(input_tensor), rank(input_tensor)).
-     * 2: An INT32 value, keep_dims. If positive, retains reduced dimensions with length 1.
+     * * 0: A tensor, specifying the input.
+     * * 1: A 1-D Tensor of {@link OperandType::TENSOR_INT32}. The dimensions
+     *      to reduce. If None (the default), reduces all dimensions. Must be in
+     *      the range [-rank(input_tensor), rank(input_tensor)).
+     * * 2: An {@link OperandType::INT32} scalar, keep_dims. If positive,
+     *      retains reduced dimensions with length 1.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     MEAN = 31,
 
@@ -118,163 +126,193 @@
      *
      * This operation pads a tensor according to the specified paddings.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the tensor to be padded.
-     * 1: A 2-D Tensor of type TENSOR_INT32, the paddings for each spatial dimension of the
-     *    input tensor. The shape of the tensor must be {rank(input0), 2}.
-     *    padding[i, 0] specifies the number of element to be padded in the front of dimension i.
-     *    padding[i, 1] specifies the number of element to be padded after the end of dimension i.
+     * * 0: An n-D tensor, specifying the tensor to be padded.
+     * * 1: A 2-D Tensor of {@link OperandType::TENSOR_INT32}, the paddings
+     *      for each spatial dimension of the input tensor. The shape of the
+     *      tensor must be {rank(input0), 2}.
+     *      padding[i, 0] specifies the number of element to be padded in the
+     *      front of dimension i.
+     *      padding[i, 1] specifies the number of element to be padded after the
+     *      end of dimension i.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     PAD = 32,
 
     /**
      * SpaceToBatch for N-Dimensional tensors.
      *
-     * This operation divides "spatial" dimensions [1, ..., M] of the input into a grid of blocks
-     * of shape block_shape, and interleaves these blocks with the "batch" dimension (0) such that
-     * in the output, the spatial dimensions [1, ..., M] correspond to the position within the grid,
-     * and the batch dimension combines both the position within a spatial block and the original
-     * batch position. Prior to division into blocks, the spatial dimensions of the input are
-     * optionally zero padded according to paddings.
+     * This operation divides "spatial" dimensions [1, ..., M] of the input into
+     * a grid of blocks of shape block_shape, and interleaves these blocks with
+     * the "batch" dimension (0) such that in the output, the spatial dimensions
+     * [1, ..., M] correspond to the position within the grid, and the batch
+     * dimension combines both the position within a spatial block and the
+     * original batch position. Prior to division into blocks, the spatial
+     * dimensions of the input are optionally zero padded according to paddings.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the input.
-     * 1: A 1-D Tensor of type TENSOR_INT32, the block sizes for each spatial dimension of the
-     *    input tensor. All values must be >= 1.
-     * 2: A 2-D Tensor of type TENSOR_INT32, the paddings for each spatial diemension of the
-     *    input tensor. All values must be >= 0. The shape of the tensor must be {rank(input0), 2}.
-     *    padding[i, 0] specifies the number of element to be padded in the front of dimension i.
-     *    padding[i, 1] specifies the number of element to be padded after the end of dimension i.
+     * * 0: An n-D tensor, specifying the input.
+     * * 1: A 1-D Tensor of {@link OperandType::TENSOR_INT32}, the block
+     *      sizes for each spatial dimension of the input tensor. All values
+     *      must be >= 1.
+     * * 2: A 2-D Tensor of {@link OperandType::TENSOR_INT32}, the paddings
+     *      for each spatial dimension of the input tensor. All values must be
+     *      >= 0. The shape of the tensor must be {rank(input0), 2}.
+     *      padding[i, 0] specifies the number of element to be padded in the
+     *      front of dimension i.
+     *      padding[i, 1] specifies the number of element to be padded after the
+     *      end of dimension i.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     SPACE_TO_BATCH_ND = 33,
 
     /**
      * Removes dimensions of size 1 from the shape of a tensor.
      *
-     * Given a tensor input, this operation returns a tensor of the same type with all
-     * dimensions of size 1 removed. If you don't want to remove all size 1 dimensions,
-     * you can remove specific size 1 dimensions by specifying the axes (input1).
+     * Given a tensor input, this operation returns a tensor of the same
+     * {@link OperandType} with all dimensions of size 1 removed. If you don't
+     * want to remove all size 1 dimensions, you can remove specific size 1
+     * dimensions by specifying the axes (input1).
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, the tensor to be squeezed.
-     * 1: An optional 1-D tensor of type TENSOR_INT32. The dimensions to squeeze. If specified
-     *    only squeezes the dimensions listed. Otherwise, squeezes all dimensions.
-     *    The dimension index starts at 0. An error must be reported if squeezing a dimension that
-     *    is not 1.
+     * * 0: An n-D tensor, the tensor to be squeezed.
+     * * 1: An optional 1-D tensor of {@link OperandType::TENSOR_INT32}. The
+     *      dimensions to squeeze. If specified only squeezes the dimensions
+     *      listed. Otherwise, squeezes all dimensions. The dimension index
+     *      starts at 0. An error must be reported if squeezing a dimension that
+     *      is not 1.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0. Contains the same data as input, but has one or more
-     *    dimensions of size 1 removed.
+     * * 0: A tensor of the same {@link OperandType} as input0. Contains the
+     *      same data as input, but has one or more dimensions of size 1
+     *      removed.
      */
     SQUEEZE = 34,
 
     /**
      * Extracts a strided slice of a tensor.
      *
-     * Roughly speaking, this op extracts a slice of size (end - begin) / stride from the given
-     * input tensor. Starting at the location specified by begin the slice continues by adding
-     * stride to the index until all dimensions are not less than end. Note that a stride can
-     * be negative, which causes a reverse slice.
+     * Roughly speaking, this op extracts a slice of size (end - begin) / stride
+     * from the given input tensor. Starting at the location specified by begin
+     * the slice continues by adding stride to the index until all dimensions
+     * are not less than end. Note that a stride can be negative, which causes a
+     * reverse slice.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the tensor to be sliced.
-     * 1: A 1-D Tensor of type TENSOR_INT32, the starts of the dimensions of the input
-     *    tensor to be sliced. The length must be of rank(input0).
-     * 2: A 1-D Tensor of type TENSOR_INT32, the ends of the dimensions of the input
-     *    tensor to be sliced. The length must be of rank(input0).
-     * 3: A 1-D Tensor of type TENSOR_INT32, the strides of the dimensions of the input
-     *    tensor to be sliced. The length must be of rank(input0).
+     * * 0: An n-D tensor, specifying the tensor to be sliced.
+     * * 1: A 1-D Tensor of {@link OperandType::TENSOR_INT32}, the starts of
+     *      the dimensions of the input tensor to be sliced. The length must be
+     *      of rank(input0).
+     * * 2: A 1-D Tensor of {@link OperandType::TENSOR_INT32}, the ends of
+     *      the dimensions of the input tensor to be sliced. The length must be
+     *      of rank(input0).
+     * * 3: A 1-D Tensor of {@link OperandType::TENSOR_INT32}, the strides of
+     *      the dimensions of the input tensor to be sliced. The length must be
+     *      of rank(input0).
+     * * 4: An {@link OperandType::INT32} scalar, begin_mask. If the ith bit
+     *      of begin_mask is set, begin[i] is ignored and the fullest possible
+     *      range in that dimension is used instead.
+     * * 5: An {@link OperandType::INT32} scalar, end_mask. If the ith bit of
+     *      end_mask is set, end[i] is ignored and the fullest possible range in
+     *      that dimension is used instead.
+     * * 6: An {@link OperandType::INT32} scalar, shrink_axis_mask. An int32
+     *      mask. If the ith bit of shrink_axis_mask is set, it implies that the
+     *      ith specification shrinks the dimensionality by 1. A slice of size 1
+     *      starting from begin[i] in the dimension must be preserved.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     STRIDED_SLICE = 35,
 
     /**
      * Element-wise subtraction of two tensors.
      *
-     * Takes two input tensors of identical type and compatible dimensions. The output
-     * is the result of subtracting the second input tensor from the first one, optionally
-     * modified by an activation function.
+     * Takes two input tensors of identical {@link OperandType} and compatible
+     * dimensions. The output is the result of subtracting the second input
+     * tensor from the first one, optionally modified by an activation function.
      *
      * Two dimensions are compatible when:
      *     1. they are equal, or
      *     2. one of them is 1
      *
-     * The size of the output is the maximum size along each dimension of the input operands.
-     * It starts with the trailing dimensions, and works its way forward.
+     * The size of the output is the maximum size along each dimension of the
+     * input operands. It starts with the trailing dimensions, and works its way
+     * forward.
      *
      * Example:
      *     input1.dimension =    {4, 1, 2}
      *     input2.dimension = {5, 4, 3, 1}
      *     output.dimension = {5, 4, 3, 2}
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the first input.
-     * 1: A tensor of the same type, and compatible dimensions as input0.
-     * 2: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *    Specifies the activation to invoke on the result of each addition.
+     * * 0: An n-D tensor, specifying the first input.
+     * * 1: A tensor of the same {@link OperandType}, and compatible dimensions
+     *      as input0.
+     * * 2: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     SUB = 36,
 
     /**
-     * Transposes the input tensor, permuting the dimensions according to the perm tensor.
+     * Transposes the input tensor, permuting the dimensions according to the
+     * perm tensor.
      *
-     * The returned tensor's dimension i corresponds to the input dimension perm[i].
-     * If perm is not given, it is set to (n-1...0), where n is the rank of the input tensor.
-     * Hence by default, this operation performs a regular matrix transpose on 2-D input Tensors.
+     * The returned tensor's dimension i corresponds to the input dimension
+     * perm[i]. If perm is not given, it is set to (n-1...0), where n is the
+     * rank of the input tensor. Hence by default, this operation performs a
+     * regular matrix transpose on 2-D input Tensors.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the tensor to be transposed.
-     * 1: An optional 1-D Tensor of type TENSOR_INT32, the permutation of the dimensions of the
-     *    input tensor.
+     * * 0: An n-D tensor, specifying the tensor to be transposed.
+     * * 1: An optional 1-D Tensor of {@link OperandType::TENSOR_INT32},
+     *      the permutation of the dimensions of the input tensor.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     TRANSPOSE = 37,
 };
diff --git a/neuralnetworks/1.1/vts/functional/GeneratedTests.cpp b/neuralnetworks/1.1/vts/functional/GeneratedTests.cpp
index 1f1cc7a..95c2b1a 100644
--- a/neuralnetworks/1.1/vts/functional/GeneratedTests.cpp
+++ b/neuralnetworks/1.1/vts/functional/GeneratedTests.cpp
@@ -31,7 +31,7 @@
 namespace neuralnetworks {
 
 namespace generated_tests {
-using ::generated_tests::MixedTypedExampleType;
+using ::test_helper::MixedTypedExampleType;
 extern void Execute(const sp<V1_1::IDevice>&, std::function<V1_1::Model(void)>,
                     std::function<bool(int)>, const std::vector<MixedTypedExampleType>&);
 }  // namespace generated_tests
diff --git a/neuralnetworks/1.1/vts/functional/Models.h b/neuralnetworks/1.1/vts/functional/Models.h
index 7fb2696..cc0fac1 100644
--- a/neuralnetworks/1.1/vts/functional/Models.h
+++ b/neuralnetworks/1.1/vts/functional/Models.h
@@ -31,7 +31,7 @@
 namespace vts {
 namespace functional {
 
-using MixedTypedExample = generated_tests::MixedTypedExampleType;
+using MixedTypedExample = test_helper::MixedTypedExampleType;
 
 #define FOR_EACH_TEST_MODEL(FN)                                  \
     FN(add)                                                      \
diff --git a/neuralnetworks/1.1/vts/functional/ValidateRequest.cpp b/neuralnetworks/1.1/vts/functional/ValidateRequest.cpp
index b42f561..687b760 100644
--- a/neuralnetworks/1.1/vts/functional/ValidateRequest.cpp
+++ b/neuralnetworks/1.1/vts/functional/ValidateRequest.cpp
@@ -36,9 +36,9 @@
 using ::android::hardware::neuralnetworks::V1_0::implementation::ExecutionCallback;
 using ::android::hardware::neuralnetworks::V1_0::implementation::PreparedModelCallback;
 using ::android::hidl::memory::V1_0::IMemory;
-using generated_tests::MixedTyped;
-using generated_tests::MixedTypedExampleType;
-using generated_tests::for_all;
+using test_helper::MixedTyped;
+using test_helper::MixedTypedExampleType;
+using test_helper::for_all;
 
 ///////////////////////// UTILITY FUNCTIONS /////////////////////////