Merge "Fix bug in VTS attestation cert verification."
diff --git a/audio/2.0/default/PrimaryDevice.cpp b/audio/2.0/default/PrimaryDevice.cpp
index a4a8206..aaf8991 100644
--- a/audio/2.0/default/PrimaryDevice.cpp
+++ b/audio/2.0/default/PrimaryDevice.cpp
@@ -179,17 +179,56 @@
     return mDevice->setParam(AUDIO_PARAMETER_KEY_BT_SCO_WB, enabled);
 }
 
+static const char* convertTtyModeFromHIDL(IPrimaryDevice::TtyMode mode) {
+    switch (mode) {
+        case IPrimaryDevice::TtyMode::OFF:
+            return AUDIO_PARAMETER_VALUE_TTY_OFF;
+        case IPrimaryDevice::TtyMode::VCO:
+            return AUDIO_PARAMETER_VALUE_TTY_VCO;
+        case IPrimaryDevice::TtyMode::HCO:
+            return AUDIO_PARAMETER_VALUE_TTY_HCO;
+        case IPrimaryDevice::TtyMode::FULL:
+            return AUDIO_PARAMETER_VALUE_TTY_FULL;
+        default:
+            return nullptr;
+    }
+}
+static IPrimaryDevice::TtyMode convertTtyModeToHIDL(const char* halMode) {
+    if (strcmp(halMode, AUDIO_PARAMETER_VALUE_TTY_OFF) == 0)
+        return IPrimaryDevice::TtyMode::OFF;
+    else if (strcmp(halMode, AUDIO_PARAMETER_VALUE_TTY_VCO) == 0)
+        return IPrimaryDevice::TtyMode::VCO;
+    else if (strcmp(halMode, AUDIO_PARAMETER_VALUE_TTY_HCO) == 0)
+        return IPrimaryDevice::TtyMode::HCO;
+    else if (strcmp(halMode, AUDIO_PARAMETER_VALUE_TTY_FULL) == 0)
+        return IPrimaryDevice::TtyMode::FULL;
+    return IPrimaryDevice::TtyMode(-1);
+}
+
 Return<void> PrimaryDevice::getTtyMode(getTtyMode_cb _hidl_cb) {
-    int halMode;
+    String8 halMode;
     Result retval = mDevice->getParam(AUDIO_PARAMETER_KEY_TTY_MODE, &halMode);
-    TtyMode mode = retval == Result::OK ? TtyMode(halMode) : TtyMode::OFF;
-    _hidl_cb(retval, mode);
+    if (retval != Result::OK) {
+        _hidl_cb(retval, TtyMode::OFF);
+        return Void();
+    }
+    TtyMode mode = convertTtyModeToHIDL(halMode);
+    if (mode == TtyMode(-1)) {
+        ALOGE("HAL returned invalid TTY value: %s", halMode.c_str());
+        _hidl_cb(Result::INVALID_STATE, TtyMode::OFF);
+        return Void();
+    }
+    _hidl_cb(Result::OK, mode);
     return Void();
 }
 
 Return<Result> PrimaryDevice::setTtyMode(IPrimaryDevice::TtyMode mode) {
-    return mDevice->setParam(AUDIO_PARAMETER_KEY_TTY_MODE,
-                             static_cast<int>(mode));
+    const char* modeStr = convertTtyModeFromHIDL(mode);
+    if (modeStr == nullptr) {
+        ALOGW("Can not set an invalid TTY value: %d", mode);
+        return Result::INVALID_ARGUMENTS;
+    }
+    return mDevice->setParam(AUDIO_PARAMETER_KEY_TTY_MODE, modeStr);
 }
 
 Return<void> PrimaryDevice::getHacEnabled(getHacEnabled_cb _hidl_cb) {
diff --git a/broadcastradio/1.0/types.hal b/broadcastradio/1.0/types.hal
index 8c3ec11..259c7c9 100644
--- a/broadcastradio/1.0/types.hal
+++ b/broadcastradio/1.0/types.hal
@@ -136,7 +136,8 @@
     uint32_t        numAudioSources;
     /** the hardware supports capture of audio source from audio HAL */
     bool            supportsCapture;
-    vec<BandConfig> bands; /** band descriptors */
+    /** band descriptors */
+    vec<BandConfig> bands;
 };
 
 enum MetadataType : int32_t {
@@ -229,6 +230,7 @@
      */
     uint32_t signalStrength;
 
-    vec<MetaData> metadata; /** Metadata: PTY, song title etc. */
+    /** Metadata: PTY, song title etc. */
+    vec<MetaData> metadata;
 };
 
diff --git a/configstore/1.0/default/surfaceflinger.mk b/configstore/1.0/default/surfaceflinger.mk
index f7487d5..1987607 100644
--- a/configstore/1.0/default/surfaceflinger.mk
+++ b/configstore/1.0/default/surfaceflinger.mk
@@ -9,14 +9,6 @@
     LOCAL_CFLAGS += -DSF_VSYNC_EVENT_PHASE_OFFSET_NS=$(SF_VSYNC_EVENT_PHASE_OFFSET_NS)
 endif
 
-ifeq ($(TARGET_BOARD_PLATFORM),omap4)
-    LOCAL_CFLAGS += -DUSE_CONTEXT_PRIORITY=1
-endif
-
-ifeq ($(TARGET_BOARD_PLATFORM),s5pc110)
-    LOCAL_CFLAGS += -DUSE_CONTEXT_PRIORITY=1
-endif
-
 ifeq ($(TARGET_USE_CONTEXT_PRIORITY),true)
     LOCAL_CFLAGS += -DUSE_CONTEXT_PRIORITY=1
 endif
diff --git a/configstore/README.md b/configstore/README.md
new file mode 100644
index 0000000..3e8a24e
--- /dev/null
+++ b/configstore/README.md
@@ -0,0 +1 @@
+Configstore is specifically the configuration for surface flinger. Other configurations go in other packages.
diff --git a/current.txt b/current.txt
index fe76327..28f0f99 100644
--- a/current.txt
+++ b/current.txt
@@ -249,5 +249,18 @@
 # Future changes to HALs
 5804ca86611d72e5481f022b3a0c1b334217f2e4988dad25730c42af2d1f4d1c android.hardware.neuralnetworks@1.0::IDevice
 12e8dca4ab7d8aadd0ef8f1b438021938e2396139e85db2ed65783b08800aa52 android.hardware.neuralnetworks@1.0::IExecutionCallback
-702f9a4cd3b7486a4b04f7155b737757ac2ca4b3548976d5782ad3cae9ff9780 android.hardware.neuralnetworks@1.0::types
+18e6885e184fe48401c2c53f1d1b8bfb07240f40c81ae6b9d2e336fca6efdbb7 android.hardware.neuralnetworks@1.0::types
 
+# Documentation fixups for b/78135149
+9e7a0b650d0e461ece2cfec0e1072abf8676f592b41a7fb48f01e88fc3c8f780 android.hardware.broadcastradio@1.0::types
+190ea4898809de6cf379afe318f5fa9564686157b24d9a2d7f5698b0c977d8b2 android.hardware.graphics.bufferqueue@1.0::IGraphicBufferProducer
+25892789b50eb673506b6c5a2cdab5d9aa428d41608aab10280cc898538b524a android.hardware.graphics.composer@2.1::IComposerClient
+e205dd30f5ff99445b706a901de8ebc46c379e9d7c1921d6a327ed2082cfa83d android.hardware.graphics.composer@2.1::types
+a46251718abfada458dc64c41ce94915757bf6c87cfa2d9e99cfb01fa8e32331 android.hardware.graphics.mapper@2.0::IMapper
+bd33ac23c57b4a07632691d2191bc2c93930f57e62f4ccf459748fdaa5c0f480 android.hardware.graphics.mapper@2.0::types
+ad8a28ca3a5549fb9bc24cf5f80ac8f660cc27be885210d76266780aa52ddb8d android.hardware.keymaster@3.0::types
+f96cbc59dfe16c8d0c2a7e06db24d8738a6328b6e90f7b8e1640ea2b4600debd android.hardware.radio@1.1::ISap
+2d86929794795e5c70f4fdb5073485fd05835c9c6f496116687c3d9f32e6df3e android.hardware.radio@1.2::ISap
+905a4af79c8329b39d8b11b08f015137216bb078b427b6986f32884a04bc1bec android.hardware.tv.cec@1.0::types
+aebcd9ff2da05c9d4c439916f40dfd219ba7629919007cb981ebf150064b4f82 android.hardware.usb@1.1::IUsb
+e29fb1941b40a990676f8e9c676a38761defd890b81a9c034608eb7ba6496023 android.hardware.wifi@1.0::IWifiP2pIface
diff --git a/dumpstate/1.0/default/DumpstateDevice.cpp b/dumpstate/1.0/default/DumpstateDevice.cpp
index 818a531..88623af 100644
--- a/dumpstate/1.0/default/DumpstateDevice.cpp
+++ b/dumpstate/1.0/default/DumpstateDevice.cpp
@@ -18,6 +18,7 @@
 
 #include "DumpstateDevice.h"
 
+#include <hidl/HidlBinderSupport.h>
 #include <log/log.h>
 
 #include "DumpstateUtil.h"
@@ -37,6 +38,11 @@
     // this interface - since HIDL_FETCH_IDumpstateDevice() is not defined, this function will never
     // be called by dumpstate.
 
+    // Exit when dump is completed since this is a lazy HAL.
+    addPostCommandTask([]() {
+        exit(0);
+    });
+
     if (handle == nullptr || handle->numFds < 1) {
         ALOGE("no FDs\n");
         return Void();
diff --git a/dumpstate/1.0/default/android.hardware.dumpstate@1.0-service.rc b/dumpstate/1.0/default/android.hardware.dumpstate@1.0-service.rc
index 0f27248..dfbfb33 100644
--- a/dumpstate/1.0/default/android.hardware.dumpstate@1.0-service.rc
+++ b/dumpstate/1.0/default/android.hardware.dumpstate@1.0-service.rc
@@ -2,3 +2,6 @@
     class hal
     user system
     group system
+    interface android.hardware.dumpstate@1.0::IDumpstateDevice default
+    oneshot
+    disabled
diff --git a/graphics/bufferqueue/1.0/IGraphicBufferProducer.hal b/graphics/bufferqueue/1.0/IGraphicBufferProducer.hal
index 87bb814..c59a16c 100644
--- a/graphics/bufferqueue/1.0/IGraphicBufferProducer.hal
+++ b/graphics/bufferqueue/1.0/IGraphicBufferProducer.hal
@@ -546,7 +546,7 @@
      */
     disconnect(
             int32_t api,
-            DisconnectMode mode /** = DisconnectMode::API */
+            DisconnectMode mode /* = DisconnectMode::API */
         ) generates (
             Status status
         );
diff --git a/graphics/composer/2.1/IComposerClient.hal b/graphics/composer/2.1/IComposerClient.hal
index f2ff932..5ad46f0 100644
--- a/graphics/composer/2.1/IComposerClient.hal
+++ b/graphics/composer/2.1/IComposerClient.hal
@@ -1138,7 +1138,7 @@
         SET_LAYER_Z_ORDER                  = 0x40a << OPCODE_SHIFT,
         SET_PRESENT_OR_VALIDATE_DISPLAY_RESULT = 0x40b << OPCODE_SHIFT,
 
-        /** 0x800 - 0xfff are reserved for vendor extensions */
-        /** 0x1000 - 0xffff are reserved */
+        /* 0x800 - 0xfff are reserved for vendor extensions */
+        /* 0x1000 - 0xffff are reserved */
     };
 };
diff --git a/graphics/composer/2.1/types.hal b/graphics/composer/2.1/types.hal
index 9f0dd8b..eb0a73b 100644
--- a/graphics/composer/2.1/types.hal
+++ b/graphics/composer/2.1/types.hal
@@ -18,15 +18,15 @@
 
 /** Return codes from all functions. */
 enum Error : int32_t {
-    NONE            = 0, /** no error */
-    BAD_CONFIG      = 1, /** invalid Config */
-    BAD_DISPLAY     = 2, /** invalid Display */
-    BAD_LAYER       = 3, /** invalid Layer */
-    BAD_PARAMETER   = 4, /** invalid width, height, etc. */
-    /** 5 is reserved */
-    NO_RESOURCES    = 6, /** temporary failure due to resource contention */
-    NOT_VALIDATED   = 7, /** validateDisplay has not been called */
-    UNSUPPORTED     = 8, /** permanent failure */
+    NONE            = 0, /* no error */
+    BAD_CONFIG      = 1, /* invalid Config */
+    BAD_DISPLAY     = 2, /* invalid Display */
+    BAD_LAYER       = 3, /* invalid Layer */
+    BAD_PARAMETER   = 4, /* invalid width, height, etc. */
+    /* 5 is reserved */
+    NO_RESOURCES    = 6, /* temporary failure due to resource contention */
+    NOT_VALIDATED   = 7, /* validateDisplay has not been called */
+    UNSUPPORTED     = 8, /* permanent failure */
 };
 
 typedef uint32_t Config;
diff --git a/graphics/mapper/2.0/IMapper.hal b/graphics/mapper/2.0/IMapper.hal
index 4ee206b..4566135 100644
--- a/graphics/mapper/2.0/IMapper.hal
+++ b/graphics/mapper/2.0/IMapper.hal
@@ -155,7 +155,7 @@
      * @param cpuUsage specifies one or more CPU usage flags to request.
      * @param accessRegion is the portion of the buffer that the client
      *        intends to access.
-     * @param acquireFence, when non-empty, is a handle containing a file
+     * @param acquireFence when non-empty, is a handle containing a file
      *        descriptor referring to a sync fence object, which will be
      *        signaled when it is safe for the mapper to lock the buffer. If
      *        it is already safe to lock, acquireFence is empty.
@@ -191,7 +191,7 @@
      * @param cpuUsage specifies one or more CPU usage flags to request.
      * @param accessRegion is the portion of the buffer that the client
      *        intends to access.
-     * @param acquireFence, when non-empty, is a handle containing a file
+     * @param acquireFence when non-empty, is a handle containing a file
      *        descriptor referring to a sync fence object, which will be
      *        signaled when it is safe for the mapper to lock the buffer. If
      *        it is already safe to lock, acquireFence is empty.
diff --git a/graphics/mapper/2.0/types.hal b/graphics/mapper/2.0/types.hal
index e9b2f3a..2291f70 100644
--- a/graphics/mapper/2.0/types.hal
+++ b/graphics/mapper/2.0/types.hal
@@ -17,14 +17,14 @@
 package android.hardware.graphics.mapper@2.0;
 
 enum Error : int32_t {
-    NONE            = 0, /** no error */
-    BAD_DESCRIPTOR  = 1, /** invalid BufferDescriptor */
-    BAD_BUFFER      = 2, /** invalid buffer handle */
-    BAD_VALUE       = 3, /** invalid width, height, etc. */
+    NONE            = 0, /* no error */
+    BAD_DESCRIPTOR  = 1, /* invalid BufferDescriptor */
+    BAD_BUFFER      = 2, /* invalid buffer handle */
+    BAD_VALUE       = 3, /* invalid width, height, etc. */
     /* 4 is reserved */
-    NO_RESOURCES    = 5, /** temporary failure due to resource contention */
+    NO_RESOURCES    = 5, /* temporary failure due to resource contention */
     /* 6 is reserved */
-    UNSUPPORTED     = 7, /** permanent failure */
+    UNSUPPORTED     = 7, /* permanent failure */
 };
 
 /**
diff --git a/keymaster/3.0/types.hal b/keymaster/3.0/types.hal
index 6dad23e..72f7d47 100644
--- a/keymaster/3.0/types.hal
+++ b/keymaster/3.0/types.hal
@@ -17,17 +17,17 @@
 package android.hardware.keymaster@3.0;
 
 enum TagType : uint32_t {
-    INVALID = 0 << 28, /** Invalid type, used to designate a tag as uninitialized */
+    INVALID = 0 << 28, /* Invalid type, used to designate a tag as uninitialized */
     ENUM = 1 << 28,
-    ENUM_REP = 2 << 28, /** Repeatable enumeration value. */
+    ENUM_REP = 2 << 28, /* Repeatable enumeration value. */
     UINT = 3 << 28,
-    UINT_REP = 4 << 28, /** Repeatable integer value */
+    UINT_REP = 4 << 28, /* Repeatable integer value */
     ULONG = 5 << 28,
     DATE = 6 << 28,
     BOOL = 7 << 28,
     BIGNUM = 8 << 28,
     BYTES = 9 << 28,
-    ULONG_REP = 10 << 28, /** Repeatable long value */
+    ULONG_REP = 10 << 28, /* Repeatable long value */
 };
 
 enum Tag : uint32_t {
@@ -254,12 +254,12 @@
  * Possible purposes of a key (or pair).
  */
 enum KeyPurpose : uint32_t {
-    ENCRYPT = 0,    /** Usable with RSA, EC and AES keys. */
-    DECRYPT = 1,    /** Usable with RSA, EC and AES keys. */
-    SIGN = 2,       /** Usable with RSA, EC and HMAC keys. */
-    VERIFY = 3,     /** Usable with RSA, EC and HMAC keys. */
-    DERIVE_KEY = 4, /** Usable with EC keys. */
-    WRAP_KEY = 5,   /** Usable with wrapping keys. */
+    ENCRYPT = 0,    /* Usable with RSA, EC and AES keys. */
+    DECRYPT = 1,    /* Usable with RSA, EC and AES keys. */
+    SIGN = 2,       /* Usable with RSA, EC and HMAC keys. */
+    VERIFY = 3,     /* Usable with RSA, EC and HMAC keys. */
+    DERIVE_KEY = 4, /* Usable with EC keys. */
+    WRAP_KEY = 5,   /* Usable with wrapping keys. */
 };
 
 /**
diff --git a/neuralnetworks/1.0/types.hal b/neuralnetworks/1.0/types.hal
index 8c07fcc..4efa13a 100644
--- a/neuralnetworks/1.0/types.hal
+++ b/neuralnetworks/1.0/types.hal
@@ -42,7 +42,8 @@
     TENSOR_FLOAT32      = 3,
     /** A tensor of 32 bit integer values. */
     TENSOR_INT32        = 4,
-    /** A tensor of 8 bit integers that represent real numbers.
+    /**
+     * A tensor of 8 bit integers that represent real numbers.
      *
      * Attached to this tensor are two numbers that can be used to convert the
      * 8 bit integer to the real value and vice versa. These two numbers are:
@@ -70,15 +71,17 @@
     /**
      * Adds two tensors, element-wise.
      *
-     * Takes two input tensors of identical type and compatible dimensions. The output
-     * is the sum of both input tensors, optionally modified by an activation function.
+     * Takes two input tensors of identical {@link OperandType} and compatible
+     * dimensions. The output is the sum of both input tensors, optionally
+     * modified by an activation function.
      *
      * Two dimensions are compatible when:
      *     1. they are equal, or
      *     2. one of them is 1
      *
-     * The size of the output is the maximum size along each dimension of the input operands.
-     * It starts with the trailing dimensions, and works its way forward.
+     * The size of the output is the maximum size along each dimension of the
+     * input operands. It starts with the trailing dimensions, and works its
+     * way forward.
      *
      * Example:
      *
@@ -86,7 +89,7 @@
      *     input2.dimension = {5, 4, 3, 1}
      *     output.dimension = {5, 4, 3, 2}
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -94,98 +97,119 @@
      *
      * Inputs:
      * * 0: A tensor.
-     * * 1: A tensor of the same type, and compatible dimensions as input0.
-     * * 2: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 1: A tensor of the same {@link OperandType}, and compatible dimensions
+     *      as input0.
+     * * 2: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The sum, a tensor of the same type as input0.
+     * * 0: The sum, a tensor of the same {@link OperandType} as input0.
      */
     ADD = 0,
 
     /**
      * Performs a 2-D average pooling operation.
      *
-     * The output dimensions are functions of the filter dimensions, stride, and padding.
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
      *
      * The values in the output tensor are computed as:
      *
      *     output[batch, row, col, channel] =
      *         sum_{i, j}(input[batch, row + i, col + j, channel]) / sum(1)
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
-     * Supported tensor rank: 4, with "NHWC" (i.e., Num_samples, Height, Width, and Channels)
-     * data layout.
+     * Supported tensor rank: 4, with "NHWC" (i.e., Num_samples, Height, Width,
+     * and Channels) data layout.
      *
      * Both explicit padding and implicit padding are supported.
      *
      * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
-     * * 2: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the padding on the top, in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the padding on the bottom, in the ‘height’ dimension.
-     * * 5: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 6: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 7: An INT32 value, specifying the filter width.
-     * * 8: An INT32 value, specifying the filter height.
-     * * 9: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 7: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 8: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 9: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
      *      following values: {0 (NONE), 1 (SAME), 2 (VALID)}.
-     * * 2: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the filter width.
-     * * 5: An INT32 value, specifying the filter height.
-     * * 6: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 6: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth].
+     * * 0: The output 4-D tensor, of shape
+            [batches, out_height, out_width, depth].
      */
     AVERAGE_POOL_2D = 1,
 
     /**
      * Concatenates the input tensors along the given dimension.
      *
-     * The input tensors must have identical type and the same dimensions except the
-     * dimension along the concatenation axis.
+     * The input tensors must have identical {@link OperandType} and the same
+     * dimensions except the dimension along the concatenation axis.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * * 0 ~ n-1: The list of n input tensors, of shape [D0, D1, ..., Daxis(i), ..., Dm].
-     *            For inputs of {@link OperandType::TENSOR_QUANT8_ASYMM} type, all
-     *            input tensors must have the same scale and zeroPoint.
-     * * n: An INT32 value, specifying the concatenation axis.
+     * * 0 ~ n-1: The list of n input tensors, of shape
+     *            [D0, D1, ..., Daxis(i), ..., Dm]. For inputs of
+     *            {@link OperandType::TENSOR_QUANT8_ASYMM}, all input tensors
+     *            must have the same scale and zeroPoint.
+     * * n: An {@link OperandType::INT32} scalar, specifying the
+     *      concatenation axis.
      *
      * Outputs:
-     * * 0: The output, a tensor of the same type as the input tensors.
-     *      The output shape is [D0, D1, ..., sum(Daxis(i)), ..., Dm].
+     * * 0: The output, a tensor of the same {@link OperandType} as the input
+     *      tensors. The output shape is [D0, D1, ..., sum(Daxis(i)), ..., Dm].
      */
     CONCATENATION = 2,
 
     /**
      * Performs an 2-D convolution operation.
      *
-     * The CONV_2D op sweeps a 2-D filter that can mix channels together over a batch of
-     * images, applying the filter to each window of each image of the appropriate size.
+     * The CONV_2D op sweeps a 2-D filter that can mix channels together over a
+     * batch of images, applying the filter to each window of each image of the
+     * appropriate size.
      *
-     * The output dimensions are functions of the filter dimensions, stride, and padding.
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
      *
      * The values in the output tensor are computed as:
      *
@@ -196,7 +220,7 @@
      *             bias[channel]
      *         )
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -205,63 +229,77 @@
      * Both explicit padding and implicit padding are supported.
      *
      * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
-     * * 1: A 4-D tensor, of shape [depth_out, filter_height, filter_width, depth_in],
-     *      specifying the filter.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: A 4-D tensor, of shape
+     *      [depth_out, filter_height, filter_width, depth_in], specifying the
+     *      filter.
      * * 2: A 1-D tensor, of shape [depth_out], specifying the bias.
-     *      For input tensor of {@link OperandType::TENSOR_FLOAT32} type, the bias should
-     *      also be of {@link OperandType::TENSOR_FLOAT32}.
-     *      For input tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the bias
-     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
-     *      bias_scale == input_scale * filter_scale.
-     * * 3: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
-     * * 4: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
-     * * 5: An INT32 value, specifying the padding on the top, in the ‘height’ dimension.
-     * * 6: An INT32 value, specifying the padding on the bottom, in the ‘height’ dimension.
-     * * 7: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 8: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 9: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     *      For input tensor of {@link OperandType::TENSOR_FLOAT32}, the bias
+     *      should also be of {@link OperandType::TENSOR_FLOAT32}. For input
+     *      tensor of {@link OperandType::TENSOR_QUANT8_ASYMM}, the bias
+     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of
+     *      0 and bias_scale == input_scale * filter_scale.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 7: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 8: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 9: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
-     * * 1: A 4-D tensor, of shape [depth_out, filter_height, filter_width, depth_in],
-     *      specifying the filter.
-     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias.
-     *      For input tensor of {@link OperandType::TENSOR_FLOAT32} type, the bias should
-     *      also be of {@link OperandType::TENSOR_FLOAT32}.
-     *      For input tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the bias
-     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: A 4-D tensor, of shape
+     *      [depth_out, filter_height, filter_width, depth_in], specifying the
+     *      filter.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of {@link OperandType::TENSOR_FLOAT32}, the bias should
+     *      also be of {@link OperandType::TENSOR_FLOAT32}. For input tensor
+     *      of {@link OperandType::TENSOR_QUANT8_ASYMM}, the bias should be
+     *      of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
      *      bias_scale == input_scale * filter_scale.
-     * * 3: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     * * 3: An {@link OperandType::INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
      *      following values: {0 (NONE), 1 (SAME), 2 (VALID)}.
-     * * 4: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 5: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 6: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the stride when
+    *       walking through input in the ‘height’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth_out].
-     *      For output tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the following
-     *      condition must be satisfied: output_scale > input_scale * filter_scale.
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth_out]. For output tensor of
+     *      {@link OperandType::TENSOR_QUANT8_ASYMM}, the following condition
+     *      must be satisfied: output_scale > input_scale * filter_scale.
      */
     CONV_2D = 3,
 
     /**
      * Performs a depthwise 2-D convolution operation.
      *
-     * Given an input tensor of shape [batches, height, width, depth_in] and a filter
-     * tensor of shape [1, filter_height, filter_width, depth_out] containing
-     * depth_out convolutional filters of depth 1, DEPTHWISE_CONV applies a different
-     * filter to each input channel (expanding from 1 channel to channel_multiplier channels
-     * for each), then concatenates the results together.
+     * Given an input tensor of shape [batches, height, width, depth_in] and a
+     * filter tensor of shape [1, filter_height, filter_width, depth_out]
+     * containing depth_out convolutional filters of depth 1, DEPTHWISE_CONV
+     * applies a different filter to each input channel (expanding from 1
+     * channel to channel_multiplier channels for each), then concatenates the
+     * results together.
      *
      * The output has depth_out = depth_in * depth_multiplier channels.
-     * The output dimensions are functions of the filter dimensions, stride, and padding.
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
      *
      * The values in the output tensor are computed as:
      *
@@ -271,7 +309,7 @@
      *             filter[1, di, dj, k * channel_multiplier + q]
      *         )
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -280,82 +318,97 @@
      * Both explicit padding and implicit padding are supported.
      *
      * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
      * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
      *      specifying the filter.
-     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias.
-     *      For input tensor of {@link OperandType::TENSOR_FLOAT32} type, the bias should
-     *      also be of {@link OperandType::TENSOR_FLOAT32}.
-     *      For input tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the bias
-     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of {@link OperandType::TENSOR_FLOAT32}, the bias should
+     *      also be of {@link OperandType::TENSOR_FLOAT32}. For input tensor
+     *      of {@link OperandType::TENSOR_QUANT8_ASYMM}, the bias should be
+     *      of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
      *      bias_scale == input_scale * filter_scale.
-     * * 3: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
-     * * 4: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
-     * * 5: An INT32 value, specifying the padding on the top, in the ‘height’ dimension.
-     * * 6: An INT32 value, specifying the padding on the bottom, in the ‘height’ dimension.
-     * * 7: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 8: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 9: An INT32 value, specifying the depthwise multiplier.
-     * * 10: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *       Specifies the activation to invoke on the result of each addition.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 7: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 8: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 9: An {@link OperandType::INT32} scalar, specifying the depthwise
+     *      multiplier.
+     * * 10: An {@link OperandType::INT32} scalar, and has to be one of the
+     *       {@link FusedActivationFunc} values. Specifies the activation to
+     *       invoke on the result.
      *
      * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
      * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
      *      specifying the filter.
-     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias.
-     *      For input tensor of {@link OperandType::TENSOR_FLOAT32} type, the bias should
-     *      also be of {@link OperandType::TENSOR_FLOAT32}.
-     *      For input tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the bias
-     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of {@link OperandType::TENSOR_FLOAT32}, the bias should
+     *      also be of {@link OperandType::TENSOR_FLOAT32}. For input tensor
+     *      of {@link OperandType::TENSOR_QUANT8_ASYMM}, the bias should be
+     *      of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
      *      bias_scale == input_scale * filter_scale.
-     * * 3: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     * * 3: An {@link OperandType::INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
      *      following values: {0 (NONE), 1 (SAME), 2 (VALID)}.
-     * * 4: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 5: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 6: An INT32 value, specifying the depthwise multiplier.
-     * * 7: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *       Specifies the activation to invoke on the result of each addition.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the depthwise
+     *      multiplier.
+     * * 7: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth_out].
-     *      For output tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the following
-     *      condition must be satisfied: output_scale > input_scale * filter_scale.
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth_out]. For output tensor of
+     *      {@link OperandType::TENSOR_QUANT8_ASYMM}, the following condition
+     *      must be satisfied: output_scale > input_scale * filter_scale.
      */
     DEPTHWISE_CONV_2D = 4,
 
     /**
      * Rearranges data from depth into blocks of spatial data.
      *
-     * More specifically, this op outputs a copy of the input tensor where values from
-     * the depth dimension are moved in spatial blocks to the height and width dimensions.
-     * The value block_size indicates the input block size and how the data is moved.
+     * More specifically, this op outputs a copy of the input tensor where
+     * values from the depth dimension are moved in spatial blocks to the height
+     * and width dimensions. The value block_size indicates the input block size
+     * and how the data is moved.
      *
-     * Chunks of data of size block_size * block_size from depth are rearranged into
-     * non-overlapping blocks of size block_size x block_size.
+     * Chunks of data of size block_size * block_size from depth are rearranged
+     * into non-overlapping blocks of size block_size x block_size.
      *
-     * The width of the output tensor is input_depth * block_size, whereas the height is
-     * input_height * block_size.
-     * The depth of the input tensor must be divisible by block_size * block_size
+     * The width of the output tensor is input_depth * block_size, whereas the
+     * height is input_height * block_size. The depth of the input tensor must
+     * be divisible by block_size * block_size
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
      * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
-     * * 1: An INT32 value, specifying the block_size. block_size must be >=1 and
-     *      block_size * block_size must be a divisor of the input depth.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the block_size.
+     *      block_size must be >=1 and block_size * block_size must be a divisor
+     *      of the input depth.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batch, height*block_size, width*block_size,
-     *      depth/(block_size*block_size)].
+     * * 0: The output 4-D tensor, of shape [batch, height*block_size,
+     *      width*block_size, depth/(block_size*block_size)].
      */
     DEPTH_TO_SPACE = 5,
 
@@ -366,16 +419,16 @@
      *
      *     output = (input - zeroPoint) * scale.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * * 0: A tensor of type {@link OperandType::TENSOR_QUANT8_ASYMM}.
+     * * 0: A tensor of {@link OperandType::TENSOR_QUANT8_ASYMM}.
      *
      * Outputs:
-     * * 0: The output tensor of same shape as input0, but with type
+     * * 0: The output tensor of same shape as input0, but with
      *      {@link OperandType::TENSOR_FLOAT32}.
      */
     DEQUANTIZE = 6,
@@ -401,7 +454,7 @@
      * and an error must be reported.
      *
      * Inputs:
-     * * 0: Lookups. A 1-D tensor of {@link OperandType::TENSOR_INT32} type.
+     * * 0: Lookups. A 1-D tensor of {@link OperandType::TENSOR_INT32}.
      *      The values are indices into the first dimension of Values.
      * * 1: Values. An n-D tensor, where n >= 2, from which sub-tensors are
      *      extracted.
@@ -416,7 +469,7 @@
     /**
      * Computes element-wise floor() on the input tensor.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: up to 4
@@ -425,44 +478,51 @@
      * * 0: A tensor.
      *
      * Outputs:
-     * * 0: The output tensor, of the same type and dimensions as the input tensor.
+     * * 0: The output tensor, of the same {@link OperandType} and dimensions as
+     *      the input tensor.
      */
     FLOOR = 8,
 
     /**
-     * Denotes a fully (densely) connected layer, which connects all elements in the input
-     * tensor with each element in the output tensor.
+     * Denotes a fully (densely) connected layer, which connects all elements
+     * in the input tensor with each element in the output tensor.
      *
      * This layer implements the operation:
      *
      *     outputs = activation(inputs * weights’ + bias)
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4.
      *
      * Inputs:
-     * * 0: A tensor, specifying the input. If rank is greater than 2, then it gets flattened to
-     *      a 2-D Tensor. The 2-D Tensor is handled as if dimensions corresponded to shape
-     *      [batch_size, input_size], where “batch_size” corresponds to the batching dimension,
-     *      and “input_size” is the size of the input.
-     * * 1: A 2-D tensor, specifying the weights, of shape [num_units, input_size], where
-     *      "num_units" corresponds to the number of output nodes.
-     * * 2: A 1-D tensor, of shape [num_units], specifying the bias.
-     *      For input tensor of {@link OperandType::TENSOR_FLOAT32} type, the bias should
-     *      also be of {@link OperandType::TENSOR_FLOAT32}.
-     *      For input tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the bias
-     *      should be of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
+     * * 0: A tensor of at least rank 2, specifying the input. If rank is
+     *      greater than 2, then it gets flattened to a 2-D Tensor. The
+     *      (flattened) 2-D Tensor is reshaped (if necessary) to
+     *      [batch_size, input_size], where "input_size" corresponds to the
+     *      number of inputs to the layer, matching the second dimension of
+     *      weights, and "batch_size" is calculated by dividing the number of
+     *      elements by "input_size".
+     * * 1: A 2-D tensor, specifying the weights, of shape
+     *      [num_units, input_size], where "num_units" corresponds to the number
+     *      of output nodes.
+     * * 2: A 1-D tensor, of shape [num_units], specifying the bias. For input
+     *      tensor of {@link OperandType::TENSOR_FLOAT32}, the bias should
+     *      also be of {@link OperandType::TENSOR_FLOAT32}. For input tensor
+     *      of {@link OperandType::TENSOR_QUANT8_ASYMM}, the bias should be
+     *      of {@link OperandType::TENSOR_INT32}, with zeroPoint of 0 and
      *      bias_scale == input_scale * filter_scale.
-     * * 3: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 3: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output tensor, of shape [batch_size, num_units].
-     *      For output tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the following
-     *      condition must be satisfied: output_scale > input_scale * filter_scale.
+     * * 0: The output tensor, of shape [batch_size, num_units]. For output
+     *      tensor of {@link OperandType::TENSOR_QUANT8_ASYMM}, the following
+     *      condition must be satisfied:
+     *      output_scale > input_scale * filter_scale.
      */
     FULLY_CONNECTED = 9,
 
@@ -494,19 +554,22 @@
      * must be concatenated.
      *
      * Inputs:
-     * * 0: Lookups. A 1-D {@link OperandType::TENSOR_INT32} tensor with shape [ k ].
-     * * 1: Keys. A 1-D {@link OperandType::TENSOR_INT32} tensor with shape [ n ];
-     *      Keys and Values pair represent a map, i.e., the ith element
-     *      in Keys (Keys[i]) is the key to select the ith sub-tensor
-     *      in Values (Values[i]), where 0 <= i <= n-1.
-     *      Keys tensor *MUST* be sorted in ascending order.
-     * * 2: Values. A tensor with shape of [ n, … ]; i.e., the first dimension must be n.
+     * * 0: Lookups. A 1-D {@link OperandType::TENSOR_INT32} tensor with
+     *      shape [ k ].
+     * * 1: Keys. A 1-D {@link OperandType::TENSOR_INT32} tensor with shape
+     *      [ n ]; Keys and Values pair represent a map, i.e., the ith element
+     *      in Keys (Keys[i]) is the key to select the ith sub-tensor in Values
+     *      (Values[i]), where 0 <= i <= n-1. Keys tensor *MUST* be sorted in
+     *      ascending order.
+     * * 2: Values. A tensor with shape of [ n, … ]; i.e., the first dimension
+     *      must be n.
      *
      * Outputs:
      * * 0: Output. A tensor with shape [ k …].
      * * 1: Hits. A boolean tensor with shape [ k ] indicates whether the lookup
      *      hits (True) or not (False).
-     *      Stored as {@link OperandType::TENSOR_QUANT8_ASYMM} with offset 0 and scale 1.0f.
+     *      Stored as {@link OperandType::TENSOR_QUANT8_ASYMM} with offset 0
+     *      and scale 1.0f.
      *      A non-zero byte represents True, a hit. A zero indicates otherwise.
      */
     HASHTABLE_LOOKUP = 10,
@@ -520,32 +583,37 @@
      *         input[batch, row, col, channel] /
      *         sqrt(sum_{c} pow(input[batch, row, col, c], 2))
      *
-     * For input tensor with more dimensions, independently normalizes each 1-D slice along dimension dim.
+     * For input tensor with more dimensions, independently normalizes each 1-D
+     * slice along dimension dim.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
-     * Supported tensor rank: 4, with "NHWC" data layout (i.e., Num_samples, Height, Width, and Channels).
+     * Supported tensor rank: 4, with "NHWC" data layout (i.e., Num_samples,
+     * Height, Width, and Channels).
      *
      * Inputs:
      * * 0: A 4-D tensor, of shape [batches, height, width, depth].
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth].
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth].
      */
     L2_NORMALIZATION = 11,
 
     /**
      * Performs an 2-D L2 pooling operation.
      *
-     * The output dimensions are functions of the filter dimensions, stride, and padding.
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
      *
      * The values in the output tensor are computed as:
      *
      *     output[batch, row, col, channel] =
-     *         sqrt(sum_{i, j} pow(input[batch, row + i, col + j, channel], 2) / sum(1))
+     *         sqrt(sum_{i, j} pow(input[batch, row + i, col + j, channel], 2) /
+     *              sum(1))
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
@@ -553,62 +621,82 @@
      * Both explicit padding and implicit padding are supported.
      *
      * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
-     * * 2: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the padding on the top, in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the padding on the bottom, in the ‘height’ dimension.
-     * * 5: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 6: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 7: An INT32 value, specifying the filter width.
-     * * 8: An INT32 value, specifying the filter height.
-     * * 9: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 7: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 8: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 9: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
      *      following values: {0 (NONE), 1 (SAME), 2 (VALID)}.
-     * * 2: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the filter width.
-     * * 5: An INT32 value, specifying the filter height.
-     * * 6: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 6: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth].
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth].
      */
     L2_POOL_2D = 12,
 
     /**
      * Applies Local Response Normalization along the depth dimension.
      *
-     * The 4-D input tensor is treated as a 3-D array of 1-D vectors (along the last
-     * dimension), and each vector is normalized independently. Within a given vector,
-     * each component is divided by the weighted, squared sum of inputs within depth_radius.
+     * The 4-D input tensor is treated as a 3-D array of 1-D vectors (along the
+     * last dimension), and each vector is normalized independently. Within a
+     * given vector, each component is divided by the weighted, squared sum of
+     * inputs within depth_radius.
      *
      * The output is calculated using this formula:
      *
-     *     sqr_sum[a, b, c, d] =
-     *         sum(pow(input[a, b, c, d - depth_radius : d + depth_radius + 1], 2)
+     *     sqr_sum[a, b, c, d] = sum(
+     *         pow(input[a, b, c, d - depth_radius : d + depth_radius + 1], 2))
      *     output = input / pow((bias + alpha * sqr_sum), beta)
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
      * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the radius of the normalization window.
-     * * 2: A FLOAT32 value, specifying the bias, must not be zero.
-     * * 3: A FLOAT32 value, specifying the scale factor, alpha.
-     * * 4: A FLOAT32 value, specifying the exponent, beta.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the radius of
+     *      the normalization window.
+     * * 2: An {@link OperandType::FLOAT32} scalar, specifying the bias, must
+     *      not be zero.
+     * * 3: An {@link OperandType::FLOAT32} scalar, specifying the scale
+     *      factor, alpha.
+     * * 4: An {@link OperandType::FLOAT32} scalar, specifying the exponent,
+     *      beta.
      *
      * Outputs:
      * * 0: The output tensor of same shape as input0.
@@ -622,7 +710,7 @@
      *
      *     output = 1 / (1 + exp(-input))
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -633,7 +721,7 @@
      *
      * Outputs:
      * * 0: The output tensor of same shape as input0.
-     *      For {@link OperandType::TENSOR_QUANT8_ASYMM} type,
+     *      For {@link OperandType::TENSOR_QUANT8_ASYMM},
      *      the scale must be 1.f / 256 and the zeroPoint must be 0.
      */
     LOGISTIC = 14,
@@ -649,18 +737,19 @@
      *
      * * 1: Input. Dim.size >= 1, no restriction on DataType.
      * * 2: Weight. Optional. Dim.size == 1, DataType: Float.
-     *     If not set, each input element is considered to have the same weight of
-     *     1.0.
+     *     If not set, each input element is considered to have the same weight
+     *     of 1.0.
      *     Tensor[1].Dim[0] == Tensor[2].Dim[0]
      * * 3: Type:
      *        Sparse: Value LSHProjectionType_SPARSE(=1).
      *          Computed bit vector is considered to be sparse.
-     *          Each output element is an int32 made up of multiple bits computed from
-     *          hash functions.
+     *          Each output element is an int32 made up of multiple bits
+     *          computed from hash functions.
      *
      *        Dense: Value LSHProjectionType_DENSE(=2).
-     *          Computed bit vector is considered to be dense. Each output element
-     *          represents a bit and can take the value of either 0 or 1.
+     *          Computed bit vector is considered to be dense. Each output
+     *          element represents a bit and can take the value of either
+     *          0 or 1.
      *
      * Outputs:
      * * 0: If the projection type is sparse:
@@ -680,9 +769,12 @@
      * \f{eqnarray*}{
      * i_t =& \sigma(W_{xi}x_t+W_{hi}h_{t-1}+W_{ci}C_{t-1}+b_i) & \\
      * f_t =& \sigma(W_{xf}x_t+W_{hf}h_{t-1}+W_{cf}C_{t-1}+b_f) & \\
-     * C_t =& clip(f_t \odot C_{t-1} + i_t \odot g(W_{xc}x_t+W_{hc}h_{t-1}+b_c),\ t_{cell})& \\
-     * o_t =& \sigma(W_{xo}x_t+W_{ho}h_{t-1}+W_{co}C_t+b_o)& \\
-     *      & clip(W_{proj}(o_t \odot g(C_t))+b_{proj},\ t_{proj}) & if\ there\ is\ a\ projection; \\
+     * C_t =& clip(f_t \odot C_{t-1} + i_t \odot
+     *        g(W_{xc}x_t+W_{hc}h_{t-1}+b_c),\ t_{cell}) & \\
+     * o_t =& \sigma(W_{xo}x_t+W_{ho}h_{t-1}+W_{co}C_t+b_o) & \\
+     *      & & \\
+     *      & clip(W_{proj}(o_t \odot g(C_t))+b_{proj},\ t_{proj})
+     *      & if\ there\ is\ a\ projection; \\
      * h_t =& & \\
      *      & o_t \odot g(C_t) & otherwise. \\
      * \f}
@@ -694,7 +786,8 @@
      * * \f$o_t\f$ is the output,
      * * \f$h_t\f$ is the output state,
      * * \f$\sigma\f$ is the logistic sigmoid function,
-     * * \f$g\f$ is the cell input and cell output activation function, usually \f$tahn\f$,
+     * * \f$g\f$ is the cell input and cell output activation function, usually
+     *   \f$tahn\f$,
      * * \f$W_{xi}\f$ is the input-to-input weight matrix,
      * * \f$W_{hi}\f$ is the recurrent to input weight matrix,
      * * \f$W_{ci}\f$ is the cell-to-input weight matrix,
@@ -714,27 +807,32 @@
      * * \f$b_{proj}\f$ is the projection bias,
      * * \f$t_{cell}\f$ is the threshold for clipping the cell state, and
      * * \f$t_{proj}\f$ is the threshold for clipping the projected output.
-     * * \f$\odot\f$ is the <a href="https://en.wikipedia.org/wiki/Hadamard_product_(matrices)">
+     * * \f$\odot\f$ is the
+     *   <a href="https://en.wikipedia.org/wiki/Hadamard_product_(matrices)">
      *   Hadamard product</a> that takes two matrices and produces another
      *   matrix, each element of which is the product of the corresponding
      *   elements of the input matrices.
      *
      * The operation has the following independently optional inputs:
-     * * The input-to-input weights (\f$W_{xi}\f$), recurrent-to-input weights (\f$W_{hi}\f$),
-     *   cell-to-input (\f$W_{ci}\f$) weights, and input gate bias (\f$b_i\f$) either all have values,
-     *   or none of them have values (i.e., all set to null). If they have no
-     *   values, coupling of input and forget gates (CIFG) is used, in which case
-     *   the input gate (\f$i_t\f$) is calculated using the following equation instead.
+     * * The input-to-input weights (\f$W_{xi}\f$), recurrent-to-input weights
+     *   (\f$W_{hi}\f$), cell-to-input (\f$W_{ci}\f$) weights, and input gate
+     *   bias (\f$b_i\f$) either all have values, or none of them have values
+     *   (i.e., all set to null). If they have no values, coupling of input and
+     *   forget gates (CIFG) is used, in which case the input gate (\f$i_t\f$)
+     *   is calculated using the following equation instead.
      *   \f{eqnarray*}{
      *   i_t = 1 - f_t
      *   \f}
-     * * The cell-to-input weights (\f$W_{ci}\f$), cell-to-forget weights (\f$W_{cf}\f$), and cell-to-output
-     *   weights (\f$W_{co}\f$) either all have values or none of them have values.
-     *   If they have values, the peephole optimization is used.
-     * * The projection weights (\f$W_{proj}\f$) is required only for the recurrent projection
-     *   layer, and should otherwise have no value.
-     * * The projection bias (\f$b_{proj}\f$) may (but not required to) have a value if the
-     *   recurrent projection layer exists, and should otherwise have no value.
+     * * The cell-to-forget weights (\f$W_{cf}\f$) and cell-to-output weights
+     *   (\f$W_{co}\f$) either both have values or neither of them have values.
+     *   If they have values, the peephole optimization is used. Additionally,
+     *   if CIFG is not used, cell-to-input weights (\f$W_{ci}\f$) is also
+     *   required to have values for peephole optimization.
+     * * The projection weights (\f$W_{proj}\f$) is required only for the
+     *   recurrent projection layer, and should otherwise have no value.
+     * * The projection bias (\f$b_{proj}\f$) may (but not required to) have a
+     *   value if the recurrent projection layer exists, and should otherwise
+     *   have no value.
      *
      * References:
      *
@@ -746,8 +844,8 @@
      * The peephole implementation and projection layer is based on:
      * https://research.google.com/pubs/archive/43905.pdf
      * Hasim Sak, Andrew Senior, and Francoise Beaufays. "Long short-term memory
-     * recurrent neural network architectures for large scale acoustic modeling."
-     * INTERSPEECH, 2014.
+     * recurrent neural network architectures for large scale acoustic
+     * modeling." INTERSPEECH, 2014.
      * (However, the concept of peephole optimization was introduced in work
      * prior to this paper.)
      *
@@ -755,56 +853,74 @@
      * http://arxiv.org/pdf/1503.04069.pdf
      * Greff et al. "LSTM: A Search Space Odyssey"
      *
-     * Supported tensor types (type T):
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Inputs:
      * * 0: The input (\f$x_t\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, input_size], where
-     *      “batch_size” corresponds to the batching dimension, and “input_size”
-     *      is the size of the input.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, input_size], where “batch_size” corresponds to the
+     *      batching dimension, and “input_size” is the size of the input.
      * * 1: The input-to-input weights (\f$W_{xi}\f$). Optional.
-     *      A 2-D tensor of type T, of shape [num_units, input_size], where
-     *      “num_units” corresponds to the number of cell units.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size], where “num_units” corresponds to the
+     *      number of cell units.
      * * 2: The input-to-forget weights (\f$W_{xf}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, input_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size].
      * * 3: The input-to-cell weights (\f$W_{xc}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, input_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size].
      * * 4: The input-to-output weights (\f$W_{xo}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, input_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size].
      * * 5: The recurrent-to-input weights (\f$W_{hi}\f$). Optional.
-     *      A 2-D tensor of type T, of shape [num_units, output_size], where
-     *      “output_size” corresponds to either the number of cell units (i.e.,
-     *      “num_units”), or the second dimension of the “projection_weights”, if
-     *      defined.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, output_size], where “output_size” corresponds to either
+     *      the number of cell units (i.e., “num_units”), or the second
+     *      dimension of the “projection_weights”, if defined.
      * * 6: The recurrent-to-forget weights (\f$W_{hf}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, output_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, output_size].
      * * 7: The recurrent-to-cell weights (\f$W_{hc}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, output_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, output_size].
      * * 8: The recurrent-to-output weights (\f$W_{ho}\f$).
-     *      A 2-D tensor of type T, of shape [num_units, output_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, output_size].
      * * 9: The cell-to-input weights (\f$W_{ci}\f$). Optional.
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 10:The cell-to-forget weights (\f$W_{cf}\f$). Optional.
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 11:The cell-to-output weights (\f$W_{co}\f$). Optional.
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 12:The input gate bias (\f$b_i\f$). Optional.
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 13:The forget gate bias (\f$b_f\f$).
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 14:The cell bias (\f$b_c\f$).
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 15:The output gate bias (\f$b_o\f$).
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 16:The projection weights (\f$W_{proj}\f$). Optional.
-     *      A 2-D tensor of type T, of shape [output_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [output_size, num_units].
      * * 17:The projection bias (\f$b_{proj}\f$). Optional.
-     *      A 1-D tensor of type T, of shape [output_size].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [output_size].
      * * 18:The output state (in) (\f$h_{t-1}\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, output_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, output_size].
      * * 19:The cell state (in) (\f$C_{t-1}\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units].
      * * 20:The activation function (\f$g\f$).
      *      A value indicating the activation function:
      *      <ul>
@@ -814,38 +930,43 @@
      *      <li>4: Tanh;
      *      <li>6: Sigmoid.
      *      </ul>
-     * * 21:The clipping threshold (\f$t_{cell}\f$) for the cell state, such that values are bound
-     *      within [-cell_clip, cell_clip]. If set to 0.0 then clipping is
-     *      disabled.
-     * * 22:The clipping threshold (\f$t_{proj}\f$) for the output from the projection layer, such
-     *      that values are bound within [-proj_clip, proj_clip]. If set to 0.0
+     * * 21:The clipping threshold (\f$t_{cell}\f$) for the cell state, such
+     *      that values are bound within [-cell_clip, cell_clip]. If set to 0.0
      *      then clipping is disabled.
+     * * 22:The clipping threshold (\f$t_{proj}\f$) for the output from the
+     *      projection layer, such that values are bound within
+     *      [-proj_clip, proj_clip]. If set to 0.0 then clipping is disabled.
      *
      * Outputs:
      * * 0: The scratch buffer.
-     *      A 2-D tensor of type T, of shape [batch_size, num_units * 4] with
-     *      CIFG, or [batch_size, num_units * 3] without CIFG.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units * 4] with CIFG, or
+     *      [batch_size, num_units * 3] without CIFG.
      * * 1: The output state (out) (\f$h_t\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, output_size].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, output_size].
      * * 2: The cell state (out) (\f$C_t\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units].
      * * 3: The output (\f$o_t\f$).
-     *      A 2-D tensor of type T, of shape [batch_size, output_size]. This is
-     *      effectively the same as the current “output state (out)” value.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, output_size]. This is effectively the same as the
+     *      current “output state (out)” value.
      */
     LSTM = 16,
 
     /**
      * Performs an 2-D max pooling operation.
      *
-     * The output dimensions are functions of the filter dimensions, stride, and padding.
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
      *
      * The values in the output tensor are computed as:
      *
      *     output[batch, row, col, channel] =
      *         max_{i, j} (input[batch, row + i, col + j, channel])
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -854,52 +975,68 @@
      * Both explicit padding and implicit padding are supported.
      *
      * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the padding on the left, in the ‘width’ dimension.
-     * * 2: An INT32 value, specifying the padding on the right,in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the padding on the top, in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the padding on the bottom, in the ‘height’ dimension.
-     * * 5: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 6: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 7: An INT32 value, specifying the filter width.
-     * * 8: An INT32 value, specifying the filter height.
-     * * 9: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 6: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 7: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 8: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 9: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the implicit padding scheme, has to be one of the
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
      *      following values: {0 (NONE), 1 (SAME), 2 (VALID)}.
-     * * 2: An INT32 value, specifying the stride when walking through input
-     *      in the ‘width’ dimension.
-     * * 3: An INT32 value, specifying the stride when walking through input
-     *      in the ‘height’ dimension.
-     * * 4: An INT32 value, specifying the filter width.
-     * * 5: An INT32 value, specifying the filter height.
-     * * 6: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 3: An {@link OperandType::INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 4: An {@link OperandType::INT32} scalar, specifying the filter
+     *      width.
+     * * 5: An {@link OperandType::INT32} scalar, specifying the filter
+     *      height.
+     * * 6: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, out_height, out_width, depth].
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth].
      */
     MAX_POOL_2D = 17,
 
     /**
      * Multiplies two tensors, element-wise.
      *
-     * Takes two input tensors of identical type and compatible dimensions. The output
-     * is the product of both input tensors, optionally modified by an activation function.
+     * Takes two input tensors of identical {@link OperandType} and compatible
+     * dimensions. The output is the product of both input tensors, optionally
+     * modified by an activation function.
      *
      * Two dimensions are compatible when:
      *     1. they are equal, or
      *     2. one of them is 1
      *
-     * The size of the resulting output is the maximum size along each dimension of the
-     * input operands. It starts with the trailing dimensions, and works its way forward.
+     * The size of the resulting output is the maximum size along each dimension
+     * of the input operands. It starts with the trailing dimensions, and works
+     * its way forward.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -907,14 +1044,17 @@
      *
      * Inputs:
      * * 0: A tensor.
-     * * 1: A tensor of the same type, and compatible dimensions as input0.
-     * * 2: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *      Specifies the activation to invoke on the result of each addition.
+     * * 1: A tensor of the same {@link OperandType}, and compatible dimensions
+     *      as input0.
+     * * 2: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * * 0: The product, a tensor of the same type as input0.
-     *      For output tensor of {@link OperandType::TENSOR_QUANT8_ASYMM} type, the following
-     *      condition must be satisfied: output_scale > input1_scale * input2_scale.
+     * * 0: The product, a tensor of the same {@link OperandType} as input0.
+     *      For output tensor of {@link OperandType::TENSOR_QUANT8_ASYMM},
+     *      the following condition must be satisfied:
+     *      output_scale > input1_scale * input2_scale.
      */
     MUL = 18,
 
@@ -925,7 +1065,7 @@
      *
      *     output = max(0, input)
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -946,7 +1086,7 @@
      *
      *     output = min(1.f, max(-1.f, input))
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -967,7 +1107,7 @@
      *
      *     output = min(6, max(0, input))
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -984,10 +1124,10 @@
     /**
      * Reshapes a tensor.
      *
-     * Given tensor, this operation returns a tensor that has the same values as tensor,
-     * but with a newly specified shape.
+     * Given tensor, this operation returns a tensor that has the same values as
+     * tensor, but with a newly specified shape.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -995,9 +1135,9 @@
      *
      * Inputs:
      * * 0: A tensor, specifying the tensor to be reshaped.
-     * * 1: A 1-D tensor of type {@link OperandType::TENSOR_INT32}, defining the shape
-     *      of the output tensor. The number of elements implied by shape must be the same
-     *      as the number of elements in the input tensor.
+     * * 1: A 1-D tensor of {@link OperandType::TENSOR_INT32}, defining the
+     *      shape of the output tensor. The number of elements implied by shape
+     *      must be the same as the number of elements in the input tensor.
      *
      * Outputs:
      * * 0: The output tensor, of shape specified by the input shape.
@@ -1007,21 +1147,26 @@
     /**
      * Resizes images to given size using the bilinear interpretation.
      *
-     * Resized images must be distorted if their output aspect ratio is not the same as
-     * input aspect ratio.
+     * Resized images must be distorted if their output aspect ratio is not the
+     * same as input aspect ratio. The corner pixels of output may not be the
+     * same as corner pixels of input.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
      * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying the input.
-     * * 1: An INT32 value, specifying the output height of the output tensor.
-     * * 2: An INT32 value, specifying the output width of the output tensor.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the output
+     *      height of the output tensor.
+     * * 2: An {@link OperandType::INT32} scalar, specifying the output
+     *      width of the output tensor.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, new_height, new_width, depth].
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, new_height, new_width, depth].
      */
     RESIZE_BILINEAR = 23,
 
@@ -1029,7 +1174,8 @@
      * A basic recurrent neural network layer.
      *
      * This layer implements the operation:
-     * outputs = state = activation(inputs * input_weights + state * recurrent_weights + bias)
+     * outputs = state = activation(inputs * input_weights +
+     *                              state * recurrent_weights + bias)
      *
      * Where:
      * * “input_weights” is a weight matrix that multiplies the inputs;
@@ -1040,42 +1186,49 @@
      * * “activation” is the function passed as the “fused_activation_function”
      *   argument (if not “NONE”).
      *
-     * Supported tensor types (Type T):
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Inputs:
      * * 0: input.
-     *      A 2-D tensor of type T, of shape [batch_size, input_size], where
-     *      “batch_size” corresponds to the batching dimension, and “input_size” is
-     *      the size of the input.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32} of shape
+     *      [batch_size, input_size], where “batch_size” corresponds to the
+     *      batching dimension, and “input_size” is the size of the input.
      * * 1: weights.
-     *      A 2-D tensor of type T, of shape [num_units, input_size], where
-     *      “num_units” corresponds to the number of units.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size], where “num_units” corresponds to the
+     *      number of units.
      * * 2: recurrent_weights.
-     *      A 2-D tensor of type T, of shape [num_units, num_units], with columns
-     *      corresponding to the weights from each unit.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, num_units], with columns corresponding to the weights
+     *      from each unit.
      * * 3: bias.
-     *      A 1-D tensor of type T, of shape [num_units].
+     *      A 1-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units].
      * * 4: hidden state (in).
-     *      A 2-D tensor of type T, of shape [batch_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units].
      * * 5: fused_activation_function.
-     *      An optional {@link FusedActivationFunc} value indicating the activation
-     *      function. If “NONE” is specified then it results in a linear
-     *      activation.
+     *      An optional {@link FusedActivationFunc} value indicating the
+     *      activation function. If “NONE” is specified then it results in a
+     *      linear activation.
      *
      * Outputs:
      * * 0: hidden state (out).
-     *      A 2-D tensor of type T, of shape [batch_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units].
      *
      * * 1: output.
-     *      A 2-D tensor of type T, of shape [batch_size, num_units]. This is
-     *      effectively the same as the current state value.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, num_units]. This is effectively the same as the
+     *      current state value.
      */
     RNN = 24,
 
     /**
-     * Computes the softmax activation on the input tensor element-wise, per batch, by
-     * normalizing the input vector so the maximum coefficient is zero.
+     * Computes the softmax activation on the input tensor element-wise, per
+     * batch, by normalizing the input vector so the maximum coefficient is
+     * zero.
      *
      * The output is calculated using this formula:
      *
@@ -1083,7 +1236,7 @@
      *         exp((input[batch, i] - max(input[batch, :])) * beta) /
      *         sum_{k}{exp((input[batch, k] - max(input[batch, :])) * beta)}
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
@@ -1091,11 +1244,12 @@
      *
      * Inputs:
      * * 0: A 2-D or 4-D tensor, specifying the tensor to be reshaped.
-     * * 1: A FLOAT32 value, specifying the positive scaling factor for the exponent, beta.
+     * * 1: An {@link OperandType::FLOAT32} scalar, specifying the positive
+     *      scaling factor for the exponent, beta.
      *
      * Outputs:
      * * 0: The output tensor of same shape as input0.
-     *      For {@link OperandType::TENSOR_QUANT8_ASYMM} type,
+     *      For {@link OperandType::TENSOR_QUANT8_ASYMM},
      *      the scale must be 1.f / 256 and the zeroPoint must be 0.
      */
     SOFTMAX = 25,
@@ -1103,30 +1257,33 @@
     /**
      * Rearranges blocks of spatial data, into depth.
      *
-     * More specifically, this op outputs a copy of the input tensor where values from
-     * the height and width dimensions are moved to the depth dimension.
-     * The value block_size indicates the input block size and how the data is moved.
+     * More specifically, this op outputs a copy of the input tensor where
+     * values from the height and width dimensions are moved to the depth
+     * dimension. The value block_size indicates the input block size and how
+     * the data is moved.
      *
-     * Chunks of data of size block_size * block_size from depth are rearranged into
-     * non-overlapping blocks of size block_size x block_size.
+     * Chunks of data of size block_size * block_size from depth are rearranged
+     * into non-overlapping blocks of size block_size x block_size.
      *
      * The depth of the output tensor is input_depth * block_size * block_size.
      * The input tensor's height and width must be divisible by block_size.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: 4, with "NHWC" data layout.
      *
      * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
-     * * 1: An INT32 value, specifying the block_size. block_size must be >=1 and
-     *      block_size must be a divisor of both the input height and width.
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: An {@link OperandType::INT32} scalar, specifying the block_size.
+     *      block_size must be >=1 and block_size must be a divisor of both the
+     *      input height and width.
      *
      * Outputs:
-     * * 0: The output 4-D tensor, of shape [batch, height/block_size, width/block_size,
-     *      depth*block_size*block_size].
+     * * 0: The output 4-D tensor, of shape [batch, height/block_size,
+     *      width/block_size, depth*block_size*block_size].
      */
     SPACE_TO_DEPTH = 26,
 
@@ -1143,21 +1300,22 @@
      * INTERSPEECH, 2015.
      *
      * It processes the incoming input using a 2-stage filtering mechanism:
-     * * stage 1 performs filtering on the "features" dimension, whose outputs get
-     *   pushed into a memory of fixed-size memory_size.
+     * * stage 1 performs filtering on the "features" dimension, whose outputs
+     *   get pushed into a memory of fixed-size memory_size.
      * * stage 2 performs filtering on the "time" dimension of the memory_size
      *   memoized outputs of stage 1.
      *
      * Specifically, for rank 1, this layer implements the operation:
      *
-     *     memory = push(conv1d(inputs, weights_feature, feature_dim, "PADDING_VALID"));
+     *     memory = push(conv1d(inputs, weights_feature, feature_dim,
+     *                          "PADDING_VALID"));
      *     outputs = activation(memory * weights_time + bias);
      *
      * Where:
      * * “weights_feature” is a weights matrix that processes the inputs (by
-     *   convolving the input with every “feature filter”), and whose outputs get
-     *   pushed, stacked in order, into the fixed-size “memory” (the oldest entry
-     *   gets dropped);
+     *   convolving the input with every “feature filter”), and whose outputs
+     *   get pushed, stacked in order, into the fixed-size “memory” (the oldest
+     *   entry gets dropped);
      * * “weights_time” is a weights matrix that processes the “memory” (by a
      *   batched matrix multiplication on the num_units);
      * * “bias” is an optional bias vector (added to each output vector in the
@@ -1168,35 +1326,42 @@
      * Each rank adds a dimension to the weights matrices by means of stacking
      * the filters.
      *
-     * Supported tensor types (type T):
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Inputs:
      * * 0: input.
-     *      A 2-D tensor of type T, of shape [batch_size, input_size], where
-     *      “batch_size” corresponds to the batching dimension, and “input_size” is
-     *      the size of the input.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, input_size], where “batch_size” corresponds to the
+     *      batching dimension, and “input_size” is the size of the input.
      * * 1: weights_feature.
-     *      A 2-D tensor of type T, of shape [num_units, input_size], where
-     *      “num_units” corresponds to the number of units.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, input_size], where “num_units” corresponds to the
+     *      number of units.
      * * 2: weights_time.
-     *      A 2-D tensor of type T, of shape [num_units, memory_size], where
-     *      “memory_size” corresponds to the fixed-size of the memory.
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [num_units, memory_size], where “memory_size” corresponds to the
+     *      fixed-size of the memory.
      * * 3: bias.
-     *      An optional 1-D tensor of type T, of shape [num_units].
+     *      An optional 1-D tensor of {@link OperandType::TENSOR_FLOAT32},
+     *      of shape [num_units].
      * * 4: state (in).
-     *      A 2-D tensor of type T, of shape [batch_size, (memory_size - 1) * num_units * rank].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, (memory_size - 1) * num_units * rank].
      * * 5: rank.
      *      The rank of the SVD approximation.
      * * 6: fused_activation_function.
-     *      An optional {@link FusedActivationFunc} value indicating the activation function.
-     *      If “NONE” is specified then it results in a linear activation.
+     *      An optional {@link FusedActivationFunc} value indicating the
+     *      activation function. If “NONE” is specified then it results in a
+     *      linear activation.
      *
      * Outputs:
      * * 0: state (out).
-     *      A 2-D tensor of type T, of shape [batch_size, (memory_size - 1) * num_units * rank].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+     *      [batch_size, (memory_size - 1) * num_units * rank].
      * * 1: output.
-     *      A 2-D tensor of type T, of shape [batch_size, num_units].
+     *      A 2-D tensor of {@link OperandType::TENSOR_FLOAT32}, of shape
+         *      [batch_size, num_units].
      */
     SVDF = 27,
 
@@ -1207,7 +1372,7 @@
      *
      *     output = tanh(input)
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: up to 4.
@@ -1223,7 +1388,8 @@
     /**
      * OEM specific operation.
      *
-     * This operation is OEM specific. It should only be used for OEM applications.
+     * This operation is OEM specific. It should only be used for OEM
+     * applications.
      */
     OEM_OPERATION = 10000,
 };
@@ -1270,8 +1436,8 @@
     CONSTANT_REFERENCE,
 
     /**
-     * The operand does not have a value. This is valid only for optional arguments
-     * of operations.
+     * The operand does not have a value. This is valid only for optional
+     * arguments of operations.
      */
     NO_VALUE,
 };
@@ -1387,7 +1553,8 @@
 
     /**
      * Where to find the data for this operand.
-     * If the lifetime is TEMPORARY_VARIABLE, MODEL_INPUT, MODEL_OUTPUT, or NO_VALUE:
+     * If the lifetime is TEMPORARY_VARIABLE, MODEL_INPUT, MODEL_OUTPUT, or
+     * NO_VALUE:
      * - All the fields must be 0.
      * If the lifetime is CONSTANT_COPY:
      * - location.poolIndex is 0.
@@ -1481,9 +1648,9 @@
  */
 struct RequestArgument {
     /**
-     * If true, the argument does not have a value. This can be used for operations
-     * that take optional arguments. If true, the fields of location are set to 0 and
-     * the dimensions vector is left empty.
+     * If true, the argument does not have a value. This can be used for
+     * operations that take optional arguments. If true, the fields of location
+     * are set to 0 and the dimensions vector is left empty.
      */
     bool hasNoValue;
 
@@ -1495,10 +1662,10 @@
     /**
      * Updated dimension information.
      *
-     * If dimensions.size() > 0, dimension information was provided along with the
-     * argument. This can be the case for models that accept inputs of varying size.
-     * This can't change the rank, just the value of the dimensions that were
-     * unspecified in the model.
+     * If dimensions.size() > 0, dimension information was provided along with
+     * the argument. This can be the case for models that accept inputs of
+     * varying size. This can't change the rank, just the value of the
+     * dimensions that were unspecified in the model.
      */
     vec<uint32_t> dimensions;
 };
diff --git a/neuralnetworks/1.0/vts/functional/GeneratedTestHarness.cpp b/neuralnetworks/1.0/vts/functional/GeneratedTestHarness.cpp
index ed1fb94..0682ab9 100644
--- a/neuralnetworks/1.0/vts/functional/GeneratedTestHarness.cpp
+++ b/neuralnetworks/1.0/vts/functional/GeneratedTestHarness.cpp
@@ -36,16 +36,16 @@
 namespace generated_tests {
 using ::android::hardware::neuralnetworks::V1_0::implementation::ExecutionCallback;
 using ::android::hardware::neuralnetworks::V1_0::implementation::PreparedModelCallback;
-using ::generated_tests::filter;
-using ::generated_tests::for_all;
-using ::generated_tests::for_each;
-using ::generated_tests::resize_accordingly;
-using ::generated_tests::MixedTyped;
-using ::generated_tests::MixedTypedExampleType;
-using ::generated_tests::Float32Operands;
-using ::generated_tests::Int32Operands;
-using ::generated_tests::Quant8Operands;
-using ::generated_tests::compare;
+using ::test_helper::filter;
+using ::test_helper::for_all;
+using ::test_helper::for_each;
+using ::test_helper::resize_accordingly;
+using ::test_helper::MixedTyped;
+using ::test_helper::MixedTypedExampleType;
+using ::test_helper::Float32Operands;
+using ::test_helper::Int32Operands;
+using ::test_helper::Quant8Operands;
+using ::test_helper::compare;
 
 template <typename T>
 void copy_back_(MixedTyped* dst, const std::vector<RequestArgument>& ra, char* src) {
diff --git a/neuralnetworks/1.0/vts/functional/GeneratedTests.cpp b/neuralnetworks/1.0/vts/functional/GeneratedTests.cpp
index 2107333..d84479c 100644
--- a/neuralnetworks/1.0/vts/functional/GeneratedTests.cpp
+++ b/neuralnetworks/1.0/vts/functional/GeneratedTests.cpp
@@ -31,7 +31,7 @@
 namespace neuralnetworks {
 
 namespace generated_tests {
-using ::generated_tests::MixedTypedExampleType;
+using ::test_helper::MixedTypedExampleType;
 extern void Execute(const sp<V1_0::IDevice>&, std::function<V1_0::Model(void)>,
                     std::function<bool(int)>, const std::vector<MixedTypedExampleType>&);
 }  // namespace generated_tests
@@ -45,7 +45,7 @@
 using ::android::nn::allocateSharedMemory;
 
 // Mixed-typed examples
-typedef generated_tests::MixedTypedExampleType MixedTypedExample;
+typedef test_helper::MixedTypedExampleType MixedTypedExample;
 
 // in frameworks/ml/nn/runtime/tests/generated/
 #include "all_generated_V1_0_vts_tests.cpp"
diff --git a/neuralnetworks/1.0/vts/functional/Models.h b/neuralnetworks/1.0/vts/functional/Models.h
index a1fbe92..751ab32 100644
--- a/neuralnetworks/1.0/vts/functional/Models.h
+++ b/neuralnetworks/1.0/vts/functional/Models.h
@@ -30,7 +30,7 @@
 namespace vts {
 namespace functional {
 
-using MixedTypedExample = generated_tests::MixedTypedExampleType;
+using MixedTypedExample = test_helper::MixedTypedExampleType;
 
 #define FOR_EACH_TEST_MODEL(FN)                          \
     FN(add_broadcast_quant8)                             \
diff --git a/neuralnetworks/1.0/vts/functional/ValidateRequest.cpp b/neuralnetworks/1.0/vts/functional/ValidateRequest.cpp
index 08f2613..09c1878 100644
--- a/neuralnetworks/1.0/vts/functional/ValidateRequest.cpp
+++ b/neuralnetworks/1.0/vts/functional/ValidateRequest.cpp
@@ -36,9 +36,9 @@
 using ::android::hardware::neuralnetworks::V1_0::implementation::ExecutionCallback;
 using ::android::hardware::neuralnetworks::V1_0::implementation::PreparedModelCallback;
 using ::android::hidl::memory::V1_0::IMemory;
-using generated_tests::MixedTyped;
-using generated_tests::MixedTypedExampleType;
-using generated_tests::for_all;
+using test_helper::MixedTyped;
+using test_helper::MixedTypedExampleType;
+using test_helper::for_all;
 
 ///////////////////////// UTILITY FUNCTIONS /////////////////////////
 
diff --git a/neuralnetworks/1.1/types.hal b/neuralnetworks/1.1/types.hal
index 8290fbb..e4c656d 100644
--- a/neuralnetworks/1.1/types.hal
+++ b/neuralnetworks/1.1/types.hal
@@ -29,87 +29,95 @@
     /**
      * BatchToSpace for N-dimensional tensors.
      *
-     * This operation reshapes the batch dimension (dimension 0) into M + 1 dimensions of shape
-     * block_shape + [batch], interleaves these blocks back into the grid defined by the
-     * spatial dimensions [1, ..., M], to obtain a result with the same rank as the input.
+     * This operation reshapes the batch dimension (dimension 0) into M + 1
+     * dimensions of shape block_shape + [batch], interleaves these blocks back
+     * into the grid defined by the spatial dimensions [1, ..., M], to obtain a
+     * result with the same rank as the input.
      *
      * This is the reverse of SpaceToBatch.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the tensor to be reshaped
-     * 1: A 1-D Tensor of type TENSOR_INT32, the block sizes for each spatial dimension of the
-     *    input tensor. All values must be >= 1.
+     * * 0: An n-D tensor, specifying the tensor to be reshaped
+     * * 1: A 1-D Tensor of {@link OperandType::TENSOR_INT32}, the block
+     *      sizes for each spatial dimension of the input tensor. All values
+     *      must be >= 1.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     BATCH_TO_SPACE_ND = 29,
 
     /**
      * Element-wise division of two tensors.
      *
-     * Takes two input tensors of identical type and compatible dimensions. The output
-     * is the result of dividing the first input tensor by the second, optionally
-     * modified by an activation function.
+     * Takes two input tensors of identical {@link OperandType} and compatible
+     * dimensions. The output is the result of dividing the first input tensor
+     * by the second, optionally modified by an activation function.
      *
      * Two dimensions are compatible when:
      *     1. they are equal, or
      *     2. one of them is 1
      *
-     * The size of the output is the maximum size along each dimension of the input operands.
-     * It starts with the trailing dimensions, and works its way forward.
+     * The size of the output is the maximum size along each dimension of the
+     * input operands. It starts with the trailing dimensions, and works its way
+     * forward.
      *
      * Example:
      *     input1.dimension =    {4, 1, 2}
      *     input2.dimension = {5, 4, 3, 1}
      *     output.dimension = {5, 4, 3, 2}
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the first input.
-     * 1: A tensor of the same type, and compatible dimensions as input0.
-     * 2: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *    Specifies the activation to invoke on the result of each addition.
+     * * 0: An n-D tensor, specifying the first input.
+     * * 1: A tensor of the same {@link OperandType}, and compatible dimensions
+     *      as input0.
+     * * 2: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     DIV = 30,
 
     /**
      * Computes the mean of elements across dimensions of a tensor.
      *
-     * Reduces the input tensor along the given dimensions to reduce. Unless keep_dims
-     * is true, the rank of the tensor is reduced by 1 for each entry in axis.
-     * If keep_dims is true, the reduced dimensions are retained with length 1.
+     * Reduces the input tensor along the given dimensions to reduce. Unless
+     * keep_dims is true, the rank of the tensor is reduced by 1 for each entry
+     * in axis. If keep_dims is true, the reduced dimensions are retained with
+     * length 1.
      *
-     * If dimensions to reduce have no entries, all dimensions are reduced, and a tensor with
-     * a single element is returned.
+     * If dimensions to reduce have no entries, all dimensions are reduced, and
+     * a tensor with a single element is returned.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: A tensor, specifying the input.
-     * 1: A 1-D Tensor of type TENSOR_INT32. The dimensions to reduce. If None (the default),
-     *    reduces all dimensions. Must be in the range [-rank(input_tensor), rank(input_tensor)).
-     * 2: An INT32 value, keep_dims. If positive, retains reduced dimensions with length 1.
+     * * 0: A tensor, specifying the input.
+     * * 1: A 1-D Tensor of {@link OperandType::TENSOR_INT32}. The dimensions
+     *      to reduce. If None (the default), reduces all dimensions. Must be in
+     *      the range [-rank(input_tensor), rank(input_tensor)).
+     * * 2: An {@link OperandType::INT32} scalar, keep_dims. If positive,
+     *      retains reduced dimensions with length 1.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     MEAN = 31,
 
@@ -118,163 +126,193 @@
      *
      * This operation pads a tensor according to the specified paddings.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the tensor to be padded.
-     * 1: A 2-D Tensor of type TENSOR_INT32, the paddings for each spatial dimension of the
-     *    input tensor. The shape of the tensor must be {rank(input0), 2}.
-     *    padding[i, 0] specifies the number of element to be padded in the front of dimension i.
-     *    padding[i, 1] specifies the number of element to be padded after the end of dimension i.
+     * * 0: An n-D tensor, specifying the tensor to be padded.
+     * * 1: A 2-D Tensor of {@link OperandType::TENSOR_INT32}, the paddings
+     *      for each spatial dimension of the input tensor. The shape of the
+     *      tensor must be {rank(input0), 2}.
+     *      padding[i, 0] specifies the number of element to be padded in the
+     *      front of dimension i.
+     *      padding[i, 1] specifies the number of element to be padded after the
+     *      end of dimension i.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     PAD = 32,
 
     /**
      * SpaceToBatch for N-Dimensional tensors.
      *
-     * This operation divides "spatial" dimensions [1, ..., M] of the input into a grid of blocks
-     * of shape block_shape, and interleaves these blocks with the "batch" dimension (0) such that
-     * in the output, the spatial dimensions [1, ..., M] correspond to the position within the grid,
-     * and the batch dimension combines both the position within a spatial block and the original
-     * batch position. Prior to division into blocks, the spatial dimensions of the input are
-     * optionally zero padded according to paddings.
+     * This operation divides "spatial" dimensions [1, ..., M] of the input into
+     * a grid of blocks of shape block_shape, and interleaves these blocks with
+     * the "batch" dimension (0) such that in the output, the spatial dimensions
+     * [1, ..., M] correspond to the position within the grid, and the batch
+     * dimension combines both the position within a spatial block and the
+     * original batch position. Prior to division into blocks, the spatial
+     * dimensions of the input are optionally zero padded according to paddings.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the input.
-     * 1: A 1-D Tensor of type TENSOR_INT32, the block sizes for each spatial dimension of the
-     *    input tensor. All values must be >= 1.
-     * 2: A 2-D Tensor of type TENSOR_INT32, the paddings for each spatial diemension of the
-     *    input tensor. All values must be >= 0. The shape of the tensor must be {rank(input0), 2}.
-     *    padding[i, 0] specifies the number of element to be padded in the front of dimension i.
-     *    padding[i, 1] specifies the number of element to be padded after the end of dimension i.
+     * * 0: An n-D tensor, specifying the input.
+     * * 1: A 1-D Tensor of {@link OperandType::TENSOR_INT32}, the block
+     *      sizes for each spatial dimension of the input tensor. All values
+     *      must be >= 1.
+     * * 2: A 2-D Tensor of {@link OperandType::TENSOR_INT32}, the paddings
+     *      for each spatial dimension of the input tensor. All values must be
+     *      >= 0. The shape of the tensor must be {rank(input0), 2}.
+     *      padding[i, 0] specifies the number of element to be padded in the
+     *      front of dimension i.
+     *      padding[i, 1] specifies the number of element to be padded after the
+     *      end of dimension i.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     SPACE_TO_BATCH_ND = 33,
 
     /**
      * Removes dimensions of size 1 from the shape of a tensor.
      *
-     * Given a tensor input, this operation returns a tensor of the same type with all
-     * dimensions of size 1 removed. If you don't want to remove all size 1 dimensions,
-     * you can remove specific size 1 dimensions by specifying the axes (input1).
+     * Given a tensor input, this operation returns a tensor of the same
+     * {@link OperandType} with all dimensions of size 1 removed. If you don't
+     * want to remove all size 1 dimensions, you can remove specific size 1
+     * dimensions by specifying the axes (input1).
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, the tensor to be squeezed.
-     * 1: An optional 1-D tensor of type TENSOR_INT32. The dimensions to squeeze. If specified
-     *    only squeezes the dimensions listed. Otherwise, squeezes all dimensions.
-     *    The dimension index starts at 0. An error must be reported if squeezing a dimension that
-     *    is not 1.
+     * * 0: An n-D tensor, the tensor to be squeezed.
+     * * 1: An optional 1-D tensor of {@link OperandType::TENSOR_INT32}. The
+     *      dimensions to squeeze. If specified only squeezes the dimensions
+     *      listed. Otherwise, squeezes all dimensions. The dimension index
+     *      starts at 0. An error must be reported if squeezing a dimension that
+     *      is not 1.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0. Contains the same data as input, but has one or more
-     *    dimensions of size 1 removed.
+     * * 0: A tensor of the same {@link OperandType} as input0. Contains the
+     *      same data as input, but has one or more dimensions of size 1
+     *      removed.
      */
     SQUEEZE = 34,
 
     /**
      * Extracts a strided slice of a tensor.
      *
-     * Roughly speaking, this op extracts a slice of size (end - begin) / stride from the given
-     * input tensor. Starting at the location specified by begin the slice continues by adding
-     * stride to the index until all dimensions are not less than end. Note that a stride can
-     * be negative, which causes a reverse slice.
+     * Roughly speaking, this op extracts a slice of size (end - begin) / stride
+     * from the given input tensor. Starting at the location specified by begin
+     * the slice continues by adding stride to the index until all dimensions
+     * are not less than end. Note that a stride can be negative, which causes a
+     * reverse slice.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the tensor to be sliced.
-     * 1: A 1-D Tensor of type TENSOR_INT32, the starts of the dimensions of the input
-     *    tensor to be sliced. The length must be of rank(input0).
-     * 2: A 1-D Tensor of type TENSOR_INT32, the ends of the dimensions of the input
-     *    tensor to be sliced. The length must be of rank(input0).
-     * 3: A 1-D Tensor of type TENSOR_INT32, the strides of the dimensions of the input
-     *    tensor to be sliced. The length must be of rank(input0).
+     * * 0: An n-D tensor, specifying the tensor to be sliced.
+     * * 1: A 1-D Tensor of {@link OperandType::TENSOR_INT32}, the starts of
+     *      the dimensions of the input tensor to be sliced. The length must be
+     *      of rank(input0).
+     * * 2: A 1-D Tensor of {@link OperandType::TENSOR_INT32}, the ends of
+     *      the dimensions of the input tensor to be sliced. The length must be
+     *      of rank(input0).
+     * * 3: A 1-D Tensor of {@link OperandType::TENSOR_INT32}, the strides of
+     *      the dimensions of the input tensor to be sliced. The length must be
+     *      of rank(input0).
+     * * 4: An {@link OperandType::INT32} scalar, begin_mask. If the ith bit
+     *      of begin_mask is set, begin[i] is ignored and the fullest possible
+     *      range in that dimension is used instead.
+     * * 5: An {@link OperandType::INT32} scalar, end_mask. If the ith bit of
+     *      end_mask is set, end[i] is ignored and the fullest possible range in
+     *      that dimension is used instead.
+     * * 6: An {@link OperandType::INT32} scalar, shrink_axis_mask. An int32
+     *      mask. If the ith bit of shrink_axis_mask is set, it implies that the
+     *      ith specification shrinks the dimensionality by 1. A slice of size 1
+     *      starting from begin[i] in the dimension must be preserved.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     STRIDED_SLICE = 35,
 
     /**
      * Element-wise subtraction of two tensors.
      *
-     * Takes two input tensors of identical type and compatible dimensions. The output
-     * is the result of subtracting the second input tensor from the first one, optionally
-     * modified by an activation function.
+     * Takes two input tensors of identical {@link OperandType} and compatible
+     * dimensions. The output is the result of subtracting the second input
+     * tensor from the first one, optionally modified by an activation function.
      *
      * Two dimensions are compatible when:
      *     1. they are equal, or
      *     2. one of them is 1
      *
-     * The size of the output is the maximum size along each dimension of the input operands.
-     * It starts with the trailing dimensions, and works its way forward.
+     * The size of the output is the maximum size along each dimension of the
+     * input operands. It starts with the trailing dimensions, and works its way
+     * forward.
      *
      * Example:
      *     input1.dimension =    {4, 1, 2}
      *     input2.dimension = {5, 4, 3, 1}
      *     output.dimension = {5, 4, 3, 2}
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the first input.
-     * 1: A tensor of the same type, and compatible dimensions as input0.
-     * 2: An INT32 value, and has to be one of the {@link FusedActivationFunc} values.
-     *    Specifies the activation to invoke on the result of each addition.
+     * * 0: An n-D tensor, specifying the first input.
+     * * 1: A tensor of the same {@link OperandType}, and compatible dimensions
+     *      as input0.
+     * * 2: An {@link OperandType::INT32} scalar, and has to be one of the
+     *      {@link FusedActivationFunc} values. Specifies the activation to
+     *      invoke on the result.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     SUB = 36,
 
     /**
-     * Transposes the input tensor, permuting the dimensions according to the perm tensor.
+     * Transposes the input tensor, permuting the dimensions according to the
+     * perm tensor.
      *
-     * The returned tensor's dimension i corresponds to the input dimension perm[i].
-     * If perm is not given, it is set to (n-1...0), where n is the rank of the input tensor.
-     * Hence by default, this operation performs a regular matrix transpose on 2-D input Tensors.
+     * The returned tensor's dimension i corresponds to the input dimension
+     * perm[i]. If perm is not given, it is set to (n-1...0), where n is the
+     * rank of the input tensor. Hence by default, this operation performs a
+     * regular matrix transpose on 2-D input Tensors.
      *
-     * Supported tensor types:
+     * Supported tensor {@link OperandType}:
      * * {@link OperandType::TENSOR_FLOAT32}
      * * {@link OperandType::TENSOR_QUANT8_ASYMM}
      *
      * Supported tensor rank: up to 4
      *
      * Inputs:
-     * 0: An n-D tensor, specifying the tensor to be transposed.
-     * 1: An optional 1-D Tensor of type TENSOR_INT32, the permutation of the dimensions of the
-     *    input tensor.
+     * * 0: An n-D tensor, specifying the tensor to be transposed.
+     * * 1: An optional 1-D Tensor of {@link OperandType::TENSOR_INT32},
+     *      the permutation of the dimensions of the input tensor.
      *
      * Outputs:
-     * 0: A tensor of the same type as input0.
+     * * 0: A tensor of the same {@link OperandType} as input0.
      */
     TRANSPOSE = 37,
 };
diff --git a/neuralnetworks/1.1/vts/functional/GeneratedTests.cpp b/neuralnetworks/1.1/vts/functional/GeneratedTests.cpp
index 1f1cc7a..95c2b1a 100644
--- a/neuralnetworks/1.1/vts/functional/GeneratedTests.cpp
+++ b/neuralnetworks/1.1/vts/functional/GeneratedTests.cpp
@@ -31,7 +31,7 @@
 namespace neuralnetworks {
 
 namespace generated_tests {
-using ::generated_tests::MixedTypedExampleType;
+using ::test_helper::MixedTypedExampleType;
 extern void Execute(const sp<V1_1::IDevice>&, std::function<V1_1::Model(void)>,
                     std::function<bool(int)>, const std::vector<MixedTypedExampleType>&);
 }  // namespace generated_tests
diff --git a/neuralnetworks/1.1/vts/functional/Models.h b/neuralnetworks/1.1/vts/functional/Models.h
index c3cadb5..eac4df1 100644
--- a/neuralnetworks/1.1/vts/functional/Models.h
+++ b/neuralnetworks/1.1/vts/functional/Models.h
@@ -31,7 +31,7 @@
 namespace vts {
 namespace functional {
 
-using MixedTypedExample = generated_tests::MixedTypedExampleType;
+using MixedTypedExample = test_helper::MixedTypedExampleType;
 
 #define FOR_EACH_TEST_MODEL(FN)                                \
     FN(add)                                                    \
diff --git a/neuralnetworks/1.1/vts/functional/ValidateRequest.cpp b/neuralnetworks/1.1/vts/functional/ValidateRequest.cpp
index b42f561..687b760 100644
--- a/neuralnetworks/1.1/vts/functional/ValidateRequest.cpp
+++ b/neuralnetworks/1.1/vts/functional/ValidateRequest.cpp
@@ -36,9 +36,9 @@
 using ::android::hardware::neuralnetworks::V1_0::implementation::ExecutionCallback;
 using ::android::hardware::neuralnetworks::V1_0::implementation::PreparedModelCallback;
 using ::android::hidl::memory::V1_0::IMemory;
-using generated_tests::MixedTyped;
-using generated_tests::MixedTypedExampleType;
-using generated_tests::for_all;
+using test_helper::MixedTyped;
+using test_helper::MixedTypedExampleType;
+using test_helper::for_all;
 
 ///////////////////////// UTILITY FUNCTIONS /////////////////////////
 
diff --git a/radio/1.1/ISap.hal b/radio/1.1/ISap.hal
index edcf176..0cabccc 100644
--- a/radio/1.1/ISap.hal
+++ b/radio/1.1/ISap.hal
@@ -18,8 +18,7 @@
 
 import @1.0::ISap;
 
-interface ISap extends @1.0::ISap {
-    /**
-     * Empty top level interface.
-     */
-};
+/**
+ * Empty top level interface.
+ */
+interface ISap extends @1.0::ISap {};
diff --git a/radio/1.2/ISap.hal b/radio/1.2/ISap.hal
index 757027c..65f9b84 100644
--- a/radio/1.2/ISap.hal
+++ b/radio/1.2/ISap.hal
@@ -18,8 +18,7 @@
 
 import @1.1::ISap;
 
-interface ISap extends @1.1::ISap {
-    /**
-     * Empty top level interface.
-     */
-};
+/**
+ * Empty top level interface.
+ */
+interface ISap extends @1.1::ISap {};
diff --git a/secure_element/1.0/vts/functional/VtsHalSecureElementV1_0TargetTest.cpp b/secure_element/1.0/vts/functional/VtsHalSecureElementV1_0TargetTest.cpp
index dab81e2..3ea3e8d 100644
--- a/secure_element/1.0/vts/functional/VtsHalSecureElementV1_0TargetTest.cpp
+++ b/secure_element/1.0/vts/functional/VtsHalSecureElementV1_0TargetTest.cpp
@@ -134,6 +134,7 @@
     EXPECT_LE((unsigned int)2, response.selectResponse.size());
     EXPECT_LE(1, response.channelNumber);
     std::vector<uint8_t> command = DATA_APDU;
+    command[0] |= response.channelNumber;
     std::vector<uint8_t> transmitResponse;
     se_->transmit(command, [&transmitResponse](std::vector<uint8_t> res) {
         transmitResponse.resize(res.size());
@@ -168,7 +169,8 @@
                               }
                           });
     if (statusReturned == SecureElementStatus::SUCCESS) {
-        EXPECT_LE((unsigned int)3, response.size());
+        EXPECT_LE((unsigned int)2, response.size());
+        se_->closeChannel(0);
         return;
     }
     EXPECT_EQ(SecureElementStatus::UNSUPPORTED_OPERATION, statusReturned);
diff --git a/tv/cec/1.0/types.hal b/tv/cec/1.0/types.hal
index a1853a3..c734c4d 100644
--- a/tv/cec/1.0/types.hal
+++ b/tv/cec/1.0/types.hal
@@ -193,7 +193,7 @@
      */
     SYSTEM_CEC_CONTROL = 3,
 
-    /** Option 4 not used */
+    /* Option 4 not used */
 };
 
 struct CecMessage {
diff --git a/usb/1.1/IUsb.hal b/usb/1.1/IUsb.hal
index 9cedea0..606928b 100644
--- a/usb/1.1/IUsb.hal
+++ b/usb/1.1/IUsb.hal
@@ -18,11 +18,9 @@
 
 import android.hardware.usb@1.0;
 
-interface IUsb extends android.hardware.usb@1.0::IUsb {
-    /**
-     * The setCallback function in V1_0 is used to register the V1_1
-     * IUsbCallback object as well. The implementation can use the
-     * castFrom method to cast the IUsbCallback object.
-     */
-};
-
+/*
+ * The setCallback function in V1_0 is used to register the V1_1
+ * IUsbCallback object as well. The implementation can use the
+ * castFrom method to cast the IUsbCallback object.
+ */
+interface IUsb extends android.hardware.usb@1.0::IUsb {};
diff --git a/wifi/1.0/IWifiP2pIface.hal b/wifi/1.0/IWifiP2pIface.hal
index 243748f..b908591 100644
--- a/wifi/1.0/IWifiP2pIface.hal
+++ b/wifi/1.0/IWifiP2pIface.hal
@@ -21,6 +21,4 @@
 /**
  * Interface used to represent a single NAN iface.
  */
-interface IWifiP2pIface extends IWifiIface {
-  /** TODO(rpius): Add methods to the interface. */
-};
+interface IWifiP2pIface extends IWifiIface {};