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Bram Moolenaarae5bce12005-08-15 21:41:48 +00001" Vim syntax file
Bram Moolenaar446cb832008-06-24 21:56:24 +00002" Language: Verilog-AMS
3" Maintainer: S. Myles Prather <smprather@gmail.com>
4"
5" Version 1.1 S. Myles Prather <smprather@gmail.com>
6" Moved some keywords to the type category.
7" Added the metrix suffixes to the number matcher.
8" Version 1.2 Prasanna Tamhankar <pratam@gmail.com>
9" Minor reserved keyword updates.
10" Last Update: Thursday September 15 15:36:03 CST 2005
Bram Moolenaarae5bce12005-08-15 21:41:48 +000011
12" For version 5.x: Clear all syntax items
13" For version 6.x: Quit when a syntax file was already loaded
14if version < 600
15 syntax clear
16elseif exists("b:current_syntax")
17 finish
18endif
19
20" Set the local value of the 'iskeyword' option
21if version >= 600
22 setlocal iskeyword=@,48-57,_,192-255
23else
24 set iskeyword=@,48-57,_,192-255
25endif
26
27" Annex B.1 'All keywords'
28syn keyword verilogamsStatement above abs absdelay acos acosh ac_stim
29syn keyword verilogamsStatement always analog analysis and asin
Bram Moolenaar446cb832008-06-24 21:56:24 +000030syn keyword verilogamsStatement asinh assign atan atan2 atanh
31syn keyword verilogamsStatement buf bufif0 bufif1 ceil cmos connectmodule
Bram Moolenaarae5bce12005-08-15 21:41:48 +000032syn keyword verilogamsStatement connectrules cos cosh cross ddt ddx deassign
33syn keyword verilogamsStatement defparam disable discipline
34syn keyword verilogamsStatement driver_update edge enddiscipline
Bram Moolenaar446cb832008-06-24 21:56:24 +000035syn keyword verilogamsStatement endconnectrules endmodule endfunction endgenerate
Bram Moolenaarae5bce12005-08-15 21:41:48 +000036syn keyword verilogamsStatement endnature endparamset endprimitive endspecify
37syn keyword verilogamsStatement endtable endtask event exp final_step
38syn keyword verilogamsStatement flicker_noise floor flow force fork
Bram Moolenaar446cb832008-06-24 21:56:24 +000039syn keyword verilogamsStatement function generate highz0
40syn keyword verilogamsStatement highz1 hypot idt idtmod if ifnone inf initial
Bram Moolenaarae5bce12005-08-15 21:41:48 +000041syn keyword verilogamsStatement initial_step inout input join
42syn keyword verilogamsStatement laplace_nd laplace_np laplace_zd laplace_zp
43syn keyword verilogamsStatement large last_crossing limexp ln localparam log
44syn keyword verilogamsStatement macromodule max medium min module nand nature
45syn keyword verilogamsStatement negedge net_resolution nmos noise_table nor not
46syn keyword verilogamsStatement notif0 notif1 or output paramset pmos
47syn keyword verilogamsType parameter real integer electrical input output
48syn keyword verilogamsType inout reg tri tri0 tri1 triand trior trireg
Bram Moolenaar446cb832008-06-24 21:56:24 +000049syn keyword verilogamsType string from exclude aliasparam ground genvar
50syn keyword verilogamsType branch time realtime
Bram Moolenaarae5bce12005-08-15 21:41:48 +000051syn keyword verilogamsStatement posedge potential pow primitive pull0 pull1
52syn keyword verilogamsStatement pullup pulldown rcmos release
53syn keyword verilogamsStatement rnmos rpmos rtran rtranif0 rtranif1
54syn keyword verilogamsStatement scalared sin sinh slew small specify specparam
55syn keyword verilogamsStatement sqrt strong0 strong1 supply0 supply1
Bram Moolenaar446cb832008-06-24 21:56:24 +000056syn keyword verilogamsStatement table tan tanh task timer tran tranif0
Bram Moolenaarae5bce12005-08-15 21:41:48 +000057syn keyword verilogamsStatement tranif1 transition
58syn keyword verilogamsStatement vectored wait wand weak0 weak1
59syn keyword verilogamsStatement white_noise wire wor wreal xnor xor zi_nd
Bram Moolenaar446cb832008-06-24 21:56:24 +000060syn keyword verilogamsStatement zi_np zi_zd zi_zp
Bram Moolenaarae5bce12005-08-15 21:41:48 +000061syn keyword verilogamsRepeat forever repeat while for
62syn keyword verilogamsLabel begin end
63syn keyword verilogamsConditional if else case casex casez default endcase
64syn match verilogamsConstant ":inf"lc=1
65syn match verilogamsConstant "-inf"lc=1
66" Annex B.2 Discipline/nature
67syn keyword verilogamsStatement abstol access continuous ddt_nature discrete
68syn keyword verilogamsStatement domain idt_nature units
69" Annex B.3 Connect Rules
70syn keyword verilogamsStatement connect merged resolveto split
71
72syn match verilogamsOperator "[&|~><!)(*#%@+/=?:;}{,.\^\-\[\]]"
73syn match verilogamsOperator "<+"
74syn match verilogamsStatement "[vV]("me=e-1
75syn match verilogamsStatement "[iI]("me=e-1
76
77syn keyword verilogamsTodo contained TODO
78syn region verilogamsComment start="/\*" end="\*/" contains=verilogamsTodo
79syn match verilogamsComment "//.*" contains=verilogamsTodo
80
81syn match verilogamsGlobal "`celldefine"
82syn match verilogamsGlobal "`default_nettype"
83syn match verilogamsGlobal "`define"
84syn match verilogamsGlobal "`else"
85syn match verilogamsGlobal "`elsif"
86syn match verilogamsGlobal "`endcelldefine"
87syn match verilogamsGlobal "`endif"
88syn match verilogamsGlobal "`ifdef"
89syn match verilogamsGlobal "`ifndef"
90syn match verilogamsGlobal "`include"
91syn match verilogamsGlobal "`line"
92syn match verilogamsGlobal "`nounconnected_drive"
93syn match verilogamsGlobal "`resetall"
94syn match verilogamsGlobal "`timescale"
95syn match verilogamsGlobal "`unconnected_drive"
96syn match verilogamsGlobal "`undef"
97syn match verilogamsSystask "$[a-zA-Z0-9_]\+\>"
98
99syn match verilogamsConstant "\<[A-Z][A-Z0-9_]\+\>"
100
101syn match verilogamsNumber "\(\<\d\+\|\)'[bB]\s*[0-1_xXzZ?]\+\>"
102syn match verilogamsNumber "\(\<\d\+\|\)'[oO]\s*[0-7_xXzZ?]\+\>"
103syn match verilogamsNumber "\(\<\d\+\|\)'[dD]\s*[0-9_xXzZ?]\+\>"
104syn match verilogamsNumber "\(\<\d\+\|\)'[hH]\s*[0-9a-fA-F_xXzZ?]\+\>"
Bram Moolenaar446cb832008-06-24 21:56:24 +0000105syn match verilogamsNumber "\<[+-]\=[0-9_]\+\(\.[0-9_]*\|\)\(e[0-9_]*\|\)[TGMKkmunpfa]\=\>"
Bram Moolenaarae5bce12005-08-15 21:41:48 +0000106
107syn region verilogamsString start=+"+ skip=+\\"+ end=+"+ contains=verilogamsEscape
108syn match verilogamsEscape +\\[nt"\\]+ contained
109syn match verilogamsEscape "\\\o\o\=\o\=" contained
110
111"Modify the following as needed. The trade-off is performance versus
112"functionality.
113syn sync lines=50
114
115" Define the default highlighting.
116" For version 5.7 and earlier: only when not done already
117" For version 5.8 and later: only when an item doesn't have highlighting yet
118if version >= 508 || !exists("did_verilogams_syn_inits")
119 if version < 508
120 let did_verilogams_syn_inits = 1
121 command -nargs=+ HiLink hi link <args>
122 else
123 command -nargs=+ HiLink hi def link <args>
124 endif
125
126 " The default highlighting.
127 HiLink verilogamsCharacter Character
128 HiLink verilogamsConditional Conditional
129 HiLink verilogamsRepeat Repeat
130 HiLink verilogamsString String
131 HiLink verilogamsTodo Todo
132 HiLink verilogamsComment Comment
133 HiLink verilogamsConstant Constant
134 HiLink verilogamsLabel Label
135 HiLink verilogamsNumber Number
136 HiLink verilogamsOperator Special
137 HiLink verilogamsStatement Statement
138 HiLink verilogamsGlobal Define
139 HiLink verilogamsDirective SpecialComment
140 HiLink verilogamsEscape Special
141 HiLink verilogamsType Type
142 HiLink verilogamsSystask Function
143
144 delcommand HiLink
145endif
146
147let b:current_syntax = "verilogams"
148
149" vim: ts=8