runtime(filetype): commit 99181205c5f8284a3 breaks V lang detection
so make the regex more strict and have it check for a parenthesis.
See:
https://github.com/vlang/v/blob/master/examples/submodule/mymodules/submodule/sub_functions.v
related: #16513
Signed-off-by: Christian Brabandt <cb@256bit.org>
diff --git a/runtime/autoload/dist/ft.vim b/runtime/autoload/dist/ft.vim
index 819f51f..a740305 100644
--- a/runtime/autoload/dist/ft.vim
+++ b/runtime/autoload/dist/ft.vim
@@ -1429,8 +1429,8 @@
# Verilog: line ends with ';' followed by an optional variable number of
# spaces and an optional start of a comment.
# Example: " b <= a + 1; // Add 1".
- # Alternatively: a module is defined: " module MyModule"
- if line =~ ';\s*\(/[/*].*\)\?$' || line =~ '\C^\s*module\>'
+ # Alternatively: a module is defined: " module MyModule ( input )"
+ if line =~ ';\s*\(/[/*].*\)\?$' || line =~ '\C^\s*module\s\+\w\+\s*('
setf verilog
return
endif