blob: b6df190210ce9849bf2c0eb8537a5983d778eca3 [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#define LOG_TAG "hwcomposer-drm"
18
19#include <fcntl.h>
20#include <errno.h>
21#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050022#include <sys/resource.h>
23#include <pthread.h>
Sean Paul9b1bb842015-01-23 01:11:58 -050024#include <queue>
Sean Paule0c4c3d2015-01-20 16:56:04 -050025
26#include <cutils/log.h>
27
28#include <xf86drm.h>
29#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050030
31#include <hardware/hardware.h>
32#include <hardware/hwcomposer.h>
33
Sean Paul9aa5ad32015-01-22 15:47:54 -050034#include <sync/sync.h>
Sean Paulf1dc1912015-01-24 01:34:31 -050035#include <sw_sync.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050036
Sean Paulcd36a9e2015-01-22 18:01:18 -050037#include "drm_hwcomposer.h"
Sean Paule0c4c3d2015-01-20 16:56:04 -050038
39#define ARRAY_SIZE(arr) (int)(sizeof(arr) / sizeof((arr)[0]))
40
41#define HWCOMPOSER_DRM_DEVICE "/dev/dri/card0"
42#define MAX_NUM_DISPLAYS 3
43#define UM_PER_INCH 25400
44
45static const uint32_t panel_types[] = {
46 DRM_MODE_CONNECTOR_LVDS,
47 DRM_MODE_CONNECTOR_eDP,
48 DRM_MODE_CONNECTOR_DSI,
49};
50
Sean Paul9aa5ad32015-01-22 15:47:54 -050051struct hwc_worker {
52 pthread_t thread;
53 pthread_mutex_t lock;
54 pthread_cond_t cond;
55 bool exit;
56};
57
Sean Paule0c4c3d2015-01-20 16:56:04 -050058struct hwc_drm_display {
Sean Paul9aa5ad32015-01-22 15:47:54 -050059 struct hwc_context_t *ctx;
60 int display;
61
Sean Paule0c4c3d2015-01-20 16:56:04 -050062 uint32_t connector_id;
63
64 drmModeModeInfoPtr configs;
65 uint32_t num_configs;
66
Sean Paulfa406a12015-02-04 10:05:44 -080067 drmModeModeInfo active_mode;
Sean Paule0c4c3d2015-01-20 16:56:04 -050068 uint32_t active_crtc;
Sean Pauleb9e75c2015-01-25 23:31:30 -050069 int active_pipe;
Sean Paulefb20cb2015-02-04 09:29:15 -080070 bool initial_modeset_required;
Sean Paul9aa5ad32015-01-22 15:47:54 -050071
72 struct hwc_worker set_worker;
73
Sean Paul9b1bb842015-01-23 01:11:58 -050074 std::queue<struct hwc_drm_bo> buf_queue;
Sean Paul9aa5ad32015-01-22 15:47:54 -050075 struct hwc_drm_bo front;
Sean Paulf1dc1912015-01-24 01:34:31 -050076
77 int timeline_fd;
78 unsigned timeline_next;
Sean Pauleb9e75c2015-01-25 23:31:30 -050079
80 struct hwc_worker vsync_worker;
81 bool enable_vsync_events;
Sean Paule0c4c3d2015-01-20 16:56:04 -050082};
83
84struct hwc_context_t {
85 hwc_composer_device_1_t device;
86
87 int fd;
Sean Paule0c4c3d2015-01-20 16:56:04 -050088
89 hwc_procs_t const *procs;
Sean Paulcd36a9e2015-01-22 18:01:18 -050090 struct hwc_import_context *import_ctx;
Sean Paule0c4c3d2015-01-20 16:56:04 -050091
92 struct hwc_drm_display displays[MAX_NUM_DISPLAYS];
93 int num_displays;
94};
95
96static int hwc_get_drm_display(struct hwc_context_t *ctx, int display,
97 struct hwc_drm_display **hd)
98{
99 if (display >= MAX_NUM_DISPLAYS) {
100 ALOGE("Requested display is out-of-bounds %d %d", display,
101 MAX_NUM_DISPLAYS);
102 return -EINVAL;
103 }
104 *hd = &ctx->displays[display];
105 return 0;
106}
107
108static int hwc_prepare_layer(hwc_layer_1_t *layer)
109{
110 /* TODO: We can't handle background right now, defer to sufaceFlinger */
111 if (layer->compositionType == HWC_BACKGROUND) {
112 layer->compositionType = HWC_FRAMEBUFFER;
113 ALOGV("Can't handle background layers yet");
114
115 /* TODO: Support sideband compositions */
116 } else if (layer->compositionType == HWC_SIDEBAND) {
117 layer->compositionType = HWC_FRAMEBUFFER;
118 ALOGV("Can't handle sideband content yet");
119 }
120
121 layer->hints = 0;
122
123 /* TODO: Handle cursor by setting compositionType=HWC_CURSOR_OVERLAY */
124 if (layer->flags & HWC_IS_CURSOR_LAYER) {
125 ALOGV("Can't handle async cursors yet");
126 }
127
128 /* TODO: Handle transformations */
129 if (layer->transform) {
130 ALOGV("Can't handle transformations yet");
131 }
132
133 /* TODO: Handle blending & plane alpha*/
134 if (layer->blending == HWC_BLENDING_PREMULT ||
135 layer->blending == HWC_BLENDING_COVERAGE) {
136 ALOGV("Can't handle blending yet");
137 }
138
139 /* TODO: Handle cropping & scaling */
140
141 return 0;
142}
143
144static int hwc_prepare(hwc_composer_device_1_t */* dev */, size_t num_displays,
145 hwc_display_contents_1_t** display_contents)
146{
147 int ret = 0, i, j;
148
149 /* TODO: Check flags for HWC_GEOMETRY_CHANGED */
150
151 for (i = 0; i < (int)num_displays && i < MAX_NUM_DISPLAYS; i++) {
152 for (j = 0; j < (int)display_contents[i]->numHwLayers; j++) {
153 ret = hwc_prepare_layer(
154 &display_contents[i]->hwLayers[j]);
155 if (ret) {
156 ALOGE("Failed to prepare layer %d:%d", j, i);
157 return ret;
158 }
159 }
160 }
161
162 return ret;
163}
164
Sean Paulcd36a9e2015-01-22 18:01:18 -0500165/*
166 * TODO: This hack allows us to use the importer's fd to drm to add and remove
167 * framebuffers. The reason it exists is because gralloc doesn't export its
168 * bo's, so we have to use its file descriptor to drm for some operations. Once
169 * gralloc behaves, we can remove this.
170 */
171static int hwc_get_fd_for_bo(struct hwc_context_t *ctx, struct hwc_drm_bo *bo)
172{
173 if (bo->importer_fd >= 0)
174 return bo->importer_fd;
175
176 return ctx->fd;
177}
178
Sean Paule0c4c3d2015-01-20 16:56:04 -0500179static bool hwc_mode_is_equal(drmModeModeInfoPtr a, drmModeModeInfoPtr b)
180{
181 return a->clock == b->clock &&
182 a->hdisplay == b->hdisplay &&
183 a->hsync_start == b->hsync_start &&
184 a->hsync_end == b->hsync_end &&
185 a->htotal == b->htotal &&
186 a->hskew == b->hskew &&
187 a->vdisplay == b->vdisplay &&
188 a->vsync_start == b->vsync_start &&
189 a->vsync_end == b->vsync_end &&
190 a->vtotal == b->vtotal &&
191 a->vscan == b->vscan &&
192 a->vrefresh == b->vrefresh &&
193 a->flags == b->flags &&
194 a->type == b->type &&
195 !strcmp(a->name, b->name);
196}
197
Sean Paul9aa5ad32015-01-22 15:47:54 -0500198static int hwc_modeset_required(struct hwc_drm_display *hd,
199 bool *modeset_required)
200{
201 drmModeCrtcPtr crtc;
202 drmModeModeInfoPtr m;
203
Sean Paulefb20cb2015-02-04 09:29:15 -0800204 if (hd->initial_modeset_required) {
205 *modeset_required = true;
206 hd->initial_modeset_required = false;
207 return 0;
208 }
209
Sean Paul9aa5ad32015-01-22 15:47:54 -0500210 crtc = drmModeGetCrtc(hd->ctx->fd, hd->active_crtc);
211 if (!crtc) {
212 ALOGE("Failed to get crtc for display %d", hd->display);
213 return -ENODEV;
214 }
215
Sean Paulfa406a12015-02-04 10:05:44 -0800216 m = &hd->active_mode;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500217
218 /* Do a modeset if we haven't done one, or the mode has changed */
219 if (!crtc->mode_valid || !hwc_mode_is_equal(m, &crtc->mode))
220 *modeset_required = true;
221 else
222 *modeset_required = false;
223
224 drmModeFreeCrtc(crtc);
225
226 return 0;
227}
228
229static void hwc_flip_handler(int /* fd */, unsigned int /* sequence */,
230 unsigned int /* tv_sec */, unsigned int /* tv_usec */,
231 void */* user_data */)
232{
233}
234
Sean Paul9b1bb842015-01-23 01:11:58 -0500235static int hwc_flip(struct hwc_drm_display *hd, struct hwc_drm_bo *buf)
Sean Paul9aa5ad32015-01-22 15:47:54 -0500236{
237 fd_set fds;
238 drmEventContext event_context;
239 int ret;
240 bool modeset_required;
241
242 ret = hwc_modeset_required(hd, &modeset_required);
243 if (ret) {
244 ALOGE("Failed to determine if modeset is required %d", ret);
245 return ret;
246 }
247 if (modeset_required) {
Sean Paul9b1bb842015-01-23 01:11:58 -0500248 ret = drmModeSetCrtc(hd->ctx->fd, hd->active_crtc, buf->fb_id,
249 0, 0, &hd->connector_id, 1,
Sean Paulfa406a12015-02-04 10:05:44 -0800250 &hd->active_mode);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500251 if (ret) {
252 ALOGE("Modeset failed for crtc %d",
253 hd->active_crtc);
254 return ret;
255 }
256 return 0;
257 }
258
259 FD_ZERO(&fds);
260 FD_SET(hd->ctx->fd, &fds);
261
262 event_context.version = DRM_EVENT_CONTEXT_VERSION;
263 event_context.page_flip_handler = hwc_flip_handler;
264
Sean Paul9b1bb842015-01-23 01:11:58 -0500265 ret = drmModePageFlip(hd->ctx->fd, hd->active_crtc, buf->fb_id,
Sean Paul9aa5ad32015-01-22 15:47:54 -0500266 DRM_MODE_PAGE_FLIP_EVENT, hd);
267 if (ret) {
268 ALOGE("Failed to flip buffer for crtc %d",
269 hd->active_crtc);
270 return ret;
271 }
272
273 do {
274 ret = select(hd->ctx->fd + 1, &fds, NULL, NULL, NULL);
275 } while (ret == -1 && errno == EINTR);
276
277 if (ret != 1) {
278 ALOGE("Failed waiting for flip to complete\n");
279 return -EINVAL;
280 }
281 drmHandleEvent(hd->ctx->fd, &event_context);
282
283 return 0;
284}
285
Sean Paul3bc48e82015-01-23 01:41:13 -0500286static int hwc_wait_and_set(struct hwc_drm_display *hd,
287 struct hwc_drm_bo *buf)
Sean Paul9aa5ad32015-01-22 15:47:54 -0500288{
289 int ret;
290
Sean Paul3bc48e82015-01-23 01:41:13 -0500291 ret = drmModeAddFB2(hwc_get_fd_for_bo(hd->ctx, buf), buf->width,
292 buf->height, buf->format, buf->gem_handles, buf->pitches,
293 buf->offsets, &buf->fb_id, 0);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500294 if (ret) {
295 ALOGE("could not create drm fb %d", ret);
296 return ret;
297 }
298
Sean Paul3bc48e82015-01-23 01:41:13 -0500299 if (buf->acquire_fence_fd >= 0) {
300 ret = sync_wait(buf->acquire_fence_fd, -1);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500301 if (ret) {
302 ALOGE("Failed to wait for acquire %d", ret);
303 return ret;
304 }
305 }
306
Sean Paul3bc48e82015-01-23 01:41:13 -0500307 ret = hwc_flip(hd, buf);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500308 if (ret) {
309 ALOGE("Failed to perform flip\n");
310 return ret;
311 }
312
313 if (hd->front.fb_id) {
Sean Paulcd36a9e2015-01-22 18:01:18 -0500314 ret = drmModeRmFB(hwc_get_fd_for_bo(hd->ctx, &hd->front),
315 hd->front.fb_id);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500316 if (ret) {
317 ALOGE("Failed to rm fb from front %d", ret);
318 return ret;
319 }
320 }
Sean Paul3bc48e82015-01-23 01:41:13 -0500321 hd->front = *buf;
322
Sean Paul9aa5ad32015-01-22 15:47:54 -0500323 return ret;
324}
325
326static void *hwc_set_worker(void *arg)
327{
328 struct hwc_drm_display *hd = (struct hwc_drm_display *)arg;
329 int ret;
330
331 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
332
Sean Paul9aa5ad32015-01-22 15:47:54 -0500333 do {
Sean Paul3bc48e82015-01-23 01:41:13 -0500334 struct hwc_drm_bo buf;
335
336 ret = pthread_mutex_lock(&hd->set_worker.lock);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500337 if (ret) {
Sean Paul3bc48e82015-01-23 01:41:13 -0500338 ALOGE("Failed to lock set lock %d", ret);
339 return NULL;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500340 }
341
Sean Paul3bc48e82015-01-23 01:41:13 -0500342 if (hd->set_worker.exit)
343 goto out;
344
345 if (hd->buf_queue.empty()) {
346 ret = pthread_cond_wait(&hd->set_worker.cond,
347 &hd->set_worker.lock);
348 if (ret) {
349 ALOGE("Failed to wait on condition %d", ret);
350 goto out;
351 }
352 }
353
354 buf = hd->buf_queue.front();
355 hd->buf_queue.pop();
356
357 ret = pthread_mutex_unlock(&hd->set_worker.lock);
358 if (ret) {
359 ALOGE("Failed to unlock set lock %d", ret);
360 return NULL;
361 }
362
363 ret = hwc_wait_and_set(hd, &buf);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500364 if (ret)
365 ALOGE("Failed to wait and set %d", ret);
Sean Paulf1dc1912015-01-24 01:34:31 -0500366
367 ret = sw_sync_timeline_inc(hd->timeline_fd, 1);
368 if (ret)
369 ALOGE("Failed to increment sync timeline %d", ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500370 } while (true);
371
Sean Paul3bc48e82015-01-23 01:41:13 -0500372out:
Sean Paul9aa5ad32015-01-22 15:47:54 -0500373 ret = pthread_mutex_unlock(&hd->set_worker.lock);
Sean Paul3bc48e82015-01-23 01:41:13 -0500374 if (ret)
375 ALOGE("Failed to unlock set lock while exiting %d", ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500376
377 return NULL;
378}
379
Sean Paule0c4c3d2015-01-20 16:56:04 -0500380static int hwc_set_display(hwc_context_t *ctx, int display,
381 hwc_display_contents_1_t* display_contents)
382{
383 struct hwc_drm_display *hd = NULL;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500384 hwc_layer_1_t *layer = NULL;
Sean Paul9b1bb842015-01-23 01:11:58 -0500385 struct hwc_drm_bo buf;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500386 int ret, i;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500387 uint32_t fb_id;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500388
Sean Paul9b1bb842015-01-23 01:11:58 -0500389 memset(&buf, 0, sizeof(buf));
390
Sean Paule0c4c3d2015-01-20 16:56:04 -0500391 ret = hwc_get_drm_display(ctx, display, &hd);
392 if (ret)
393 return ret;
394
395 if (!hd->active_crtc) {
396 ALOGE("There is no active crtc for display %d", display);
397 return -ENOENT;
398 }
399
400 /*
401 * TODO: We can only support one hw layer atm, so choose either the
402 * first one or the framebuffer target.
403 */
404 if (!display_contents->numHwLayers) {
405 return 0;
406 } else if (display_contents->numHwLayers == 1) {
407 layer = &display_contents->hwLayers[0];
408 } else {
409 for (i = 0; i < (int)display_contents->numHwLayers; i++) {
410 layer = &display_contents->hwLayers[i];
411 if (layer->compositionType == HWC_FRAMEBUFFER_TARGET)
412 break;
413 }
414 if (i == (int)display_contents->numHwLayers) {
415 ALOGE("Could not find a suitable layer for display %d",
416 display);
417 }
418 }
419
Sean Paul3bc48e82015-01-23 01:41:13 -0500420 ret = hwc_create_bo_from_import(ctx->fd, ctx->import_ctx, layer->handle,
421 &buf);
422 if (ret) {
423 ALOGE("Failed to import handle to drm bo %d", ret);
424 return ret;
425 }
426 buf.acquire_fence_fd = layer->acquireFenceFd;
Sean Paul3bc48e82015-01-23 01:41:13 -0500427
Sean Paul9aa5ad32015-01-22 15:47:54 -0500428 ret = pthread_mutex_lock(&hd->set_worker.lock);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500429 if (ret) {
Sean Paul9aa5ad32015-01-22 15:47:54 -0500430 ALOGE("Failed to lock set lock in set() %d", ret);
431 return ret;
432 }
Sean Paulf1dc1912015-01-24 01:34:31 -0500433
434 /*
435 * TODO: Retire and release can use the same sync point here b/c hwc is
436 * restricted to one layer. Once that is no longer true, this will need
437 * to change
438 */
439 hd->timeline_next++;
440 display_contents->retireFenceFd = sw_sync_fence_create(hd->timeline_fd,
441 "drm_hwc_retire", hd->timeline_next);
442 layer->releaseFenceFd = sw_sync_fence_create(hd->timeline_fd,
443 "drm_hwc_release", hd->timeline_next);
Sean Paul9b1bb842015-01-23 01:11:58 -0500444 hd->buf_queue.push(buf);
445
Sean Paul9aa5ad32015-01-22 15:47:54 -0500446 ret = pthread_cond_signal(&hd->set_worker.cond);
447 if (ret) {
448 ALOGE("Failed to signal set worker %d", ret);
449 goto out;
450 }
451
452 ret = pthread_mutex_unlock(&hd->set_worker.lock);
453 if (ret) {
454 ALOGE("Failed to unlock set lock in set() %d", ret);
455 return ret;
456 }
457
458 return ret;
459
Sean Paule0c4c3d2015-01-20 16:56:04 -0500460out:
Sean Paul9aa5ad32015-01-22 15:47:54 -0500461 if (pthread_mutex_unlock(&hd->set_worker.lock))
462 ALOGE("Failed to unlock set lock in set error handler");
463
Sean Paule0c4c3d2015-01-20 16:56:04 -0500464 return ret;
465}
466
467static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
468 hwc_display_contents_1_t** display_contents)
469{
470 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
471 int ret = 0, i;
472
Sean Paule0c4c3d2015-01-20 16:56:04 -0500473 for (i = 0; i < (int)num_displays && i < MAX_NUM_DISPLAYS; i++) {
Sean Paule0c4c3d2015-01-20 16:56:04 -0500474 ret = hwc_set_display(ctx, i, display_contents[i]);
475 }
476
477 return ret;
478}
479
Sean Pauleb9e75c2015-01-25 23:31:30 -0500480static int hwc_wait_for_vsync(struct hwc_drm_display *hd)
Sean Paule0c4c3d2015-01-20 16:56:04 -0500481{
Sean Pauleb9e75c2015-01-25 23:31:30 -0500482 drmVBlank vblank;
483 int ret;
484 uint32_t high_crtc;
485 int64_t timestamp;
486
487 if (hd->active_pipe == -1)
488 return -EINVAL;
489
490 memset(&vblank, 0, sizeof(vblank));
491
492 high_crtc = (hd->active_pipe << DRM_VBLANK_HIGH_CRTC_SHIFT);
493 vblank.request.type = (drmVBlankSeqType)(DRM_VBLANK_RELATIVE |
494 (high_crtc & DRM_VBLANK_HIGH_CRTC_MASK));
495 vblank.request.sequence = 1;
496
497 ret = drmWaitVBlank(hd->ctx->fd, &vblank);
498 if (ret) {
499 ALOGE("Failed to wait for vblank %d", ret);
500 return ret;
501 }
502
503 if (hd->ctx->procs->vsync) {
504 timestamp = vblank.reply.tval_sec * 1000 * 1000 * 1000 +
505 vblank.reply.tval_usec * 1000;
506 hd->ctx->procs->vsync(hd->ctx->procs, hd->display, timestamp);
507 }
508
509 return 0;
510}
511
512static void *hwc_vsync_worker(void *arg)
513{
514 struct hwc_drm_display *hd = (struct hwc_drm_display *)arg;
515 struct hwc_worker *w = &hd->vsync_worker;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500516 int ret;
517
Sean Pauleb9e75c2015-01-25 23:31:30 -0500518 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
519
520 do {
521 ret = pthread_mutex_lock(&w->lock);
522 if (ret) {
523 ALOGE("Failed to lock vsync lock %d", ret);
524 return NULL;
525 }
526
527 if (hd->active_pipe == -1) {
528 ALOGE("Pipe is no longer active, disable events");
529 hd->enable_vsync_events = false;
530 }
531
532 if (!hd->enable_vsync_events) {
533 ret = pthread_cond_wait(&w->cond, &w->lock);
534 if (ret) {
535 ALOGE("Failed to wait on vsync cond %d", ret);
536 break;
537 }
538 }
539
540 if (w->exit)
541 break;
542
543 ret = pthread_mutex_unlock(&w->lock);
544 if (ret) {
545 ALOGE("Failed to unlock vsync lock %d", ret);
546 return NULL;
547 }
548
549 if (!hd->enable_vsync_events)
550 continue;
551
552 ret = hwc_wait_for_vsync(hd);
553 if (ret)
554 ALOGE("Failed to wait for vsync %d", ret);
555
556 } while (true);
557
558out:
559 ret = pthread_mutex_unlock(&hd->set_worker.lock);
560 if (ret)
561 ALOGE("Failed to unlock set lock while exiting %d", ret);
562
563 return NULL;
564}
565
566static int hwc_event_control(struct hwc_composer_device_1* dev, int display,
567 int event, int enabled)
568{
569 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
570 struct hwc_drm_display *hd = NULL;
571 int ret;
572
573 ret = hwc_get_drm_display(ctx, display, &hd);
574 if (ret)
575 return ret;
576
577 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
578 return -EINVAL;
579
580 if (hd->active_pipe == -1) {
581 ALOGD("Can't service events for display %d, no pipe", display);
582 return -EINVAL;
583 }
584
585 ret = pthread_mutex_lock(&hd->vsync_worker.lock);
586 if (ret) {
587 ALOGE("Failed to lock vsync lock %d", ret);
588 return ret;
589 }
590
591 hd->enable_vsync_events = !!enabled;
592
593 ret = pthread_cond_signal(&hd->vsync_worker.cond);
594 if (ret) {
595 ALOGE("Failed to signal vsync thread %d", ret);
596 goto out;
597 }
598
599 ret = pthread_mutex_unlock(&hd->vsync_worker.lock);
600 if (ret) {
601 ALOGE("Failed to unlock vsync lock %d", ret);
602 return ret;
603 }
604
Sean Paule0c4c3d2015-01-20 16:56:04 -0500605 return 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500606
607out:
608 if (pthread_mutex_unlock(&hd->vsync_worker.lock))
609 ALOGE("Failed to unlock vsync worker in error path");
610
611 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500612}
613
614static int hwc_set_power_mode(struct hwc_composer_device_1* dev, int display,
615 int mode)
616{
617 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
618 struct hwc_drm_display *hd = NULL;
619 drmModeConnectorPtr c;
620 int ret, i;
621 uint32_t dpms_prop = 0;
622 uint64_t dpms_value = 0;
623
624 ret = hwc_get_drm_display(ctx, display, &hd);
625 if (ret)
626 return ret;
627
628 c = drmModeGetConnector(ctx->fd, hd->connector_id);
629 if (!c) {
630 ALOGE("Failed to get connector %d", display);
631 return -ENODEV;
632 }
633
634 for (i = 0; !dpms_prop && i < c->count_props; i++) {
635 drmModePropertyPtr p;
636
637 p = drmModeGetProperty(ctx->fd, c->props[i]);
638 if (!p)
639 continue;
640
641 if (!strcmp(p->name, "DPMS"))
642 dpms_prop = c->props[i];
643
644 drmModeFreeProperty(p);
645 }
646 if (!dpms_prop) {
647 ALOGE("Failed to get DPMS property from display %d", display);
648 ret = -ENOENT;
649 goto out;
650 }
651
652 switch(mode) {
653 case HWC_POWER_MODE_OFF:
654 dpms_value = DRM_MODE_DPMS_OFF;
655 break;
656
657 /* We can't support dozing right now, so go full on */
658 case HWC_POWER_MODE_DOZE:
659 case HWC_POWER_MODE_DOZE_SUSPEND:
660 case HWC_POWER_MODE_NORMAL:
661 dpms_value = DRM_MODE_DPMS_ON;
662 break;
663 };
664
665 ret = drmModeConnectorSetProperty(ctx->fd, c->connector_id,
666 dpms_prop, dpms_value);
667 if (ret) {
668 ALOGE("Failed to set DPMS property for display %d", display);
669 goto out;
670 }
671
672out:
673 drmModeFreeConnector(c);
674 return ret;
675}
676
677static int hwc_query(struct hwc_composer_device_1 */* dev */, int what,
678 int *value)
679{
680 switch(what) {
681 case HWC_BACKGROUND_LAYER_SUPPORTED:
682 *value = 0; /* TODO: We should do this */
683 break;
684 case HWC_VSYNC_PERIOD:
685 ALOGW("Query for deprecated vsync value, returning 60Hz");
686 *value = 1000 * 1000 * 1000 / 60;
687 break;
688 case HWC_DISPLAY_TYPES_SUPPORTED:
689 *value = HWC_DISPLAY_PRIMARY | HWC_DISPLAY_EXTERNAL;
690 break;
691 }
692 return 0;
693}
694
695static void hwc_register_procs(struct hwc_composer_device_1* dev,
696 hwc_procs_t const* procs)
697{
698 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
699
700 ctx->procs = procs;
701}
702
703static int hwc_get_display_configs(struct hwc_composer_device_1* dev,
704 int display, uint32_t* configs, size_t* numConfigs)
705{
706 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
707 struct hwc_drm_display *hd = NULL;
708 drmModeConnectorPtr c;
709 int ret = 0, i;
710
711 if (!*numConfigs)
712 return 0;
713
714 ret = hwc_get_drm_display(ctx, display, &hd);
715 if (ret)
716 return ret;
717
718 c = drmModeGetConnector(ctx->fd, hd->connector_id);
719 if (!c) {
720 ALOGE("Failed to get connector %d", display);
721 return -ENODEV;
722 }
723
724 if (hd->configs)
725 free(hd->configs);
726
Sean Paule0c4c3d2015-01-20 16:56:04 -0500727 hd->configs = (drmModeModeInfoPtr)calloc(c->count_modes,
728 sizeof(*hd->configs));
729 if (!hd->configs) {
730 ALOGE("Failed to allocate config list for display %d", display);
731 ret = -ENOMEM;
732 hd->num_configs = 0;
733 goto out;
734 }
735
736 for (i = 0; i < c->count_modes; i++) {
737 drmModeModeInfoPtr m = &hd->configs[i];
738
739 memcpy(m, &c->modes[i], sizeof(*m));
740
741 if (i < (int)*numConfigs)
742 configs[i] = i;
743 }
744
745 hd->num_configs = c->count_modes;
746 *numConfigs = MIN(c->count_modes, *numConfigs);
747
748out:
749 drmModeFreeConnector(c);
750 return ret;
751}
752
753static int hwc_check_config_valid(struct hwc_context_t *ctx,
754 drmModeConnectorPtr connector, int display,
755 int config_idx)
756{
757 struct hwc_drm_display *hd = NULL;
758 drmModeModeInfoPtr m = NULL;
759 int ret = 0, i;
760
761 ret = hwc_get_drm_display(ctx, display, &hd);
762 if (ret)
763 return ret;
764
765 /* Make sure the requested config is still valid for the display */
766 for (i = 0; i < connector->count_modes; i++) {
767 if (hwc_mode_is_equal(&connector->modes[i],
768 &hd->configs[config_idx])) {
769 m = &hd->configs[config_idx];
770 break;
771 }
772 }
773 if (!m)
774 return -ENOENT;
775
776 return 0;
777}
778
779static int hwc_get_display_attributes(struct hwc_composer_device_1* dev,
780 int display, uint32_t config, const uint32_t* attributes,
781 int32_t* values)
782{
783 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
784 struct hwc_drm_display *hd = NULL;
785 drmModeConnectorPtr c;
786 drmModeModeInfoPtr m;
787 int ret, i;
788
789 ret = hwc_get_drm_display(ctx, display, &hd);
790 if (ret)
791 return ret;
792
793 if (config >= hd->num_configs) {
794 ALOGE("Requested config is out-of-bounds %d %d", config,
795 hd->num_configs);
796 return -EINVAL;
797 }
798
799 c = drmModeGetConnector(ctx->fd, hd->connector_id);
800 if (!c) {
801 ALOGE("Failed to get connector %d", display);
802 return -ENODEV;
803 }
804
805 ret = hwc_check_config_valid(ctx, c, display, (int)config);
806 if (ret) {
807 ALOGE("Provided config is no longer valid %u", config);
808 goto out;
809 }
810
811 m = &hd->configs[config];
812 for (i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
813 switch(attributes[i]) {
814 case HWC_DISPLAY_VSYNC_PERIOD:
815 values[i] = 1000 * 1000 * 1000 / m->vrefresh;
816 break;
817 case HWC_DISPLAY_WIDTH:
818 values[i] = m->hdisplay;
819 break;
820 case HWC_DISPLAY_HEIGHT:
821 values[i] = m->vdisplay;
822 break;
823 case HWC_DISPLAY_DPI_X:
824 /* Dots per 1000 inches */
825 values[i] = c->mmWidth ?
826 (m->hdisplay * UM_PER_INCH) / c->mmWidth : 0;
827 break;
828 case HWC_DISPLAY_DPI_Y:
829 /* Dots per 1000 inches */
830 values[i] = c->mmHeight ?
831 (m->vdisplay * UM_PER_INCH) / c->mmHeight : 0;
832 break;
833 }
834 }
835
836out:
837 drmModeFreeConnector(c);
838 return ret;
839}
840
841static int hwc_get_active_config(struct hwc_composer_device_1* dev, int display)
842{
843 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
844 struct hwc_drm_display *hd = NULL;
Sean Paulfa406a12015-02-04 10:05:44 -0800845 int ret, i, index = -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500846
847 ret = hwc_get_drm_display(ctx, display, &hd);
848 if (ret)
849 return ret;
850
Sean Paulfa406a12015-02-04 10:05:44 -0800851 /* Find the current mode in the config list */
852 for (i = 0; i < (int)hd->num_configs; i++) {
853 if (hwc_mode_is_equal(&hd->configs[i], &hd->active_mode)) {
854 index = i;
855 break;
856 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500857 }
858
Sean Paulfa406a12015-02-04 10:05:44 -0800859 return index;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500860}
861
862static bool hwc_crtc_is_bound(struct hwc_context_t *ctx, uint32_t crtc_id)
863{
864 int i;
865
866 for (i = 0; i < MAX_NUM_DISPLAYS; i++) {
867 if (ctx->displays[i].active_crtc == crtc_id)
868 return true;
869 }
870 return false;
871}
872
873static int hwc_try_encoder(struct hwc_context_t *ctx, drmModeResPtr r,
874 uint32_t encoder_id, uint32_t *crtc_id)
875{
876 drmModeEncoderPtr e;
877 int ret, i;
878
879 e = drmModeGetEncoder(ctx->fd, encoder_id);
880 if (!e) {
881 ALOGE("Failed to get encoder for connector %d", encoder_id);
882 return -ENODEV;
883 }
884
885 /* First try to use the currently-bound crtc */
886 if (e->crtc_id) {
887 if (!hwc_crtc_is_bound(ctx, e->crtc_id)) {
888 *crtc_id = e->crtc_id;
889 ret = 0;
890 goto out;
891 }
892 }
893
894 /* Try to find a possible crtc which will work */
895 for (i = 0; i < r->count_crtcs; i++) {
896 if (!(e->possible_crtcs & (1 << i)))
897 continue;
898
899 /* We've already tried this earlier */
900 if (e->crtc_id == r->crtcs[i])
901 continue;
902
903 if (!hwc_crtc_is_bound(ctx, r->crtcs[i])) {
904 *crtc_id = r->crtcs[i];
905 ret = 0;
906 goto out;
907 }
908 }
909
910 /* We can't use the encoder, but nothing went wrong, try another one */
911 ret = -EAGAIN;
912
913out:
914 drmModeFreeEncoder(e);
915 return ret;
916}
917
918static int hwc_set_active_config(struct hwc_composer_device_1* dev, int display,
919 int index)
920{
921 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
922 struct hwc_drm_display *hd = NULL;
923 drmModeResPtr r = NULL;
924 drmModeConnectorPtr c;
925 uint32_t crtc_id = 0;
926 int ret, i;
927 bool new_crtc, new_encoder;
928
929 ret = hwc_get_drm_display(ctx, display, &hd);
930 if (ret)
931 return ret;
932
933 c = drmModeGetConnector(ctx->fd, hd->connector_id);
934 if (!c) {
935 ALOGE("Failed to get connector %d", display);
936 return -ENODEV;
937 }
938
939 if (c->connection == DRM_MODE_DISCONNECTED) {
940 ALOGE("Tried to configure a disconnected display %d", display);
941 ret = -ENODEV;
942 goto out;
943 }
944
Sean Paulfa406a12015-02-04 10:05:44 -0800945 if (index >= c->count_modes) {
946 ALOGE("Index is out-of-bounds %d/%d", index, c->count_modes);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500947 ret = -ENOENT;
948 goto out;
949 }
950
951 r = drmModeGetResources(ctx->fd);
952 if (!r) {
953 ALOGE("Failed to get drm resources");
954 goto out;
955 }
956
957 /* We no longer have an active_crtc */
958 hd->active_crtc = 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500959 hd->active_pipe = -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500960
961 /* First, try to use the currently-connected encoder */
962 if (c->encoder_id) {
963 ret = hwc_try_encoder(ctx, r, c->encoder_id, &crtc_id);
964 if (ret && ret != -EAGAIN) {
965 ALOGE("Encoder try failed %d", ret);
966 goto out;
967 }
968 }
969
970 /* We couldn't find a crtc with the attached encoder, try the others */
971 if (!crtc_id) {
972 for (i = 0; i < c->count_encoders; i++) {
973 ret = hwc_try_encoder(ctx, r, c->encoders[i], &crtc_id);
974 if (!ret) {
975 break;
976 } else if (ret != -EAGAIN) {
977 ALOGE("Encoder try failed %d", ret);
978 goto out;
979 }
980 }
981 if (!crtc_id) {
982 ALOGE("Couldn't find valid crtc to modeset");
983 ret = -EINVAL;
984 goto out;
985 }
986 }
987
988 hd->active_crtc = crtc_id;
Sean Paulfa406a12015-02-04 10:05:44 -0800989
990 memcpy(&hd->active_mode, &hd->configs[index], sizeof(hd->active_mode));
Sean Paule0c4c3d2015-01-20 16:56:04 -0500991
Sean Pauleb9e75c2015-01-25 23:31:30 -0500992 /* Find the pipe corresponding to the crtc_id */
993 for (i = 0; i < r->count_crtcs; i++) {
994 /* We've already tried this earlier */
995 if (r->crtcs[i] == crtc_id) {
996 hd->active_pipe = i;
997 break;
998 }
999 }
1000 /* This should never happen... hehehe */
1001 if (hd->active_pipe == -1) {
1002 ALOGE("Active crtc was not found in resources!!");
1003 ret = -ENODEV;
1004 goto out;
1005 }
1006
Sean Paule0c4c3d2015-01-20 16:56:04 -05001007 /* TODO: Once we have atomic, set the crtc timing info here */
1008
1009out:
1010 if (r)
1011 drmModeFreeResources(r);
1012
1013 drmModeFreeConnector(c);
1014 return ret;
1015}
1016
Sean Paul9aa5ad32015-01-22 15:47:54 -05001017static int hwc_destroy_worker(struct hwc_worker *worker)
1018{
1019 int ret;
1020
1021 ret = pthread_mutex_lock(&worker->lock);
1022 if (ret) {
1023 ALOGE("Failed to lock in destroy() %d", ret);
1024 return ret;
1025 }
1026
1027 worker->exit = true;
1028
1029 ret |= pthread_cond_signal(&worker->cond);
1030 if (ret)
1031 ALOGE("Failed to signal cond in destroy() %d", ret);
1032
1033 ret |= pthread_mutex_unlock(&worker->lock);
1034 if (ret)
1035 ALOGE("Failed to unlock in destroy() %d", ret);
1036
1037 ret |= pthread_join(worker->thread, NULL);
1038 if (ret && ret != ESRCH)
1039 ALOGE("Failed to join thread in destroy() %d", ret);
1040
1041 return ret;
1042}
1043
1044static void hwc_destroy_display(struct hwc_drm_display *hd)
1045{
1046 int ret;
1047
1048 if (hwc_destroy_worker(&hd->set_worker))
1049 ALOGE("Destroy set worker failed");
Sean Pauleb9e75c2015-01-25 23:31:30 -05001050
1051 if (hwc_destroy_worker(&hd->vsync_worker))
1052 ALOGE("Destroy vsync worker failed");
Sean Paul9aa5ad32015-01-22 15:47:54 -05001053}
1054
Sean Paule0c4c3d2015-01-20 16:56:04 -05001055static int hwc_device_close(struct hw_device_t *dev)
1056{
1057 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulcd36a9e2015-01-22 18:01:18 -05001058 int ret, i;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001059
Sean Paul9aa5ad32015-01-22 15:47:54 -05001060 for (i = 0; i < MAX_NUM_DISPLAYS; i++)
1061 hwc_destroy_display(&ctx->displays[i]);
1062
1063 drmClose(ctx->fd);
Sean Paulcd36a9e2015-01-22 18:01:18 -05001064
1065 ret = hwc_import_destroy(ctx->import_ctx);
1066 if (ret)
1067 ALOGE("Could not destroy import %d", ret);
1068
Sean Paule0c4c3d2015-01-20 16:56:04 -05001069 free(ctx);
1070
1071 return 0;
1072}
1073
Sean Paul9aa5ad32015-01-22 15:47:54 -05001074static int hwc_initialize_worker(struct hwc_drm_display *hd,
1075 struct hwc_worker *worker, void *(*routine)(void*))
1076{
1077 int ret;
1078
1079 ret = pthread_cond_init(&worker->cond, NULL);
1080 if (ret) {
1081 ALOGE("Failed to create worker condition %d", ret);
1082 return ret;
1083 }
1084
1085 ret = pthread_mutex_init(&worker->lock, NULL);
1086 if (ret) {
1087 ALOGE("Failed to initialize worker lock %d", ret);
1088 goto err_cond;
1089 }
1090
1091 worker->exit = false;
1092
1093 ret = pthread_create(&worker->thread, NULL, routine, hd);
1094 if (ret) {
1095 ALOGE("Could not create worker thread %d", ret);
1096 goto err_lock;
1097 }
1098 return 0;
1099
1100err_lock:
1101 pthread_mutex_destroy(&worker->lock);
1102err_cond:
1103 pthread_cond_destroy(&worker->cond);
1104 return ret;
1105}
1106
Sean Paule0c4c3d2015-01-20 16:56:04 -05001107static int hwc_initialize_display(struct hwc_context_t *ctx, int display,
1108 uint32_t connector_id)
1109{
1110 struct hwc_drm_display *hd = NULL;
1111 int ret;
1112
1113 ret = hwc_get_drm_display(ctx, display, &hd);
1114 if (ret)
1115 return ret;
1116
Sean Paul9aa5ad32015-01-22 15:47:54 -05001117 hd->ctx = ctx;
1118 hd->display = display;
Sean Pauleb9e75c2015-01-25 23:31:30 -05001119 hd->active_pipe = -1;
Sean Paulefb20cb2015-02-04 09:29:15 -08001120 hd->initial_modeset_required = true;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001121 hd->connector_id = connector_id;
1122
Sean Paulf1dc1912015-01-24 01:34:31 -05001123 ret = sw_sync_timeline_create();
1124 if (ret < 0) {
1125 ALOGE("Failed to create sw sync timeline %d", ret);
1126 return ret;
1127 }
1128 hd->timeline_fd = ret;
1129
Sean Paul9aa5ad32015-01-22 15:47:54 -05001130 ret = hwc_initialize_worker(hd, &hd->set_worker, hwc_set_worker);
1131 if (ret) {
1132 ALOGE("Failed to create set worker %d\n", ret);
1133 return ret;
1134 }
1135
Sean Pauleb9e75c2015-01-25 23:31:30 -05001136 ret = hwc_initialize_worker(hd, &hd->vsync_worker, hwc_vsync_worker);
1137 if (ret) {
1138 ALOGE("Failed to create vsync worker %d", ret);
1139 goto err;
1140 }
1141
Sean Paule0c4c3d2015-01-20 16:56:04 -05001142 return 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -05001143
1144err:
1145 if (hwc_destroy_worker(&hd->set_worker))
1146 ALOGE("Failed to destroy set worker");
1147
1148 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001149}
1150
1151static int hwc_enumerate_displays(struct hwc_context_t *ctx)
1152{
1153 struct hwc_drm_display *panel_hd;
1154 drmModeResPtr res;
1155 drmModeConnectorPtr *conn_list;
1156 int ret = 0, i, j;
1157
1158 res = drmModeGetResources(ctx->fd);
1159 if (!res) {
1160 ALOGE("Failed to get drm resources");
1161 return -ENODEV;
1162 }
1163
1164 conn_list = (drmModeConnector **)calloc(res->count_connectors,
1165 sizeof(*conn_list));
1166 if (!conn_list) {
1167 ALOGE("Failed to allocate connector list");
1168 ret = -ENOMEM;
1169 goto out;
1170 }
1171
1172 for (i = 0; i < res->count_connectors; i++) {
1173 conn_list[i] = drmModeGetConnector(ctx->fd, res->connectors[i]);
1174 if (!conn_list[i]) {
1175 ALOGE("Failed to get connector %d", res->connectors[i]);
1176 ret = -ENODEV;
1177 goto out;
1178 }
1179 }
1180
1181 ctx->num_displays = 0;
1182
1183 /* Find a connected, panel type connector for display 0 */
1184 for (i = 0; i < res->count_connectors; i++) {
1185 drmModeConnectorPtr c = conn_list[i];
1186
1187 for (j = 0; j < ARRAY_SIZE(panel_types); j++) {
1188 if (c->connector_type == panel_types[j] &&
1189 c->connection == DRM_MODE_CONNECTED)
1190 break;
1191 }
1192 if (j == ARRAY_SIZE(panel_types))
1193 continue;
1194
1195 hwc_initialize_display(ctx, ctx->num_displays, c->connector_id);
1196 ctx->num_displays++;
1197 break;
1198 }
1199
1200 ret = hwc_get_drm_display(ctx, 0, &panel_hd);
1201 if (ret)
1202 goto out;
1203
1204 /* Fill in the other displays */
1205 for (i = 0; i < res->count_connectors; i++) {
1206 drmModeConnectorPtr c = conn_list[i];
1207
1208 if (panel_hd->connector_id == c->connector_id)
1209 continue;
1210
1211 hwc_initialize_display(ctx, ctx->num_displays, c->connector_id);
1212 ctx->num_displays++;
1213 }
1214
1215out:
1216 for (i = 0; i < res->count_connectors; i++) {
1217 if (conn_list[i])
1218 drmModeFreeConnector(conn_list[i]);
1219 }
1220 free(conn_list);
1221
1222 if (res)
1223 drmModeFreeResources(res);
1224
1225 return ret;
1226}
1227
1228static int hwc_device_open(const struct hw_module_t* module, const char* name,
1229 struct hw_device_t** dev)
1230{
1231 int ret = 0;
1232 struct hwc_context_t *ctx;
1233
1234 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1235 ALOGE("Invalid module name- %s", name);
1236 return -EINVAL;
1237 }
1238
Sean Paul9b1bb842015-01-23 01:11:58 -05001239 ctx = new hwc_context_t();
Sean Paule0c4c3d2015-01-20 16:56:04 -05001240 if (!ctx) {
1241 ALOGE("Failed to allocate hwc context");
1242 return -ENOMEM;
1243 }
1244
Sean Paulcd36a9e2015-01-22 18:01:18 -05001245 ret = hwc_import_init(&ctx->import_ctx);
Sean Paule0c4c3d2015-01-20 16:56:04 -05001246 if (ret) {
Sean Paulcd36a9e2015-01-22 18:01:18 -05001247 ALOGE("Failed to initialize import context");
Sean Paule0c4c3d2015-01-20 16:56:04 -05001248 goto out;
1249 }
1250
1251 /* TODO: Use drmOpenControl here instead */
1252 ctx->fd = open(HWCOMPOSER_DRM_DEVICE, O_RDWR);
1253 if (ctx->fd < 0) {
1254 ALOGE("Failed to open dri- %s", strerror(-errno));
1255 goto out;
1256 }
1257
1258 ret = drmSetMaster(ctx->fd);
1259 if (ret) {
1260 ALOGE("Failed to set hwcomposer as drm master %d", ret);
1261 goto out;
1262 }
1263
1264 ret = hwc_enumerate_displays(ctx);
1265 if (ret) {
1266 ALOGE("Failed to enumerate displays: %s", strerror(ret));
1267 goto out;
1268 }
1269
1270 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
1271 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
1272 ctx->device.common.module = const_cast<hw_module_t*>(module);
1273 ctx->device.common.close = hwc_device_close;
1274
1275 ctx->device.prepare = hwc_prepare;
1276 ctx->device.set = hwc_set;
1277 ctx->device.eventControl = hwc_event_control;
1278 ctx->device.setPowerMode = hwc_set_power_mode;
1279 ctx->device.query = hwc_query;
1280 ctx->device.registerProcs = hwc_register_procs;
1281 ctx->device.getDisplayConfigs = hwc_get_display_configs;
1282 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
1283 ctx->device.getActiveConfig = hwc_get_active_config;
1284 ctx->device.setActiveConfig = hwc_set_active_config;
1285 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
1286
1287 *dev = &ctx->device.common;
1288
1289 return 0;
1290out:
1291 if (ctx->fd >= 0)
1292 close(ctx->fd);
1293
1294 free(ctx);
1295 return ret;
1296}
1297
1298static struct hw_module_methods_t hwc_module_methods = {
1299 open: hwc_device_open
1300};
1301
1302hwc_module_t HAL_MODULE_INFO_SYM = {
1303 common: {
1304 tag: HARDWARE_MODULE_TAG,
1305 version_major: 1,
1306 version_minor: 0,
1307 id: HWC_HARDWARE_MODULE_ID,
1308 name: "DRM hwcomposer module",
1309 author: "The Android Open Source Project",
1310 methods: &hwc_module_methods,
1311 dso: NULL,
1312 reserved: { 0 },
1313 }
1314};