Move slider into gs101 and <device>
from: 026342771c6642980cb4653b1ec4d857a5d8be54
Bug: 167996145
Change-Id: I08376762c559b3a7fd2cd2d743d090269ed52c94
diff --git a/audio/whitefin/audio-tables.mk b/audio/whitefin/audio-tables.mk
new file mode 100644
index 0000000..de8d4df
--- /dev/null
+++ b/audio/whitefin/audio-tables.mk
@@ -0,0 +1,68 @@
+#
+# Copyright (C) 2020 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+AUDIO_TABLE_FOLDER := whitefin
+
+# Platform Configuration for AudioHAL / SoundTriggerHAL
+PRODUCT_COPY_FILES += \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/config/audio_policy_configuration_bluetooth_legacy_hal.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration_bluetooth_legacy_hal.xml \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/config/audio_policy_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration.xml \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/config/audio_policy_configuration_a2dp_offload_disabled.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration_a2dp_offload_disabled.xml \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/config/audio_platform_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_platform_configuration.xml \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/config/sound_trigger_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/sound_trigger_configuration.xml
+
+# AudioEffectHAL Configuration
+PRODUCT_COPY_FILES += \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/config/audio_effects.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_effects.xml
+
+# Mixer Path Configuration for AudioHAL
+PRODUCT_COPY_FILES += \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/config/mixer_paths.xml:$(TARGET_COPY_OUT_VENDOR)/etc/mixer_paths.xml
+
+# Speaker firmware files
+SPK_FIRMWARE_PATH := $(AUDIO_TABLE_FOLDER)/cs35l41/fw
+SPK_FIRMWARE_FULL_PATH := device/google/raviole/audio/$(SPK_FIRMWARE_PATH)
+
+SPK_FIRMWAR_FILES := $(wildcard $(SPK_FIRMWARE_FULL_PATH)/*)
+
+PRODUCT_COPY_FILES += $(foreach spk_firmware, \
+ $(SPK_FIRMWAR_FILES), \
+ $(spk_firmware):$(TARGET_COPY_OUT_VENDOR)/firmware/$(notdir $(spk_firmware)))
+
+# Audio tuning
+PRODUCT_COPY_FILES += \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/bluenote/playback.gatf:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/playback.gatf \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/bluenote/recording.gatf:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/recording.gatf \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/bluenote/voice.gatf:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/voice.gatf \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/BLUETOOTH.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/BLUETOOTH.dat \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSFREE.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSFREE.dat \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSET.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSET.dat \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HEADSET.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HEADSET.dat \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/waves_config.ini:$(TARGET_COPY_OUT_VENDOR)/etc/waves_config.ini \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/waves_preset.mps:$(TARGET_COPY_OUT_VENDOR)/etc/waves_preset.mps
+
+# userdebug specific
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+PRODUCT_COPY_FILES += \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/BLUETOOTH.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/BLUETOOTH.mods \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSFREE.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSFREE.mods \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSET.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSET.mods \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HEADSET.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HEADSET.mods
+
+# Mixer Path Configuration for Audio Speaker Calibration Tool crus_sp_cal
+PRODUCT_COPY_FILES += \
+ device/google/raviole/audio/$(AUDIO_TABLE_FOLDER)/cs35l41/crus_sp_cal_mixer_paths.xml:$(TARGET_COPY_OUT_VENDOR)/etc/crus_sp_cal_mixer_paths.xml
+endif
diff --git a/audio/whitefin/config/audio_effects.xml b/audio/whitefin/config/audio_effects.xml
new file mode 100644
index 0000000..62e1679
--- /dev/null
+++ b/audio/whitefin/config/audio_effects.xml
@@ -0,0 +1,63 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<audio_effects_conf version="2.0" xmlns="http://schemas.android.com/audio/audio_effects_conf/v2_0">
+ <libraries>
+ <library name="bundle" path="libbundlewrapper.so"/>
+ <library name="reverb" path="libreverbwrapper.so"/>
+ <library name="visualizer_sw" path="libvisualizer.so"/>
+ <library name="downmix" path="libdownmix.so"/>
+ <library name="dynamics_processing" path="libdynproc.so"/>
+ <library name="loudness_enhancer" path="libldnhncr.so"/>
+ <library name="proxy" path="libeffectproxy.so"/>
+ <library name="offload_effect" path="liboffloadeffect.so"/>
+ <library name="audio_pre_process" path="libdsp_aecns.so"/>
+ <library name="haptic_generator" path="libhapticgenerator.so"/>
+ </libraries>
+ <effects>
+ <effectProxy name="bassboost" library="proxy" uuid="2f0871a2-c93c-4824-9664-42eb2909f2ef">
+ <libsw library="bundle" uuid="8631f300-72e2-11df-b57e-0002a5d5c51b"/>
+ <libhw library="offload_effect" uuid="c7e3b29d-e797-4cf9-9912-17c1956510cc"/>
+ </effectProxy>
+ <effectProxy name="virtualizer" library="proxy" uuid="626499c6-647e-455e-8c45-2d106e23c755">
+ <libsw library="bundle" uuid="1d4033c0-8557-11df-9f2d-0002a5d5c51b"/>
+ <libhw library="offload_effect" uuid="f8f88a03-fdf8-4554-8e60-77fbf8f2d3b0"/>
+ </effectProxy>
+ <effectProxy name="equalizer" library="proxy" uuid="49004f03-3391-4c44-97dd-a043d526ea7d">
+ <libsw library="bundle" uuid="ce772f20-847d-11df-bb17-0002a5d5c51b"/>
+ <libhw library="offload_effect" uuid="50deaa30-4a83-4b1f-bfe3-dec6d605ede0"/>
+ </effectProxy>
+ <effect name="volume" library="bundle" uuid="119341a0-8469-11df-81f9-0002a5d5c51b"/>
+ <effectProxy name="reverb_env_aux" library="proxy" uuid="b8154738-a0a1-4fc0-bb79-c845a3197739">
+ <libsw library="reverb" uuid="4a387fc0-8ab3-11df-8bad-0002a5d5c51b"/>
+ <libhw library="offload_effect" uuid="0c84bcd9-bce4-441b-ba9e-51f80897c949"/>
+ </effectProxy>
+ <effectProxy name="reverb_env_ins" library="proxy" uuid="ba0f19fe-8790-4831-a58b-1f3299dd0bae">
+ <libsw library="reverb" uuid="c7a511a0-a3bb-11df-860e-0002a5d5c51b"/>
+ <libhw library="offload_effect" uuid="86d1877a-127f-4bdc-9665-c958903ad7b2"/>
+ </effectProxy>
+ <effectProxy name="reverb_pre_aux" library="proxy" uuid="80974a8b-b3be-4c21-8c0b-b392a54e13bc">
+ <libsw library="reverb" uuid="f29a1400-a3bb-11df-8ddc-0002a5d5c51b"/>
+ <libhw library="offload_effect" uuid="4f90220c-9742-4467-a9d7-122f85c01195"/>
+ </effectProxy>
+ <effectProxy name="reverb_pre_ins" library="proxy" uuid="c02d7dce-ca56-4aea-8c83-bbb53e5600e8">
+ <libsw library="reverb" uuid="172cdf00-a3bc-11df-a72f-0002a5d5c51b"/>
+ <libhw library="offload_effect" uuid="a2cf6b45-360b-49f3-94d7-fdb9837f89e8"/>
+ </effectProxy>
+ <effectProxy name="visualizer" library="proxy" uuid="b27271d9-64d6-413c-b316-80005ad09008">
+ <libsw library="visualizer_sw" uuid="d069d9e0-8329-11df-9168-0002a5d5c51b"/>
+ <libhw library="offload_effect" uuid="99fb2ecb-3426-4a0e-8082-1a1da5604b7d"/>
+ </effectProxy>
+ <effect name="downmix" library="downmix" uuid="93f04452-e4fe-41cc-91f9-e475b6d1d69f"/>
+ <effect name="loudness_enhancer" library="loudness_enhancer" uuid="fa415329-2034-4bea-b5dc-5b381c8d1e2c"/>
+ <effect name="aec" library="audio_pre_process" uuid="28c28780-ec8b-48b6-8590-8c84557d797d"/>
+ <effect name="ns" library="audio_pre_process" uuid="62ff2836-d050-43c3-9c2d-94a73dad2c64"/>
+ <effect name="haptic_generator" library="haptic_generator" uuid="97c4acd1-8b82-4f2f-832e-c2fe5d7a9931"/>
+ </effects>
+ <postprocess>
+ </postprocess>
+ <preprocess>
+ <stream type="voice_communication">
+ <apply effect="aec"/>
+ <apply effect="ns"/>
+ </stream>
+ </preprocess>
+</audio_effects_conf>
diff --git a/audio/whitefin/config/audio_platform_configuration.xml b/audio/whitefin/config/audio_platform_configuration.xml
new file mode 100644
index 0000000..23d4955
--- /dev/null
+++ b/audio/whitefin/config/audio_platform_configuration.xml
@@ -0,0 +1,194 @@
+<?xml version="1.0" encoding="ISO-8859-1"?>
+<!-- Copyright (c) 2019, The Linux Foundation. All rights reserved. -->
+<!-- -->
+<!-- Redistribution and use in source and binary forms, with or without -->
+<!-- modification, are permitted provided that the following conditions are -->
+<!-- met: -->
+<!-- * Redistributions of source code must retain the above copyright -->
+<!-- notice, this list of conditions and the following disclaimer. -->
+<!-- * Redistributions in binary form must reproduce the above -->
+<!-- copyright notice, this list of conditions and the following -->
+<!-- disclaimer in the documentation and/or other materials provided -->
+<!-- with the distribution. -->
+<!-- * Neither the name of The Linux Foundation nor the names of its -->
+<!-- contributors may be used to endorse or promote products derived -->
+<!-- from this software without specific prior written permission. -->
+<!-- -->
+<!-- THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED -->
+<!-- WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -->
+<!-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT -->
+<!-- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS -->
+<!-- BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -->
+<!-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -->
+<!-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR -->
+<!-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -->
+<!-- OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN -->
+<!-- IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -->
+<audio_platform_configuration>
+ <hw_intf>
+ <intf id="BE_HW_RX_INTF_0" name="TDM_RX_0" min_bit="24" min_chan="2" min_rate="48000" block_id="16"/>
+ <intf id="BE_HW_RX_INTF_1" name="TDM_RX_1" min_bit="24" min_chan="2" min_rate="48000" block_id="17"/>
+ <intf id="BE_HW_RX_INTF_2" name="USB_RX" min_bit="24" min_chan="2" min_rate="48000" block_id="20"/>
+ <intf id="BE_HW_RX_INTF_3" name="I2S_RX_0" min_bit="24" min_chan="2" min_rate="48000" block_id="18"/>
+ <!--intf id="BE_HW_RX_INTF_2" name="USB_RX" min_bit="24" min_chan="2" min_rate="48000" ctrl_config="USB device" ctrl_rate="Sample Rate" ctrl_bit="Bit Width" ctrl_chan="Channel"/-->
+ <!--intf id="BE_HW_RX_INTF_3" name="BT_RX"/-->
+ <intf id="BE_VIRTUAL_VOICE_RX_TUNING" block_id="19"/>
+ <intf id="BE_VIRTUAL_VOICE_TX_TUNING" block_id="19"/>
+ <intf id="BE_HW_TX_INTF_3" name="Camcorder" block_id="128"/>
+ </hw_intf>
+
+ <product_lists>
+ <product name="Blackbird">
+ <id value="18d1:5033"/>
+ </product>
+ <product name="Condor">
+ <id value="18d1:5034"/>
+ </product>
+ <product name="Condor_Sprint">
+ <id value="18d1:5038"/>
+ </product>
+ <product name="Condor_Sprint2">
+ <id value="18d1:5036"/>
+ </product>
+ </product_lists>
+
+ <!-- The microphone capability is fake data -->
+ <microphone_characteristics>
+ <microphone device_id="builtin_mic_1" type="AUDIO_DEVICE_IN_BUILTIN_MIC" address="bottom" location="AUDIO_MICROPHONE_LOCATION_MAINBODY"
+ group="0" index_in_the_group="0" directionality="AUDIO_MICROPHONE_DIRECTIONALITY_OMNI" num_frequency_responses="93"
+ frequencies="100.00 106.00 112.00 118.00 125.00 132.00 140.00 150.00 160.00 170.00 180.00 190.00 200.00 212.00 224.00 236.00 250.00 265.00 280.00 300.00 315.00 335.00 355.00 375.00 400.00 425.00 450.00 475.00 500.00 530.00 560.00 600.00 630.00 670.00 710.00 750.00 800.00 850.00 900.00 950.00 1000.00 1060.00 1120.00 1180.00 1250.00 1320.00 1400.00 1500.00 1600.00 1700.00 1800.00 1900.00 2000.00 2120.00 2240.00 2360.00 2500.00 2650.00 2800.00 3000.00 3150.00 3350.00 3550.00 3750.00 4000.00 4250.00 4500.00 4750.00 5000.00 5300.00 5600.00 6000.00 6300.00 6700.00 7100.00 7500.00 8000.00 8500.00 9000.00 9500.00 10000.00 10600.00 11200.00 11800.00 12500.00 13200.00 14000.00 15000.00 16000.00 17000.00 18000.00 19000.00 20000.00"
+ responses="-0.78 -0.71 -0.64 -0.60 -0.55 -0.50 -0.47 -0.42 -0.39 -0.36 -0.34 -0.33 -0.32 -0.29 -0.28 -0.28 -0.27 -0.25 -0.25 -0.24 -0.23 -0.23 -0.22 -0.22 -0.19 -0.17 -0.15 -0.15 -0.14 -0.14 -0.12 -0.11 -0.10 -0.10 -0.08 -0.07 -0.07 -0.04 -0.03 -0.01 0.00 0.04 0.06 0.07 0.08 0.13 0.09 0.14 0.19 0.23 0.28 0.29 0.31 0.37 0.88 0.86 0.77 0.78 0.84 0.86 1.05 1.12 1.18 1.25 1.43 1.66 1.83 2.02 2.23 2.59 2.84 3.35 4.01 6.82 6.62 6.42 7.30 8.23 7.54 12.68 13.76 18.69 19.68 20.90 23.70 25.10 21.65 16.18 18.84 25.44 23.48 23.22 24.89"
+ sensitivity="-37.0" max_spl="132.5" min_spl="28.5" orientation="0.0 0.0 1.0" geometric_location="0.0269 0.0058 0.0079" />
+ <microphone device_id="builtin_mic_2" type="AUDIO_DEVICE_IN_BACK_MIC" address="back" location="AUDIO_MICROPHONE_LOCATION_MAINBODY"
+ group="0" index_in_the_group="1" directionality="AUDIO_MICROPHONE_DIRECTIONALITY_OMNI" num_frequency_responses="92"
+ frequencies="106.00 112.00 118.00 125.00 132.00 140.00 150.00 160.00 170.00 180.00 190.00 200.00 212.00 224.00 236.00 250.00 265.00 280.00 300.00 315.00 335.00 355.00 375.00 400.00 425.00 450.00 475.00 500.00 530.00 560.00 600.00 630.00 670.00 710.00 750.00 800.00 850.00 900.00 950.00 1000.00 1060.00 1120.00 1180.00 1250.00 1320.00 1400.00 1500.00 1600.00 1700.00 1800.00 1900.00 2000.00 2120.00 2240.00 2360.00 2500.00 2650.00 2800.00 3000.00 3150.00 3350.00 3550.00 3750.00 4000.00 4250.00 4500.00 4750.00 5000.00 5300.00 5600.00 6000.00 6300.00 6700.00 7100.00 7500.00 8000.00 8500.00 9000.00 9500.00 10000.00 10600.00 11200.00 11800.00 12500.00 13200.00 14000.00 15000.00 16000.00 17000.00 18000.00 19000.00 20000.00"
+ responses="-0.75 -0.74 -0.69 -0.65 -0.62 -0.61 -0.56 -0.53 -0.50 -0.47 -0.43 -0.40 -0.37 -0.36 -0.33 -0.30 -0.28 -0.25 -0.24 -0.24 -0.24 -0.25 -0.24 -0.12 -0.10 -0.08 -0.09 -0.07 -0.07 -0.06 -0.06 -0.06 -0.05 -0.04 -0.05 -0.04 -0.01 0.02 0.02 0.00 0.02 0.03 0.07 0.10 0.10 0.13 0.01 0.01 0.10 0.11 0.19 0.24 0.38 0.46 0.26 0.27 0.43 0.76 0.75 1.09 1.09 0.94 1.06 1.21 1.47 1.45 1.36 2.07 2.85 2.90 3.85 4.65 5.84 5.46 6.15 7.50 8.30 10.62 12.70 16.65 20.95 25.41 26.32 20.20 16.60 11.24 7.85 7.62 20.19 7.32 2.87 5.18"
+ sensitivity="-37.0" max_spl="132.5" min_spl="28.5" orientation="0.0 1.0 0.0" geometric_location="0.0546 0.1456 0.00415" />
+ <microphone device_id="builtin_mic_3" type="AUDIO_DEVICE_IN_BUILTIN_MIC" address="top" location="AUDIO_MICROPHONE_LOCATION_MAINBODY"
+ group="0" index_in_the_group="2" directionality="AUDIO_MICROPHONE_DIRECTIONALITY_OMNI" num_frequency_responses="92"
+ frequencies="100.00 106.00 112.00 118.00 125.00 132.00 140.00 150.00 160.00 170.00 180.00 190.00 200.00 212.00 224.00 236.00 250.00 265.00 280.00 300.00 315.00 335.00 355.00 375.00 400.00 425.00 450.00 475.00 500.00 530.00 560.00 600.00 630.00 670.00 710.00 750.00 800.00 850.00 900.00 950.00 1000.00 1060.00 1120.00 1180.00 1250.00 1320.00 1400.00 1500.00 1600.00 1700.00 1800.00 1900.00 2000.00 2120.00 2240.00 2360.00 2500.00 2650.00 2800.00 3000.00 3150.00 3350.00 3550.00 3750.00 4000.00 4250.00 4500.00 4750.00 5000.00 5300.00 5600.00 6000.00 6300.00 6700.00 7100.00 7500.00 8000.00 8500.00 9000.00 9500.00 10000.00 10600.00 11200.00 11800.00 12500.00 13200.00 14000.00 15000.00 16000.00 17000.00 18000.00 19000.00"
+ responses="-9.24 -9.31 -9.39 -9.45 -9.46 -9.47 -9.50 -9.52 -9.51 -9.52 -9.51 -9.50 -9.49 -9.47 -9.48 -9.49 -9.48 -9.50 -9.51 -9.53 -9.55 -9.59 -9.63 -9.67 -9.58 -9.57 -9.65 -9.68 -9.71 -9.75 -9.79 -9.84 -9.87 -9.87 -9.90 -9.90 -9.91 -9.97 -10.01 -10.05 -9.85 -9.93 -9.94 -9.98 -10.04 -10.12 -10.28 -10.25 -10.01 -9.86 -9.81 -9.82 -9.61 -9.46 -8.27 -8.42 -8.98 -8.99 -8.82 -9.21 -8.92 -8.97 -9.30 -9.44 -9.52 -9.28 -9.09 -8.81 -7.02 -5.72 -5.30 -7.26 -8.39 -12.28 -8.23 -6.99 -5.52 -4.87 -3.82 -6.09 0.00 -2.15 -0.26 1.48 5.22 10.92 6.41 9.55 12.96 3.35 22.00 19.75"
+ sensitivity="-37.0" max_spl="132.5" min_spl="28.5" orientation="0.0 0.0 1.0" geometric_location="0.0274 0.14065 0.0079" />
+ </microphone_characteristics>
+
+ <!-- The microphone mapping of backend device is fake data -->
+ <input_backend_cfg_mic_mapping>
+ <backend_cfg in_cfg="IN_CAMCORDER_LANDSCAPE_BE_CFG">
+ <mic_info mic_device_id="builtin_mic_1"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ <mic_info mic_device_id="builtin_mic_2"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ <mic_info mic_device_id="builtin_mic_3"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ </backend_cfg>
+ <backend_cfg in_cfg="IN_HANDSET_MIC_BE_CFG">
+ <mic_info mic_device_id="builtin_mic_1"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ </backend_cfg>
+ <backend_cfg in_cfg="IN_VOICECALL_HANDSET_MIC_BE_CFG">
+ <mic_info mic_device_id="builtin_mic_1"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ <mic_info mic_device_id="builtin_mic_2"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ </backend_cfg>
+ <backend_cfg in_cfg="IN_VOICECALL_SPEAKER_MIC_BE_CFG">
+ <mic_info mic_device_id="builtin_mic_1"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ <mic_info mic_device_id="builtin_mic_2"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ <mic_info mic_device_id="builtin_mic_3"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ </backend_cfg>
+ <backend_cfg in_cfg="IN_USB_TTY_VCO_MIC_BE_CFG">
+ <mic_info mic_device_id="builtin_mic_1"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ <mic_info mic_device_id="builtin_mic_2"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ <mic_info mic_device_id="builtin_mic_3"
+ channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+ </backend_cfg>
+ </input_backend_cfg_mic_mapping>
+
+ <usecase_attr>
+ <!-- for output with AUDIO_OUTPUT_FLAG_RAW, 4 * 10ms buffer -->
+ <usecase id="UC_RAW_PLAYBACK" dev1="0" dyn_path="true" dsp_vol="false" mmap="false" period="10" period_num="4"/>
+ <!-- for output with AUDIO_OUTPUT_FLAG_PRIMARY|AUDIO_OUTPUT_FLAG_FAST, 4 * 10ms buffer -->
+ <usecase id="UC_LOW_LATENCY_PLAYBACK" dev1="1" dyn_path="true" dsp_vol="false" mmap="false" period="10" period_num="4"/>
+ <!-- for output with AUDIO_OUTPUT_FLAG_DEEP_BUFFER, 4 * 10ms buffer -->
+ <usecase id="UC_DEEP_BUFFER_PLAYBACK" dev1="5" dyn_path="true" dsp_vol="false" mmap="false" period="10" period_num="4"/>
+ <!-- dev1: voice-call downlink dev2: voice-clal uplink -->
+ <usecase id="UC_VOICE_CALL" dev1="4" dev2="11"/>
+ <!-- for output with AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD, 4 * 128KB buffer -->
+ <usecase id="UC_COMPRESSED_OFFLOAD_PLAYBACK" dev1="6" dyn_path="true" dsp_vol="true" mmap="false" period="131072" period_num="4" pre_proc_id="14"/>
+ <!-- dev1: audio dev2: haptic -->
+ <usecase id="UC_HAPTIC_AUDIO" dev1="2" dev2="7" period="10" period_num="4"/>
+ <!-- for input -->
+ <usecase id="UC_AUDIO_RECORD" dev1="8" dyn_path="true" dsp_vol="false" mmap="false" period="10" period_num="4"/>
+ <usecase id="UC_HOSTLESS_UL" dev1="15"/>
+ </usecase_attr>
+
+ <dsp_latency>
+ <usecase id="UC_LOW_LATENCY_PLAYBACK" type="playback">
+ <be_cfg be_id="OUT_SPEAKER_BE_CFG" latency="8000"/>
+ </usecase>
+
+ <usecase id="UC_DEEP_BUFFER_PLAYBACK" type="playback">
+ <be_cfg be_id="OUT_SPEAKER_BE_CFG" latency="25000"/>
+ </usecase>
+
+ <usecase id="UC_AUDIO_RECORD" type="capture">
+ <be_cfg be_id="IN_CAMCORDER_LANDSCAPE_BE_CFG" latency="40000"/>
+ <be_cfg be_id="IN_CAMCORDER_INVERT_LANDSCAPE_BE_CFG" latency="40000"/>
+ <be_cfg be_id="IN_CAMCORDER_PORTRAIT_BE_CFG" latency="40000"/>
+ <be_cfg be_id="IN_CAMCORDER_SELFIE_LANDSCAPE_BE_CFG" latency="40000"/>
+ <be_cfg be_id="IN_CAMCORDER_SELFIE_INVERT_LANDSCAPE_BE_CFG" latency="40000"/>
+ <be_cfg be_id="IN_CAMCORDER_SELFIE_PORTRAIT_BE_CFG" latency="40000"/>
+ </usecase>
+ </dsp_latency>
+
+ <soundcard_name name="google,aoc-snd-card" />
+
+ <cfg_attr>
+ <cfg id="OUT_SPEAKER_BE_CFG" intf_name="TDM_RX_0" mux="HW_MUX_GP_0" tuning_id="2"/>
+ <cfg id="OUT_HAC_HANDSET_BE_CFG" intf_name="TDM_RX_1" mux="HW_MUX_GP_1" be_path="hac-handset"/>
+ <cfg id="OUT_USB_HEADSET_BE_CFG">
+ <override product="Blackbird" tuning_id="22"/>
+ <override product="Condor" tuning_id="33"/>
+ </cfg>
+ <cfg id="OUT_USB_TTY_FULL_BE_CFG" be_path="usb-headphone" codec_path="usb-headphone"/>
+ <cfg id="OUT_USB_TTY_VCO_BE_CFG" be_path="usb-headphone" codec_path="usb-headphone"/>
+ <cfg id="OUT_USB_TTY_HCO_BE_CFG" be_path="NULL" codec_path="voice-speaker"/>
+ <cfg id="IN_USB_TTY_FULL_MIC_BE_CFG" be_path="usb-headset-mic" codec_path="usb-headset-mic"/>
+ <cfg id="IN_USB_TTY_VCO_MIC_BE_CFG" be_path="NULL" codec_path="voice-speaker-mic"/>
+ <cfg id="IN_USB_TTY_HCO_MIC_BE_CFG" be_path="usb-headset-mic" codec_path="usb-headset-mic"/>
+ <cfg id="IN_HANDSET_MIC_BE_CFG" intf_id="BE_HW_TX_INTF_0" mux="HW_MUX_GP_0" tuning_id="10" codec_path="handset-mic" be_path="NULL"/>
+ <cfg id="IN_SPK_VI_BE_CFG" codec_path="NULL" be_path="spk-vi"/>
+ <cfg id="IN_CAMCORDER_LANDSCAPE_BE_CFG" intf_name="Camcorder" tuning_id="71"/>
+ <cfg id="IN_CAMCORDER_INVERT_LANDSCAPE_BE_CFG" intf_name="Camcorder" tuning_id="71"/>
+ <cfg id="IN_CAMCORDER_PORTRAIT_BE_CFG" intf_name="Camcorder" tuning_id="71"/>
+ <cfg id="IN_CAMCORDER_SELFIE_LANDSCAPE_BE_CFG" intf_name="Camcorder" tuning_id="71"/>
+ <cfg id="IN_CAMCORDER_SELFIE_INVERT_LANDSCAPE_BE_CFG" intf_name="Camcorder" tuning_id="71"/>
+ <cfg id="IN_CAMCORDER_SELFIE_PORTRAIT_BE_CFG" intf_name="Camcorder" tuning_id="71"/>
+ </cfg_attr>
+
+ <xlate_id>
+ <item component="TUNING_COMPONENT_WAVES" id="2"/>
+ <item component="TUNING_COMPONENT_FORTEMEDIA" id="3"/>
+ <item component="TUNING_COMPONENT_CAMCORDER" id="6"/>
+ </xlate_id>
+
+ <device_handle>
+ <hadnler libname="audio_bt_aoc.so"/>
+ </device_handle>
+
+ <device_handle>
+ <hadnler libname="audio_usb_aoc.so"/>
+ </device_handle>
+
+ <external_module>
+ <module libname="audio_waves_aoc.so" argu="Sink=SPK:1"/>
+ <module libname="audio_spk_35l41.so"/>
+ <module libname="audio_fortemedia_aoc.so"/>
+ <module libname="liboffloadeffect.so"/>
+ </external_module>
+</audio_platform_configuration>
diff --git a/audio/whitefin/config/audio_policy_configuration.xml b/audio/whitefin/config/audio_policy_configuration.xml
new file mode 100644
index 0000000..64081e8
--- /dev/null
+++ b/audio/whitefin/config/audio_policy_configuration.xml
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<!-- Copyright (C) 2020 The Android Open Source Project
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+ http://www.apache.org/licenses/LICENSE-2.0
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+-->
+<audioPolicyConfiguration version="1.0" xmlns:xi="http://www.w3.org/2001/XInclude">
+ <globalConfiguration speaker_drc_enabled="false" call_screen_mode_supported="true" />
+ <modules>
+ <!-- Primary Audio HAL -->
+ <module name="primary" halVersion="2.0">
+ <attachedDevices>
+ <item>Speaker</item>
+ <item>Speaker Safe</item>
+ <item>Earpiece</item>
+ <item>Built-In Mic</item>
+ <item>Telephony Tx</item>
+ <item>Voice Call And Telephony Rx</item>
+ </attachedDevices>
+ <defaultOutputDevice>Speaker</defaultOutputDevice>
+ <mixPorts>
+ <mixPort name="primary output" role="source" flags="AUDIO_OUTPUT_FLAG_PRIMARY|AUDIO_OUTPUT_FLAG_FAST">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ <mixPort name="deep buffer" role="source" flags="AUDIO_OUTPUT_FLAG_DEEP_BUFFER">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ <mixPort name="compressed_offload" role="source"
+ flags="AUDIO_OUTPUT_FLAG_DIRECT|AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD|AUDIO_OUTPUT_FLAG_NON_BLOCKING">
+ <profile name="" format="AUDIO_FORMAT_MP3"
+ samplingRates="8000,11025,12000,16000,22050,24000,32000,44100,48000"
+ channelMasks="AUDIO_CHANNEL_OUT_STEREO,AUDIO_CHANNEL_OUT_MONO"/>
+ </mixPort>
+ <mixPort name="raw" role="source" flags="AUDIO_OUTPUT_FLAG_RAW|AUDIO_OUTPUT_FLAG_FAST">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ <mixPort name="incall playback" role="source"
+ flags="AUDIO_OUTPUT_FLAG_INCALL_MUSIC">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000"
+ channelMasks="AUDIO_CHANNEL_OUT_MONO" />
+ </mixPort>
+ <mixPort name="voice call tx" role="source">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000"
+ channelMasks="AUDIO_CHANNEL_OUT_MONO" />
+ </mixPort>
+ <mixPort name="primary input" role="sink">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000"
+ channelMasks="AUDIO_CHANNEL_IN_MONO,AUDIO_CHANNEL_IN_STEREO,AUDIO_CHANNEL_INDEX_MASK_3"/>
+ </mixPort>
+ <mixPort name="hotword input" role="sink" flags="AUDIO_INPUT_FLAG_HW_HOTWORD" maxActiveCount="0" >
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="8000,11025,12000,16000,22050,24000,32000,44100,48000"
+ channelMasks="AUDIO_CHANNEL_IN_MONO,AUDIO_CHANNEL_IN_STEREO"/>
+ </mixPort>
+ <mixPort name="incall capture" role="sink">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000"
+ channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+ </mixPort>
+ <mixPort name="voice call rx" role="sink">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000"
+ channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+ </mixPort>
+ </mixPorts>
+ <devicePorts>
+ <!-- Output devices declaration, i.e. Sink DEVICE PORT -->
+ <devicePort tagName="Earpiece" type="AUDIO_DEVICE_OUT_EARPIECE" role="sink">
+ </devicePort>
+ <devicePort tagName="Speaker" type="AUDIO_DEVICE_OUT_SPEAKER" role="sink">
+ </devicePort>
+ <devicePort tagName="Speaker Safe" type="AUDIO_DEVICE_OUT_SPEAKER_SAFE" role="sink">
+ </devicePort>
+ <devicePort tagName="Wired Headset" type="AUDIO_DEVICE_OUT_WIRED_HEADSET" role="sink">
+ </devicePort>
+ <devicePort tagName="Wired Headphones" type="AUDIO_DEVICE_OUT_WIRED_HEADPHONE" role="sink">
+ </devicePort>
+ <devicePort tagName="BT SCO" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO" role="sink">
+ </devicePort>
+ <devicePort tagName="BT SCO Headset" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_HEADSET" role="sink">
+ </devicePort>
+ <devicePort tagName="BT SCO Car Kit" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_CARKIT" role="sink">
+ </devicePort>
+ <devicePort tagName="USB Device Out" type="AUDIO_DEVICE_OUT_USB_DEVICE" role="sink">
+ </devicePort>
+ <devicePort tagName="USB Headset Out" type="AUDIO_DEVICE_OUT_USB_HEADSET" role="sink">
+ </devicePort>
+ <devicePort tagName="Aux Digital" type="AUDIO_DEVICE_OUT_AUX_DIGITAL" role="sink">
+ </devicePort>
+ <devicePort tagName="Telephony Tx" type="AUDIO_DEVICE_OUT_TELEPHONY_TX" role="sink">
+ </devicePort>
+ <!-- Input devices declaration, i.e. Source DEVICE PORT -->
+ <devicePort tagName="Built-In Mic" type="AUDIO_DEVICE_IN_BUILTIN_MIC" role="source">
+ </devicePort>
+ <devicePort tagName="Built-In Back Mic" type="AUDIO_DEVICE_IN_BACK_MIC" role="source">
+ </devicePort>
+ <devicePort tagName="Wired Headset Mic" type="AUDIO_DEVICE_IN_WIRED_HEADSET" role="source">
+ </devicePort>
+ <devicePort tagName="BT SCO Headset Mic" type="AUDIO_DEVICE_IN_BLUETOOTH_SCO_HEADSET" role="source">
+ </devicePort>
+ <devicePort tagName="USB Device In" type="AUDIO_DEVICE_IN_USB_DEVICE" role="source">
+ </devicePort>
+ <devicePort tagName="USB Headset In" type="AUDIO_DEVICE_IN_USB_HEADSET" role="source">
+ </devicePort>
+ <!-- AUDIO_DEVICE_IN_VOICE_CALL and AUDIO_DEVICE_IN_TELEPHONY_RX are in the same value -->
+ <devicePort tagName="Voice Call And Telephony Rx" type="AUDIO_DEVICE_IN_VOICE_CALL" role="source">
+ </devicePort>
+ </devicePorts>
+ <!-- route declaration, i.e. list all available sources for a given sink -->
+ <routes>
+ <route type="mix" sink="Speaker"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="Speaker Safe"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="Earpiece"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="primary input"
+ sources="Built-In Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+ <route type="mix" sink="hotword input"
+ sources="Built-In Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+ <route type="mix" sink="incall capture" sources="Voice Call And Telephony Rx" />
+ <route type="mix" sink="voice call rx" sources="Voice Call And Telephony Rx" />
+ <route type="mix" sink="USB Device Out"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="USB Headset Out"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="BT SCO"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="BT SCO Headset"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="BT SCO Car Kit"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="Telephony Tx" sources="incall playback,voice call tx" />
+ </routes>
+ </module>
+ <!-- Bluetooth Audio HAL -->
+ <xi:include href="bluetooth_audio_policy_configuration.xml"/>
+ <!-- Usb Audio HAL -->
+ <module name="usb" halVersion="2.0">
+ <mixPorts>
+ <mixPort name="usb_accessory output" role="source">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ </mixPorts>
+ <devicePorts>
+ <devicePort tagName="USB Host Out" type="AUDIO_DEVICE_OUT_USB_ACCESSORY" role="sink">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </devicePort>
+ </devicePorts>
+ <routes>
+ <route type="mix" sink="USB Host Out"
+ sources="usb_accessory output"/>
+ </routes>
+ </module>
+ <!-- Remote Submix Audio HAL -->
+ <xi:include href="r_submix_audio_policy_configuration.xml"/>
+ </modules>
+ <!-- End of Modules section -->
+ <!-- Volume section -->
+ <xi:include href="audio_policy_volumes.xml"/>
+ <xi:include href="default_volume_tables.xml"/>
+ <!-- End of Volume section -->
+</audioPolicyConfiguration>
diff --git a/audio/whitefin/config/audio_policy_configuration_a2dp_offload_disabled.xml b/audio/whitefin/config/audio_policy_configuration_a2dp_offload_disabled.xml
new file mode 100644
index 0000000..86ccf13
--- /dev/null
+++ b/audio/whitefin/config/audio_policy_configuration_a2dp_offload_disabled.xml
@@ -0,0 +1,145 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<!-- Copyright (C) 2020 The Android Open Source Project
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+ http://www.apache.org/licenses/LICENSE-2.0
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+-->
+<audioPolicyConfiguration version="1.0" xmlns:xi="http://www.w3.org/2001/XInclude">
+ <globalConfiguration speaker_drc_enabled="false"/>
+ <modules>
+ <!-- Primary Audio HAL -->
+ <module name="primary" halVersion="2.0">
+ <attachedDevices>
+ <item>Speaker</item>
+ <item>Speaker Safe</item>
+ <item>Earpiece</item>
+ <item>Built-In Mic</item>
+ </attachedDevices>
+ <defaultOutputDevice>Speaker</defaultOutputDevice>
+ <mixPorts>
+ <mixPort name="primary output" role="source" flags="AUDIO_OUTPUT_FLAG_PRIMARY|AUDIO_OUTPUT_FLAG_FAST">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ <mixPort name="deep buffer" role="source" flags="AUDIO_OUTPUT_FLAG_DEEP_BUFFER">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ <mixPort name="compressed_offload" role="source"
+ flags="AUDIO_OUTPUT_FLAG_DIRECT|AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD|AUDIO_OUTPUT_FLAG_NON_BLOCKING">
+ <profile name="" format="AUDIO_FORMAT_MP3"
+ samplingRates="8000,11025,12000,16000,22050,24000,32000,44100,48000"
+ channelMasks="AUDIO_CHANNEL_OUT_STEREO,AUDIO_CHANNEL_OUT_MONO"/>
+ </mixPort>
+ <mixPort name="raw" role="source" flags="AUDIO_OUTPUT_FLAG_RAW|AUDIO_OUTPUT_FLAG_FAST">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ <mixPort name="primary input" role="sink">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000"
+ channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+ </mixPort>
+ <mixPort name="hotword input" role="sink" flags="AUDIO_INPUT_FLAG_HW_HOTWORD" maxActiveCount="0" >
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="8000,11025,12000,16000,22050,24000,32000,44100,48000"
+ channelMasks="AUDIO_CHANNEL_IN_MONO,AUDIO_CHANNEL_IN_STEREO"/>
+ </mixPort>
+ </mixPorts>
+ <devicePorts>
+ <!-- Output devices declaration, i.e. Sink DEVICE PORT -->
+ <devicePort tagName="Earpiece" type="AUDIO_DEVICE_OUT_EARPIECE" role="sink">
+ </devicePort>
+ <devicePort tagName="Speaker" role="sink" type="AUDIO_DEVICE_OUT_SPEAKER">
+ </devicePort>
+ <devicePort tagName="Speaker Safe" type="AUDIO_DEVICE_OUT_SPEAKER_SAFE" role="sink">
+ </devicePort>
+ <devicePort tagName="Wired Headset" type="AUDIO_DEVICE_OUT_WIRED_HEADSET" role="sink">
+ </devicePort>
+ <devicePort tagName="Wired Headphones" type="AUDIO_DEVICE_OUT_WIRED_HEADPHONE" role="sink">
+ </devicePort>
+ <devicePort tagName="BT SCO" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO" role="sink">
+ </devicePort>
+ <devicePort tagName="BT SCO Headset" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_HEADSET" role="sink">
+ </devicePort>
+ <devicePort tagName="BT SCO Car Kit" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_CARKIT" role="sink">
+ </devicePort>
+ <devicePort tagName="USB Device Out" type="AUDIO_DEVICE_OUT_USB_DEVICE" role="sink">
+ </devicePort>
+ <devicePort tagName="USB Headset Out" type="AUDIO_DEVICE_OUT_USB_HEADSET" role="sink">
+ </devicePort>
+ <devicePort tagName="Aux Digital" type="AUDIO_DEVICE_OUT_AUX_DIGITAL" role="sink">
+ </devicePort>
+ <devicePort tagName="Built-In Mic" type="AUDIO_DEVICE_IN_BUILTIN_MIC" role="source">
+ </devicePort>
+ <devicePort tagName="Built-In Back Mic" type="AUDIO_DEVICE_IN_BACK_MIC" role="source">
+ </devicePort>
+ <devicePort tagName="Wired Headset Mic" type="AUDIO_DEVICE_IN_WIRED_HEADSET" role="source">
+ </devicePort>
+ <devicePort tagName="BT SCO Headset Mic" type="AUDIO_DEVICE_IN_BLUETOOTH_SCO_HEADSET" role="source">
+ </devicePort>
+ <devicePort tagName="USB Device In" type="AUDIO_DEVICE_IN_USB_DEVICE" role="source">
+ </devicePort>
+ <devicePort tagName="USB Headset In" type="AUDIO_DEVICE_IN_USB_HEADSET" role="source">
+ </devicePort>
+ </devicePorts>
+ <!-- route declaration, i.e. list all available sources for a given sink -->
+ <routes>
+ <route type="mix" sink="Speaker"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="Speaker Safe"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="Earpiece"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="primary input"
+ sources="Built-In Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+ <route type="mix" sink="hotword input"
+ sources="Built-In Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+ <route type="mix" sink="USB Device Out"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="USB Headset Out"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="BT SCO"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="BT SCO Headset"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="BT SCO Car Kit"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ </routes>
+ </module>
+ <!-- Bluetooth Audio HAL -->
+ <xi:include href="bluetooth_audio_policy_configuration.xml"/>
+ <!-- Usb Audio HAL -->
+ <module name="usb" halVersion="2.0">
+ <mixPorts>
+ <mixPort name="usb_accessory output" role="source">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ </mixPorts>
+ <devicePorts>
+ <devicePort tagName="USB Host Out" type="AUDIO_DEVICE_OUT_USB_ACCESSORY" role="sink">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </devicePort>
+ </devicePorts>
+ <routes>
+ <route type="mix" sink="USB Host Out"
+ sources="usb_accessory output"/>
+ </routes>
+ </module>
+ <!-- Remote Submix Audio HAL -->
+ <xi:include href="r_submix_audio_policy_configuration.xml"/>
+ </modules>
+ <!-- End of Modules section -->
+ <!-- Volume section -->
+ <xi:include href="audio_policy_volumes.xml"/>
+ <xi:include href="default_volume_tables.xml"/>
+ <!-- End of Volume section -->
+</audioPolicyConfiguration>
diff --git a/audio/whitefin/config/audio_policy_configuration_bluetooth_legacy_hal.xml b/audio/whitefin/config/audio_policy_configuration_bluetooth_legacy_hal.xml
new file mode 100644
index 0000000..ece3466
--- /dev/null
+++ b/audio/whitefin/config/audio_policy_configuration_bluetooth_legacy_hal.xml
@@ -0,0 +1,145 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<!-- Copyright (C) 2020 The Android Open Source Project
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+ http://www.apache.org/licenses/LICENSE-2.0
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+-->
+<audioPolicyConfiguration version="1.0" xmlns:xi="http://www.w3.org/2001/XInclude">
+ <globalConfiguration speaker_drc_enabled="false"/>
+ <modules>
+ <!-- Primary Audio HAL -->
+ <module name="primary" halVersion="2.0">
+ <attachedDevices>
+ <item>Speaker</item>
+ <item>Speaker Safe</item>
+ <item>Earpiece</item>
+ <item>Built-In Mic</item>
+ </attachedDevices>
+ <defaultOutputDevice>Speaker</defaultOutputDevice>
+ <mixPorts>
+ <mixPort name="primary output" role="source" flags="AUDIO_OUTPUT_FLAG_PRIMARY|AUDIO_OUTPUT_FLAG_FAST">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ <mixPort name="deep buffer" role="source" flags="AUDIO_OUTPUT_FLAG_DEEP_BUFFER">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ <mixPort name="compressed_offload" role="source"
+ flags="AUDIO_OUTPUT_FLAG_DIRECT|AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD|AUDIO_OUTPUT_FLAG_NON_BLOCKING">
+ <profile name="" format="AUDIO_FORMAT_MP3"
+ samplingRates="8000,11025,12000,16000,22050,24000,32000,44100,48000"
+ channelMasks="AUDIO_CHANNEL_OUT_STEREO,AUDIO_CHANNEL_OUT_MONO"/>
+ </mixPort>
+ <mixPort name="raw" role="source" flags="AUDIO_OUTPUT_FLAG_RAW|AUDIO_OUTPUT_FLAG_FAST">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ <mixPort name="primary input" role="sink">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="48000"
+ channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+ </mixPort>
+ <mixPort name="hotword input" role="sink" flags="AUDIO_INPUT_FLAG_HW_HOTWORD" maxActiveCount="0" >
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="8000,11025,12000,16000,22050,24000,32000,44100,48000"
+ channelMasks="AUDIO_CHANNEL_IN_MONO,AUDIO_CHANNEL_IN_STEREO"/>
+ </mixPort>
+ </mixPorts>
+ <devicePorts>
+ <!-- Output devices declaration, i.e. Sink DEVICE PORT -->
+ <devicePort tagName="Earpiece" type="AUDIO_DEVICE_OUT_EARPIECE" role="sink">
+ </devicePort>
+ <devicePort tagName="Speaker" role="sink" type="AUDIO_DEVICE_OUT_SPEAKER">
+ </devicePort>
+ <devicePort tagName="Speaker Safe" type="AUDIO_DEVICE_OUT_SPEAKER_SAFE" role="sink">
+ </devicePort>
+ <devicePort tagName="Wired Headset" type="AUDIO_DEVICE_OUT_WIRED_HEADSET" role="sink">
+ </devicePort>
+ <devicePort tagName="Wired Headphones" type="AUDIO_DEVICE_OUT_WIRED_HEADPHONE" role="sink">
+ </devicePort>
+ <devicePort tagName="BT SCO" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO" role="sink">
+ </devicePort>
+ <devicePort tagName="BT SCO Headset" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_HEADSET" role="sink">
+ </devicePort>
+ <devicePort tagName="BT SCO Car Kit" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_CARKIT" role="sink">
+ </devicePort>
+ <devicePort tagName="USB Device Out" type="AUDIO_DEVICE_OUT_USB_DEVICE" role="sink">
+ </devicePort>
+ <devicePort tagName="USB Headset Out" type="AUDIO_DEVICE_OUT_USB_HEADSET" role="sink">
+ </devicePort>
+ <devicePort tagName="Aux Digital" type="AUDIO_DEVICE_OUT_AUX_DIGITAL" role="sink">
+ </devicePort>
+ <devicePort tagName="Built-In Mic" type="AUDIO_DEVICE_IN_BUILTIN_MIC" role="source">
+ </devicePort>
+ <devicePort tagName="Built-In Back Mic" type="AUDIO_DEVICE_IN_BACK_MIC" role="source">
+ </devicePort>
+ <devicePort tagName="Wired Headset Mic" type="AUDIO_DEVICE_IN_WIRED_HEADSET" role="source">
+ </devicePort>
+ <devicePort tagName="BT SCO Headset Mic" type="AUDIO_DEVICE_IN_BLUETOOTH_SCO_HEADSET" role="source">
+ </devicePort>
+ <devicePort tagName="USB Device In" type="AUDIO_DEVICE_IN_USB_DEVICE" role="source">
+ </devicePort>
+ <devicePort tagName="USB Headset In" type="AUDIO_DEVICE_IN_USB_HEADSET" role="source">
+ </devicePort>
+ </devicePorts>
+ <!-- route declaration, i.e. list all available sources for a given sink -->
+ <routes>
+ <route type="mix" sink="Speaker"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="Speaker Safe"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="Earpiece"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="primary input"
+ sources="Built-In Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+ <route type="mix" sink="hotword input"
+ sources="Built-In Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+ <route type="mix" sink="USB Device Out"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="USB Headset Out"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="BT SCO"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="BT SCO Headset"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ <route type="mix" sink="BT SCO Car Kit"
+ sources="primary output,deep buffer,raw,compressed_offload"/>
+ </routes>
+ </module>
+ <!-- A2dp Audio HAL -->
+ <xi:include href="a2dp_audio_policy_configuration.xml"/>
+ <!-- Usb Audio HAL -->
+ <module name="usb" halVersion="2.0">
+ <mixPorts>
+ <mixPort name="usb_accessory output" role="source">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </mixPort>
+ </mixPorts>
+ <devicePorts>
+ <devicePort tagName="USB Host Out" type="AUDIO_DEVICE_OUT_USB_ACCESSORY" role="sink">
+ <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+ samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+ </devicePort>
+ </devicePorts>
+ <routes>
+ <route type="mix" sink="USB Host Out"
+ sources="usb_accessory output"/>
+ </routes>
+ </module>
+ <!-- Remote Submix Audio HAL -->
+ <xi:include href="r_submix_audio_policy_configuration.xml"/>
+ </modules>
+ <!-- End of Modules section -->
+ <!-- Volume section -->
+ <xi:include href="audio_policy_volumes.xml"/>
+ <xi:include href="default_volume_tables.xml"/>
+ <!-- End of Volume section -->
+</audioPolicyConfiguration>
diff --git a/audio/whitefin/config/mixer_paths.xml b/audio/whitefin/config/mixer_paths.xml
new file mode 100644
index 0000000..ea557c9
--- /dev/null
+++ b/audio/whitefin/config/mixer_paths.xml
@@ -0,0 +1,783 @@
+<?xml version="1.0" encoding="ISO-8859-1"?>
+<!-- Copyright (c) 2019, The Linux Foundation. All rights reserved. -->
+<!-- -->
+<!-- Redistribution and use in source and binary forms, with or without -->
+<!-- modification, are permitted provided that the following conditions are -->
+<!-- met: -->
+<!-- * Redistributions of source code must retain the above copyright -->
+<!-- notice, this list of conditions and the following disclaimer. -->
+<!-- * Redistributions in binary form must reproduce the above -->
+<!-- copyright notice, this list of conditions and the following -->
+<!-- disclaimer in the documentation and/or other materials provided -->
+<!-- with the distribution. -->
+<!-- * Neither the name of The Linux Foundation nor the names of its -->
+<!-- contributors may be used to endorse or promote products derived -->
+<!-- from this software without specific prior written permission. -->
+<!-- -->
+<!-- THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED -->
+<!-- WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -->
+<!-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT -->
+<!-- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS -->
+<!-- BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -->
+<!-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -->
+<!-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR -->
+<!-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -->
+<!-- OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN -->
+<!-- IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -->
+<mixer>
+ <!-- Initial default value of ALSA command -->
+ <!-- TDM 0 setting -->
+ <ctl name="TDM_0_RX Chan" value="Four"/>
+ <ctl name="TDM_0_RX Format" value="S32_LE"/>
+ <ctl name="TDM_0_TX Chan" value="Four"/>
+ <ctl name="TDM_0_TX Format" value="S32_LE"/>
+
+ <!-- Cirrus Booster Amp TDM slot assignment-->
+ <!-- RX slot -->
+ <ctl name="ASPRX1 Slot Position" value="0"/>
+ <ctl name="ASPRX2 Slot Position" value="1"/>
+ <ctl name="R ASPRX1 Slot Position" value="1"/>
+ <ctl name="R ASPRX2 Slot Position" value="0"/>
+
+ <!-- TX slot -->
+ <ctl name="ASPTX1 Slot Position" value="0"/>
+ <ctl name="R ASPTX1 Slot Position" value="1"/>
+ <ctl name="ASPTX2 Slot Position" value="2"/>
+ <ctl name="R ASPTX2 Slot Position" value="3"/>
+ <ctl name="ASPTX3 Slot Position" value="4"/>
+ <ctl name="R ASPTX3 Slot Position" value="5"/>
+ <ctl name="ASPTX4 Slot Position" value="6"/>
+ <ctl name="R ASPTX4 Slot Position" value="7"/>
+
+ <!-- Cirrus Booster Amp DRE and VBST config-->
+ <ctl name="VBSTMON Output Switch" value="1"/>
+ <ctl name="R VBSTMON Output Switch" value="1"/>
+ <ctl name="DRE DRE Switch" value="1"/>
+ <ctl name="R DRE DRE Switch" value="1"/>
+
+ <!-- Cirrus Booster Amp Output Gain -->
+ <ctl name="AMP PCM Gain" value="17"/>
+ <ctl name="R AMP PCM Gain" value="17"/>
+ <ctl name="Digital PCM Volume" value="817"/>
+ <ctl name="R Digital PCM Volume" value="817"/>
+
+ <!-- Cirrus Booster Amp Power -->
+ <ctl name="Main AMP Enable Switch" value="0"/>
+ <ctl name="R Main AMP Enable Switch" value="0"/>
+
+ <!-- Cirrus Booster mode -->
+ <ctl name="PCM Source" value="DSP"/>
+ <ctl name="R PCM Source" value="DSP"/>
+ <ctl name="DSP1 Firmware" value="Protection"/>
+ <ctl name="R DSP1 Firmware" value="Protection"/>
+ <ctl name="DSP RX1 Source" value="ASPRX1"/>
+ <ctl name="DSP RX2 Source" value="ASPRX1"/>
+ <ctl name="R DSP RX1 Source" value="ASPRX1"/>
+ <ctl name="R DSP RX2 Source" value="ASPRX1"/>
+
+ <!-- Cirrus ASP TX source -->
+ <ctl name="ASP TX1 Source" value="VMON" />
+ <ctl name="R ASP TX1 Source" value="VMON" />
+ <ctl name="ASP TX2 Source" value="IMON" />
+ <ctl name="R ASP TX2 Source" value="IMON" />
+ <ctl name="ASP TX3 Source" value="Zero" />
+ <ctl name="R ASP TX3 Source" value="Zero" />
+ <ctl name="ASP TX4 Source" value="Zero" />
+ <ctl name="R ASP TX4 Source" value="Zero" />
+
+ <!-- default EP volume -->
+ <ctl name="PCM Playback Switch" value="1"/>
+ <ctl name="PCM Playback Volume" value="10"/>
+
+ <!-- audio RX route initial/default value -->
+ <ctl name="TDM_0_RX Mixer EP1" value="0"/>
+ <ctl name="TDM_0_RX Mixer EP2" value="0"/>
+ <ctl name="TDM_0_RX Mixer EP3" value="0"/>
+ <ctl name="TDM_0_RX Mixer EP4" value="0"/>
+ <ctl name="TDM_0_RX Mixer EP5" value="0"/>
+ <ctl name="TDM_0_RX Mixer EP6" value="0"/>
+ <ctl name="TDM_0_RX Mixer EP7" value="0"/>
+ <ctl name="TDM_0_RX Mixer EP8" value="0"/>
+ <ctl name="TDM_0_RX Mixer NoHost1" value="0"/>
+
+ <ctl name="TDM_1_RX Mixer EP1" value="0"/>
+ <ctl name="TDM_1_RX Mixer EP2" value="0"/>
+ <ctl name="TDM_1_RX Mixer EP3" value="0"/>
+ <ctl name="TDM_1_RX Mixer EP4" value="0"/>
+ <ctl name="TDM_1_RX Mixer EP5" value="0"/>
+ <ctl name="TDM_1_RX Mixer EP6" value="0"/>
+ <ctl name="TDM_1_RX Mixer EP7" value="0"/>
+ <ctl name="TDM_1_RX Mixer EP8" value="0"/>
+ <ctl name="TDM_1_RX Mixer NoHost1" value="0"/>
+
+ <ctl name="USB_RX Mixer EP1" value="0"/>
+ <ctl name="USB_RX Mixer EP2" value="0"/>
+ <ctl name="USB_RX Mixer EP3" value="0"/>
+ <ctl name="USB_RX Mixer EP4" value="0"/>
+ <ctl name="USB_RX Mixer EP5" value="0"/>
+ <ctl name="USB_RX Mixer EP6" value="0"/>
+ <ctl name="USB_RX Mixer EP7" value="0"/>
+ <ctl name="USB_RX Mixer NoHost1" value="0"/>
+
+ <ctl name="BT_RX Mixer EP1" value="0"/>
+ <ctl name="BT_RX Mixer EP2" value="0"/>
+ <ctl name="BT_RX Mixer EP3" value="0"/>
+ <ctl name="BT_RX Mixer EP4" value="0"/>
+ <ctl name="BT_RX Mixer EP5" value="0"/>
+ <ctl name="BT_RX Mixer EP6" value="0"/>
+ <ctl name="BT_RX Mixer EP7" value="0"/>
+ <ctl name="BT_RX Mixer NoHost1" value="0"/>
+
+ <ctl name="SINK_IDS" id="0" value="-1"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+
+ <!-- audio TX route initial/default value -->
+ <ctl name="EP1 TX Mixer TDM_0_TX" value="0"/>
+ <ctl name="EP2 TX Mixer TDM_0_TX" value="0"/>
+ <ctl name="EP3 TX Mixer TDM_0_TX" value="0"/>
+ <ctl name="EP4 TX Mixer TDM_0_TX" value="0"/>
+ <ctl name="EP5 TX Mixer TDM_0_TX" value="0"/>
+ <ctl name="EP6 TX Mixer TDM_0_TX" value="0"/>
+ <ctl name="NoHost1 TX Mixer TDM_0_TX" value="0"/>
+
+ <ctl name="EP1 TX Mixer TDM_1_TX" value="0"/>
+ <ctl name="EP2 TX Mixer TDM_1_TX" value="0"/>
+ <ctl name="EP3 TX Mixer TDM_1_TX" value="0"/>
+ <ctl name="EP4 TX Mixer TDM_1_TX" value="0"/>
+ <ctl name="EP5 TX Mixer TDM_1_TX" value="0"/>
+ <ctl name="EP6 TX Mixer TDM_1_TX" value="0"/>
+ <ctl name="NoHost1 TX Mixer TDM_1_TX" value="0"/>
+
+ <ctl name="EP1 TX Mixer INTERNAL_MIC_TX" value="0"/>
+ <ctl name="EP2 TX Mixer INTERNAL_MIC_TX" value="0"/>
+ <ctl name="EP3 TX Mixer INTERNAL_MIC_TX" value="0"/>
+ <ctl name="EP4 TX Mixer INTERNAL_MIC_TX" value="0"/>
+ <ctl name="EP5 TX Mixer INTERNAL_MIC_TX" value="0"/>
+ <ctl name="EP6 TX Mixer INTERNAL_MIC_TX" value="0"/>
+ <ctl name="NoHost1 TX Mixer INTERNAL_MIC_TX" value="0"/>
+
+ <ctl name="EP1 TX Mixer BT_TX" value="0"/>
+ <ctl name="EP2 TX Mixer BT_TX" value="0"/>
+ <ctl name="EP3 TX Mixer BT_TX" value="0"/>
+ <ctl name="EP4 TX Mixer BT_TX" value="0"/>
+ <ctl name="EP5 TX Mixer BT_TX" value="0"/>
+ <ctl name="EP6 TX Mixer BT_TX" value="0"/>
+ <ctl name="NoHost1 TX Mixer BT_TX" value="0"/>
+
+ <ctl name="EP1 TX Mixer USB_TX" value="0"/>
+ <ctl name="EP2 TX Mixer USB_TX" value="0"/>
+ <ctl name="EP3 TX Mixer USB_TX" value="0"/>
+ <ctl name="EP4 TX Mixer USB_TX" value="0"/>
+ <ctl name="EP5 TX Mixer USB_TX" value="0"/>
+ <ctl name="EP6 TX Mixer USB_TX" value="0"/>
+ <ctl name="NoHost1 TX Mixer USB_TX" value="0"/>
+
+ <ctl name="EP4 TX Mixer I2S_2_TX" value="0"/>
+
+ <!-- USB setting -->
+ <ctl name="USB Dev ID" value="1"/>
+ <ctl name="USB Playback EP ID" value="1"/>
+ <ctl name="USB Playback SR" value="48000"/>
+ <ctl name="USB Playback CH" value="2"/>
+ <ctl name="USB Playback BW" value="24"/>
+ <ctl name="USB Capture EP ID" value="1"/>
+ <ctl name="USB Capture SR" value="48000"/>
+ <ctl name="USB Capture CH" value="1"/>
+ <ctl name="USB Capture BW" value="16"/>
+
+ <ctl name="AoC Modem Downlink ASRC Mode" value="ASP_ON"/>
+ <ctl name="Voice Call Mic Source" value="Builtin_MIC"/>
+ <ctl name="Mic Spatial Module Enable" value="0"/>
+
+ <!-- audio PDM mic default state -->
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="-1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+ <ctl name="Audio Capture Mic Source" value="Builtin_MIC"/>
+
+ <!-- sidetone controls -->
+ <ctl name="Sidetone Enable" value="0"/>
+ <ctl name="Sidetone Volume" value="-96"/>
+ <ctl name="Sidetone Selected Mic" value="0"/>
+ <ctl name="Sidetone EQ Stage Number" value="1"/>
+ <!-- IEEE 754, value is in float -->
+ <ctl name="Sidetone Biquad0" id="0" value="0"/>
+ <ctl name="Sidetone Biquad0" id="1" value="0"/>
+ <ctl name="Sidetone Biquad0" id="2" value="0"/>
+ <ctl name="Sidetone Biquad0" id="3" value="0"/>
+ <ctl name="Sidetone Biquad0" id="4" value="0"/>
+ <ctl name="Sidetone Biquad0" id="5" value="0"/>
+ <ctl name="Sidetone Biquad1" id="0" value="0"/>
+ <ctl name="Sidetone Biquad1" id="1" value="0"/>
+ <ctl name="Sidetone Biquad1" id="2" value="0"/>
+ <ctl name="Sidetone Biquad1" id="3" value="0"/>
+ <ctl name="Sidetone Biquad1" id="4" value="0"/>
+ <ctl name="Sidetone Biquad1" id="5" value="0"/>
+ <ctl name="Sidetone Biquad2" id="0" value="0"/>
+ <ctl name="Sidetone Biquad2" id="1" value="0"/>
+ <ctl name="Sidetone Biquad2" id="2" value="0"/>
+ <ctl name="Sidetone Biquad2" id="3" value="0"/>
+ <ctl name="Sidetone Biquad2" id="4" value="0"/>
+ <ctl name="Sidetone Biquad2" id="5" value="0"/>
+ <ctl name="Sidetone Biquad3" id="0" value="0"/>
+ <ctl name="Sidetone Biquad3" id="1" value="0"/>
+ <ctl name="Sidetone Biquad3" id="2" value="0"/>
+ <ctl name="Sidetone Biquad3" id="3" value="0"/>
+ <ctl name="Sidetone Biquad3" id="4" value="0"/>
+ <ctl name="Sidetone Biquad3" id="5" value="0"/>
+ <ctl name="Sidetone Biquad4" id="0" value="0"/>
+ <ctl name="Sidetone Biquad4" id="1" value="0"/>
+ <ctl name="Sidetone Biquad4" id="2" value="0"/>
+ <ctl name="Sidetone Biquad4" id="3" value="0"/>
+ <ctl name="Sidetone Biquad4" id="4" value="0"/>
+ <ctl name="Sidetone Biquad4" id="5" value="0"/>
+
+ <ctl name="Incall Capture Stream0" value="Off"/>
+ <ctl name="Incall Capture Stream1" value="Off"/>
+ <ctl name="Incall Capture Stream2" value="Off"/>
+
+ <!-- sidetone dynamic control -->
+ <path name="sidetone-for handset">
+ <!-- 1065353216 = 0x3f800000 = 1.0 -->
+ <ctl name="Sidetone Biquad0" id="0" value="1065353216"/>
+ <ctl name="Sidetone Biquad0" id="1" value="1065353216"/>
+ <ctl name="Sidetone Biquad0" id="2" value="0"/>
+ <ctl name="Sidetone Biquad0" id="3" value="0"/>
+ <ctl name="Sidetone Biquad0" id="4" value="0"/>
+ <ctl name="Sidetone Biquad0" id="5" value="0"/>
+ <ctl name="Sidetone Biquad1" id="0" value="1065353216"/>
+ <ctl name="Sidetone Biquad1" id="1" value="1065353216"/>
+ <ctl name="Sidetone Biquad1" id="2" value="0"/>
+ <ctl name="Sidetone Biquad1" id="3" value="0"/>
+ <ctl name="Sidetone Biquad1" id="4" value="0"/>
+ <ctl name="Sidetone Biquad1" id="5" value="0"/>
+ <ctl name="Sidetone Biquad2" id="0" value="1065353216"/>
+ <ctl name="Sidetone Biquad2" id="1" value="1065353216"/>
+ <ctl name="Sidetone Biquad2" id="2" value="0"/>
+ <ctl name="Sidetone Biquad2" id="3" value="0"/>
+ <ctl name="Sidetone Biquad2" id="4" value="0"/>
+ <ctl name="Sidetone Biquad2" id="5" value="0"/>
+ <ctl name="Sidetone Biquad3" id="0" value="1065353216"/>
+ <ctl name="Sidetone Biquad3" id="1" value="1065353216"/>
+ <ctl name="Sidetone Biquad3" id="2" value="0"/>
+ <ctl name="Sidetone Biquad3" id="3" value="0"/>
+ <ctl name="Sidetone Biquad3" id="4" value="0"/>
+ <ctl name="Sidetone Biquad3" id="5" value="0"/>
+ <ctl name="Sidetone Biquad4" id="0" value="1065353216"/>
+ <ctl name="Sidetone Biquad4" id="1" value="1065353216"/>
+ <ctl name="Sidetone Biquad4" id="2" value="0"/>
+ <ctl name="Sidetone Biquad4" id="3" value="0"/>
+ <ctl name="Sidetone Biquad4" id="4" value="0"/>
+ <ctl name="Sidetone Biquad4" id="5" value="0"/>
+ <ctl name="Sidetone EQ Stage Number" value="5"/>
+ <ctl name="Sidetone Volume" value="-90"/>
+ <ctl name="Sidetone Enable" value="1"/>
+ </path>
+
+ <!-- audio playback dynamic route -->
+ <path name="deep-buffer-playbackP">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="0"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="TDM_0_RX Mixer EP6" value="1"/>
+ </path>
+
+ <path name="deep-buffer-playbackP hac-handset">
+ </path>
+
+ <path name="deep-buffer-playbackP bt">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="2"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="BT_RX Mixer EP6" value="1"/>
+ </path>
+
+ <path name="deep-buffer-playbackP usb-headphone">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="4"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="USB_RX Mixer EP6" value="1"/>
+ </path>
+
+ <path name="deep-buffer-playbackP usb-tty-full">
+ </path>
+
+ <path name="deep-buffer-playbackP usb-tty-hco">
+ </path>
+
+ <path name="deep-buffer-playbackP usb-tty-vco">
+ </path>
+
+ <path name="deep-buffer-playbackP hearing-aid">
+ </path>
+
+ <path name="low-latency-playbackP">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="0"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="TDM_0_RX Mixer EP2" value="1"/>
+ </path>
+
+ <path name="low-latency-playbackP hac-handset">
+ </path>
+
+ <path name="low-latency-playbackP bt">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="2"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="BT_RX Mixer EP2" value="1"/>
+ </path>
+
+ <path name="low-latency-playbackP usb-headphone">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="4"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="USB_RX Mixer EP2" value="1"/>
+ </path>
+
+ <path name="low-latency-playbackP usb-tty-full">
+ </path>
+
+ <path name="low-latency-playbackP usb-tty-hco">
+ </path>
+
+ <path name="low-latency-playbackP usb-tty-vco">
+ </path>
+
+ <path name="low-latency-playbackP hearing-aid">
+ </path>
+
+ <path name="raw-playbackP">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="0"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="TDM_0_RX Mixer EP1" value="1"/>
+ </path>
+
+ <path name="raw-playbackP hac-handset">
+ </path>
+
+ <path name="raw-playbackP bt">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="2"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="BT_RX Mixer EP1" value="1"/>
+ </path>
+
+ <path name="raw-playbackP usb-headphone">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="4"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="USB_RX Mixer EP1" value="1"/>
+ </path>
+
+ <path name="raw-playbackP usb-tty-full">
+ </path>
+
+ <path name="raw-playbackP usb-tty-hco">
+ </path>
+
+ <path name="raw-playbackP usb-tty-vco">
+ </path>
+
+ <path name="raw-playbackP hearing-aid">
+ </path>
+
+ <path name="compress-offload-playbackP">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="0"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="TDM_0_RX Mixer EP7" value="1"/>
+ </path>
+
+ <path name="compress-offload-playbackP hac-handset">
+ </path>
+
+ <path name="compress-offload-playbackP bt">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="2"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="BT_RX Mixer EP7" value="1"/>
+ </path>
+
+ <path name="compress-offload-playbackP usb-headphone">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="4"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="USB_RX Mixer EP7" value="1"/>
+ </path>
+
+ <path name="compress-offload-playbackP usb-tty-full">
+ </path>
+
+ <path name="compress-offload-playbackP usb-tty-hco">
+ </path>
+
+ <path name="compress-offload-playbackP usb-tty-vco">
+ </path>
+
+ <path name="compress-offload-playbackP hearing-aid">
+ </path>
+
+ <path name="voip-playbackP">
+ </path>
+
+ <path name="voip-playbackP hac-handset">
+ </path>
+
+ <path name="voip-playbackP bt">
+ </path>
+
+ <path name="voip-playbackP usb-headphone">
+ </path>
+
+ <path name="voip-playbackP usb-tty-full">
+ </path>
+
+ <path name="voip-playbackP usb-tty-hco">
+ </path>
+
+ <path name="voip-playbackP usb-tty-vco">
+ </path>
+
+ <path name="voip-playbackP hearing-aid">
+ </path>
+
+ <path name="haptic-audioP">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="0"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="TDM_0_RX Mixer EP3" value="1"/>
+ <ctl name="TDM_0_RX Mixer EP8" value="1"/>
+ </path>
+
+ <path name="haptic-audioP hac-handset">
+ </path>
+
+ <path name="haptic-audioP bt">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="2"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="BT_RX Mixer EP3" value="1"/>
+ <ctl name="TDM_0_RX Mixer EP8" value="1"/>
+ </path>
+
+ <path name="haptic-audioP usb-headphone">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="4"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="USB_RX Mixer EP3" value="1"/>
+ <ctl name="TDM_0_RX Mixer EP8" value="1"/>
+ </path>
+
+ <!-- audio capture dynamic route -->
+ <path name="audio-recordC">
+ <ctl name="EP1 TX Mixer INTERNAL_MIC_TX" value="1"/>
+ </path>
+
+ <path name="audio-recordC usb-headset-mic">
+ <ctl name="Audio Capture Mic Source" value="USB_MIC"/>
+ <ctl name="EP1 TX Mixer USB_TX" value="1"/>
+ </path>
+
+ <path name="audio-recordC bt-mic">
+ <ctl name="EP1 TX Mixer BT_TX" value="1"/>
+ </path>
+
+ <path name="audio-recordC usb-tty-full-mic">
+ </path>
+
+ <path name="audio-recordC usb-tty-hco-mic">
+ </path>
+
+ <path name="audio-recordC usb-tty-vco-mic">
+ </path>
+
+ <path name="voip-recordC">
+ </path>
+
+ <path name="voip-recordC usb-headset-mic">
+ </path>
+
+ <path name="voip-recordC bt-mic">
+ </path>
+
+ <path name="voip-recordC usb-tty-full-mic">
+ </path>
+
+ <path name="voip-recordC usb-tty-hco-mic">
+ </path>
+
+ <path name="voip-recordC usb-tty-vco-mic">
+ </path>
+
+ <!-- voice-call dynamic route -->
+ <path name="voice-callP">
+ <ctl name="TDM_0_RX Mixer EP5" value="1"/>
+ </path>
+
+ <path name="voice-callP bt">
+ <ctl name="BT_RX Mixer EP5" value="1"/>
+ </path>
+
+ <path name="voice-callP usb-headphone">
+ <ctl name="USB_RX Mixer EP5" value="1"/>
+ </path>
+
+ <path name="voice-callP usb-tty-full">
+ </path>
+
+ <path name="voice-callP usb-tty-hco">
+ </path>
+
+ <path name="voice-callP usb-tty-vco">
+ </path>
+
+ <path name="voice-callP hearing-aid">
+ </path>
+
+ <path name="voice-callC">
+ <ctl name="EP4 TX Mixer INTERNAL_MIC_TX" value="1"/>
+ </path>
+
+ <path name="voice-callC usb-headset-mic">
+ <ctl name="AoC Modem Downlink ASRC Mode" value="ASP_OFF"/>
+ <ctl name="EP4 TX Mixer USB_TX" value="1"/>
+ </path>
+
+ <path name="voice-callC bt-mic">
+ <ctl name="EP4 TX Mixer BT_TX" value="1"/>
+ </path>
+
+ <path name="voice-callC usb-tty-full-mic">
+ </path>
+
+ <path name="voice-callC usb-tty-hco-mic">
+ </path>
+
+ <path name="voice-callC usb-tty-vco-mic">
+ </path>
+
+ <path name="hostless-ulC spk-vi">
+ <ctl name="NoHost1 TX Mixer TDM_0_TX" value="1"/>
+ </path>
+
+ <path name="telephony-rx-captureC">
+ <ctl name="Incall Capture Stream0" value="DL"/>
+ </path>
+
+ <path name="incall-capture1C uplink">
+ <ctl name="Incall Capture Stream1" value="UL"/>
+ </path>
+
+ <path name="incall-capture1C downlink">
+ <ctl name="Incall Capture Stream1" value="DL"/>
+ </path>
+
+ <path name="incall-capture1C call">
+ <ctl name="Incall Capture Stream1" value="UL_DL"/>
+ </path>
+
+ <path name="incall-capture2C uplink">
+ <ctl name="Incall Capture Stream2" value="UL"/>
+ </path>
+
+ <path name="incall-capture2C downlink">
+ <ctl name="Incall Capture Stream2" value="DL"/>
+ </path>
+
+ <path name="incall-capture2C call">
+ <ctl name="Incall Capture Stream2" value="UL_DL"/>
+ </path>
+
+ <!-- codec setting -->>
+ <!-- Rx device -->
+ <path name="handset">
+ <ctl name="AMP PCM Gain" value="5"/>
+ <ctl name="DSP RX2 Source" value="ASPRX2"/>
+ <ctl name="Main AMP Enable Switch" value="1"/>
+ </path>
+
+ <path name="voice-handset">
+ <ctl name="AMP PCM Gain" value="5"/>
+ <ctl name="DSP RX2 Source" value="ASPRX2"/>
+ <ctl name="Main AMP Enable Switch" value="1"/>
+ </path>
+
+ <path name="voice-hac-handset">
+ </path>
+
+ <path name="speaker">
+ <ctl name="Main AMP Enable Switch" value="1"/>
+ <ctl name="R Main AMP Enable Switch" value="1"/>
+ </path>
+
+ <path name="voice-speaker">
+ <ctl name="R DSP RX2 Source" value="ASPRX2"/>
+ <ctl name="R Main AMP Enable Switch" value="1"/>
+ </path>
+
+ <path name="speaker-safe">
+ <ctl name="R Main AMP Enable Switch" value="1"/>
+ </path>
+
+ <path name="usb-tty-full">
+ </path>
+
+ <path name="usb-tty-hco">
+ </path>
+
+ <path name="usb-tty-vco">
+ </path>
+
+ <!-- Tx device -->
+ <path name="handset-mic">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+ <ctl name="MIC Clock Rate" value="3072000"/>
+ <ctl name="MIC DC Blocker" value="1"/>
+ <ctl name="MIC0" value="1"/>
+ <ctl name="MIC HW Gain At High Power Mode (cB)" value="0"/>
+ </path>
+
+ <path name="voice-handset-mic">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+ <ctl name="MIC Clock Rate" value="3072000"/>
+ <ctl name="MIC DC Blocker" value="1"/>
+ <ctl name="MIC0" value="1"/>
+ <ctl name="MIC1" value="1"/>
+ <ctl name="MIC2" value="-1"/>
+ <ctl name="MIC HW Gain At High Power Mode (cB)" value="130"/>
+ </path>
+
+ <path name="speaker-mic">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+ <ctl name="MIC Clock Rate" value="3072000"/>
+ <ctl name="MIC DC Blocker" value="1"/>
+ <ctl name="MIC0" value="1"/>
+ <ctl name="MIC1" value="1"/>
+ <ctl name="MIC2" value="1"/>
+ <ctl name="MIC HW Gain At High Power Mode (cB)" value="0"/>
+ </path>
+
+ <path name="voice-speaker-mic">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+ <ctl name="MIC Clock Rate" value="3072000"/>
+ <ctl name="MIC DC Blocker" value="1"/>
+ <ctl name="MIC0" value="1"/>
+ <ctl name="MIC1" value="1"/>
+ <ctl name="MIC2" value="1"/>
+ <ctl name="MIC HW Gain At High Power Mode (cB)" value="130"/>
+ </path>
+
+ <path name="camcorder-mic">
+ <ctl name="Mic Spatial Module Enable" value="1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+ <ctl name="MIC Clock Rate" value="3072000"/>
+ <ctl name="MIC DC Blocker" value="1"/>
+ <ctl name="MIC0" value="1"/>
+ <ctl name="MIC1" value="1"/>
+ <ctl name="MIC2" value="1"/>
+ <ctl name="MIC HW Gain At High Power Mode (cB)" value="0"/>
+ </path>
+
+ <path name="voice-recog-mic">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+ <ctl name="MIC Clock Rate" value="3072000"/>
+ <ctl name="MIC DC Blocker" value="1"/>
+ <ctl name="MIC0" value="1"/>
+ <ctl name="MIC1" value="1"/>
+ <ctl name="MIC2" value="1"/>
+ <ctl name="MIC HW Gain At High Power Mode (cB)" value="220"/>
+ </path>
+
+ <path name="unprocessed-mic">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+ <ctl name="MIC Clock Rate" value="3072000"/>
+ <ctl name="MIC DC Blocker" value="1"/>
+ <ctl name="MIC0" value="1"/>
+ <ctl name="MIC HW Gain At High Power Mode (cB)" value="50"/>
+ </path>
+
+ <path name="unprocessed-dual-mic">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+ <ctl name="MIC Clock Rate" value="3072000"/>
+ <ctl name="MIC DC Blocker" value="1"/>
+ <ctl name="MIC0" value="1"/>
+ <ctl name="MIC1" value="1"/>
+ <ctl name="MIC HW Gain At High Power Mode (cB)" value="50"/>
+ </path>
+
+ <path name="unprocessed-triple-mic">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+ <ctl name="MIC Clock Rate" value="3072000"/>
+ <ctl name="MIC DC Blocker" value="1"/>
+ <ctl name="MIC0" value="1"/>
+ <ctl name="MIC1" value="1"/>
+ <ctl name="MIC2" value="1"/>
+ <ctl name="MIC HW Gain At High Power Mode (cB)" value="50"/>
+ </path>
+
+ <path name="bt-mic">
+ <ctl name="Voice Call Mic Source" value="BT_MIC"/>
+ </path>
+
+ <path name="usb-headset-mic">
+ <ctl name="Voice Call Mic Source" value="USB_MIC"/>
+ </path>
+
+ <path name="usb-tty-full-mic">
+ <path name="usb-headset-mic"/>
+ </path>
+
+ <path name="usb-tty-hco-mic">
+ <path name="usb-headset-mic"/>
+ </path>
+
+ <path name="usb-tty-vco-mic">
+ </path>
+
+ <path name="unprocessed-usb-headset-mic">
+ </path>
+
+ <!-- cs35l41 specific path to load firmware in cs35l41.c -->
+ <path name="cs35l41-load-protection-firmware-start">
+ <ctl name="DSP Booted" value="0" />
+ <ctl name="R DSP Booted" value="0" />
+ <ctl name="DSP1 Preload Switch" value="0" />
+ <ctl name="R DSP1 Preload Switch" value="0" />
+ </path>
+
+ <path name="cs35l41-load-protection-firmware-end">
+ <ctl name="DSP1 Preload Switch" value="1" />
+ <ctl name="R DSP1 Preload Switch" value="1" />
+ </path>
+ <!-- cs35l41 specific path to load firmware in cs35l41.c end-->
+</mixer>
diff --git a/audio/whitefin/config/mixer_paths_factory.xml b/audio/whitefin/config/mixer_paths_factory.xml
new file mode 100644
index 0000000..4441cbd
--- /dev/null
+++ b/audio/whitefin/config/mixer_paths_factory.xml
@@ -0,0 +1,291 @@
+<?xml version="1.0" encoding="ISO-8859-1"?>
+<mixer>
+ <ctl name="TDM_0_RX Mixer EP3" value="0" />
+ <ctl name="TDM_0_RX Mixer EP6" value="0" />
+ <ctl name="I2S_0_RX Mixer EP3" value="0" />
+ <ctl name="Main AMP Enable Switch" value="0" />
+ <ctl name="R Main AMP Enable Switch" value="0" />
+ <ctl name="SINK_IDS" id="0" value="-1" />
+ <ctl name="SINK_IDS" id="1" value="-1" />
+ <ctl name="MIC HW Gain At Lower Power Mode (cB)" value="-160" />
+ <ctl name="MIC HW Gain At High Power Mode (cB)" value="0" />
+
+ <ctl name="EP1 TX Mixer TDM_0_TX" value="0" />
+ <ctl name="DEFAULT_MIC_ID" value="0" />
+ <ctl name="MIC0" value="0" />
+ <ctl name="MIC1" value="0" />
+ <ctl name="MIC2" value="0" />
+ <ctl name="MIC3" value="0" />
+
+ <path name="mfg-playback">
+ <ctl name="PCM Playback Switch" value="1" />
+ <ctl name="PCM Playback Volume" value="1000" />
+ </path>
+
+ <path name="deep-buffer-playback speaker">
+ <ctl name="TDM_0_RX Mixer EP6" value="1" />
+ <path name="mfg-playback" />
+ </path>
+
+ <path name="deep-buffer-playback headphones">
+ <ctl name="I2S_0_RX Mixer EP6" value="1" />
+ <path name="mfg-playback" />
+ </path>
+
+ <path name="mfg-record">
+ <ctl name="EP1 TX Mixer TDM_0_TX" value="1" />
+ </path>
+
+ <path name="mic1-status">
+ <ctl name="MIC0" value="1" />
+ </path>
+
+ <path name="mic2-status">
+ <ctl name="MIC1" value="1" />
+ </path>
+
+ <path name="mic3-status">
+ <ctl name="MIC2" value="1" />
+ </path>
+
+ <path name="mic4-status">
+ <ctl name="MIC3" value="1" />
+ </path>
+
+ <path name="mic1-gain">
+ <ctl name="MIC HW Gain At Lower Power Mode (cB)" />
+ <ctl name="MIC HW Gain At High Power Mode (cB)" />
+ </path>
+
+ <path name="mic2-gain">
+ <ctl name="MIC HW Gain At Lower Power Mode (cB)" />
+ <ctl name="MIC HW Gain At High Power Mode (cB)" />
+ </path>
+
+ <path name="mic3-gain">
+ <ctl name="MIC HW Gain At Lower Power Mode (cB)" />
+ <ctl name="MIC HW Gain At High Power Mode (cB)" />
+ </path>
+
+ <path name="mic4-gain">
+ <ctl name="MIC HW Gain At Lower Power Mode (cB)" />
+ <ctl name="MIC HW Gain At High Power Mode (cB)" />
+ </path>
+
+ <path name="mic1-only">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1" />
+ <ctl name="MIC0" value="1" />
+ </path>
+
+ <path name="mic2-only">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="1" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1" />
+ <ctl name="MIC1" value="1" />
+ </path>
+
+ <path name="mic3-only">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="2" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1" />
+ <ctl name="MIC2" value="1" />
+ </path>
+
+ <path name="mic4-only">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="3" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1" />
+ <ctl name="MIC3" value="1" />
+ </path>
+
+ <path name="mic-all">
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2" />
+ <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="3" />
+ <ctl name="MIC0" value="1" />
+ <ctl name="MIC1" value="1" />
+ <ctl name="MIC2" value="1" />
+ <ctl name="MIC3" value="1" />
+ </path>
+
+ <path name="amp_iv-only">
+ <ctl name="R ASPTX1 Slot Position" value="2" />
+ <ctl name="R ASPTX2 Slot Position" value="3" />
+ <ctl name="R ASPTX3 Slot Position" value="6" />
+ <ctl name="R ASPTX4 Slot Position" value="7" />
+ <ctl name="ASPTX1 Slot Position" value="0" />
+ <ctl name="ASPTX2 Slot Position" value="1" />
+ <ctl name="ASPTX3 Slot Position" value="4" />
+ <ctl name="ASPTX4 Slot Position" value="5" />
+ <ctl name="R ASP TX1 Source" value="VMON" />
+ <ctl name="R ASP TX2 Source" value="ASPRX1" />
+ <ctl name="R ASP TX3 Source" value="Zero" />
+ <ctl name="R ASP TX4 Source" value="Zero" />
+ <ctl name="ASP TX1 Source" value="VMON" />
+ <ctl name="ASP TX2 Source" value="ASPRX1" />
+ <ctl name="ASP TX3 Source" value="Zero" />
+ <ctl name="ASP TX4 Source" value="Zero" />
+ <ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
+ </path>
+
+ <path name="amp_iv1-only">
+ <ctl name="R ASPTX1 Slot Position" value="4" />
+ <ctl name="R ASPTX2 Slot Position" value="5" />
+ <ctl name="R ASPTX3 Slot Position" value="6" />
+ <ctl name="R ASPTX4 Slot Position" value="7" />
+ <ctl name="ASPTX1 Slot Position" value="0" />
+ <ctl name="ASPTX2 Slot Position" value="1" />
+ <ctl name="ASPTX3 Slot Position" value="2" />
+ <ctl name="ASPTX4 Slot Position" value="3" />
+ <ctl name="R ASP TX1 Source" value="Zero" />
+ <ctl name="R ASP TX2 Source" value="Zero" />
+ <ctl name="R ASP TX3 Source" value="Zero" />
+ <ctl name="R ASP TX4 Source" value="Zero" />
+ <ctl name="ASP TX1 Source" value="VMON" />
+ <ctl name="ASP TX2 Source" value="IMON" />
+ <ctl name="ASP TX3 Source" value="VPMON" />
+ <ctl name="ASP TX4 Source" value="ASPRX1" />
+ <ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
+ </path>
+
+ <path name="amp_iv2-only">
+ <ctl name="R ASPTX1 Slot Position" value="0" />
+ <ctl name="R ASPTX2 Slot Position" value="1" />
+ <ctl name="R ASPTX3 Slot Position" value="2" />
+ <ctl name="R ASPTX4 Slot Position" value="3" />
+ <ctl name="ASPTX1 Slot Position" value="4" />
+ <ctl name="ASPTX2 Slot Position" value="5" />
+ <ctl name="ASPTX3 Slot Position" value="6" />
+ <ctl name="ASPTX4 Slot Position" value="7" />
+ <ctl name="R ASP TX1 Source" value="VMON" />
+ <ctl name="R ASP TX2 Source" value="IMON" />
+ <ctl name="R ASP TX3 Source" value="VPMON" />
+ <ctl name="R ASP TX4 Source" value="ASPRX1" />
+ <ctl name="ASP TX1 Source" value="Zero" />
+ <ctl name="ASP TX2 Source" value="Zero" />
+ <ctl name="ASP TX3 Source" value="Zero" />
+ <ctl name="ASP TX4 Source" value="Zero" />
+ <ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
+ </path>
+
+ <path name="speaker1-status">
+ <ctl name="Main AMP Enable Switch" value="1" />
+ </path>
+
+ <path name="speaker2-status">
+ <ctl name="R Main AMP Enable Switch" value="1" />
+ </path>
+
+ <path name="speaker1-gain">
+ <ctl name="AMP PCM Gain" />
+ </path>
+
+ <path name="speaker2-gain">
+ <ctl name="R AMP PCM Gain" />
+ </path>
+
+ <path name="usb-playback-gain">
+ <ctl name="PCM Playback Volume" />
+ </path>
+
+ <path name="mfg-playback speaker">
+ <ctl name="TDM_0_RX Mixer EP3" value="1" />
+ <ctl name="ASPRX1 Slot Position" value="0" />
+ <ctl name="R ASPRX1 Slot Position" value="1" />
+ <ctl name="SINK_IDS" id="0" value="0" />
+ <ctl name="SINK_IDS" id="1" value="-1" />
+ </path>
+
+ <path name="mfg-playback headphones">
+ <ctl name="I2S_0_RX Chan" value="Two" />
+ <ctl name="I2S_0_RX Format" value="S32_LE" />
+ <ctl name="I2S_0_RX Mixer EP3" value="1" />
+ <ctl name="SINK_IDS" id="0" value="1" />
+ <ctl name="SINK_IDS" id="1" value="-1" />
+ </path>
+
+ <path name="mfg-playback usb-headphones">
+ <ctl name="USB Dev ID" value="1" />
+ <ctl name="USB Playback EP ID" value="1" />
+ <ctl name="USB Playback SR" value="48000" />
+ <ctl name="USB Playback CH" value="2" />
+ <ctl name="USB Playback BW" value="16" />
+ <ctl name="USB_RX Mixer EP3" value="1" />
+ </path>
+
+ <path name="speaker1-only">
+ <ctl name="Main AMP Enable Switch" value="1" />
+ <path name="mfg-playback speaker" />
+ <ctl name="AMP PCM Gain" value="17" />
+ </path>
+
+ <path name="speaker2-only">
+ <ctl name="R Main AMP Enable Switch" value="1" />
+ <path name="mfg-playback speaker" />
+ <ctl name="R AMP PCM Gain" value="17" />
+ </path>
+
+ <path name="headphones">
+ <ctl name="DAC1 MIXL DAC1 Switch" value="1" />
+ <ctl name="DAC1 MIXR DAC1 Switch" value="1" />
+ <ctl name="Stereo1 DAC MIXL DAC L1 Switch" value="1" />
+ <ctl name="Stereo1 DAC MIXR DAC R1 Switch" value="1" />
+ <ctl name="DAC L1 Source" value="Stereo1 DAC Mixer" />
+ <ctl name="DAC R1 Source" value="Stereo1 DAC Mixer" />
+ <ctl name="HPOL Playback Switch" value="1" />
+ <ctl name="HPOR Playback Switch" value="1" />
+ <path name="mfg-playback headphones" />
+ </path>
+
+ <path name="speaker-all">
+ <ctl name="Main AMP Enable Switch" value="1" />
+ <ctl name="R Main AMP Enable Switch" value="1" />
+ <path name="mfg-playback speaker" />
+ </path>
+
+ <path name="loopback-mic-speaker">
+ <ctl name="EP1 TX Mixer TDM_0_TX" value="1" />
+ <ctl name="SINK_IDS" id="0" value="0" />
+ <ctl name="SINK_IDS" id="1" value="-1" />
+ <path name="mfg-playback" />
+ </path>
+
+ <path name="loopback-mic-headphones">
+ <ctl name="EP1 TX Mixer TDM_0_TX" value="1" />
+ <ctl name="SINK_IDS" id="0" value="1" />
+ <ctl name="SINK_IDS" id="1" value="-1" />
+ <path name="mfg-playback" />
+ </path>
+
+ <path name="loopback-mic-usb-headphones">
+ <ctl name="MIC HW Gain At Lower Power Mode (cB)" value="-160" />
+ <ctl name="MIC HW Gain At High Power Mode (cB)" value="0" />
+ <ctl name="TDM_0_TX Format" value="S32_LE" />
+ <ctl name="TDM_0_TX Chan" value="One" />
+ <ctl name="EP1 TX Mixer TDM_0_TX" value="1" />
+ </path>
+
+ <path name="loopback-usb-mic-speaker">
+ </path>
+
+ <path name="loopback-usb-mic-usb-headphone">
+ </path>
+
+ <pcm_id name="loopback-mic1" value="EP1 capture (*)"/>
+ <pcm_id name="loopback-mic2" value="EP1 capture (*)"/>
+ <pcm_id name="loopback-mic3" value="EP1 capture (*)"/>
+ <pcm_id name="loopback-mic4" value="EP1 capture (*)"/>
+ <pcm_id name="loopback-speaker1" value="EP3 playback (*)"/>
+ <pcm_id name="loopback-speaker2" value="EP3 playback (*)"/>
+ <pcm_id name="loopback-headphones" value="EP3 playback (*)"/>
+ <pcm_id name="loopback-usb-headphones" value="EP3 playback (*)"/>
+ <pcm_id name="loopback-usb-mic" value="EP1 capture (*)"/>
+ <pcm_id name="loopback-amp_iv" value="nohost1 capture (*)"/>
+</mixer>
diff --git a/audio/whitefin/config/sound_trigger_configuration.xml b/audio/whitefin/config/sound_trigger_configuration.xml
new file mode 100644
index 0000000..a592910
--- /dev/null
+++ b/audio/whitefin/config/sound_trigger_configuration.xml
@@ -0,0 +1,32 @@
+<?xml version="1.0" encoding="ISO-8859-1"?>
+<!-- Copyright (c) 2020, The Linux Foundation. All rights reserved. -->
+<!-- -->
+<!-- Redistribution and use in source and binary forms, with or without -->
+<!-- modification, are permitted provided that the following conditions are -->
+<!-- met: -->
+<!-- * Redistributions of source code must retain the above copyright -->
+<!-- notice, this list of conditions and the following disclaimer. -->
+<!-- * Redistributions in binary form must reproduce the above -->
+<!-- copyright notice, this list of conditions and the following -->
+<!-- disclaimer in the documentation and/or other materials provided -->
+<!-- with the distribution. -->
+<!-- * Neither the name of The Linux Foundation nor the names of its -->
+<!-- contributors may be used to endorse or promote products derived -->
+<!-- from this software without specific prior written permission. -->
+<!-- -->
+<!-- THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED -->
+<!-- WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -->
+<!-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT -->
+<!-- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS -->
+<!-- BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -->
+<!-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -->
+<!-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR -->
+<!-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -->
+<!-- OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN -->
+<!-- IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -->
+<sound_trigger_hal_configuration>
+ <supported_model>
+ <model name="CLIENT_HOTWORD" uuid="7038ddc8-30f2-11e6-b0ac-40a8f03d3f15" model_type="keyphrase" bargein="true"/>
+ <model name="CLIENT_AMBIENT_MUSIC" uuid="9f6ad62a-1f0b-11e7-87c5-40a8f03d3f15" model_type="generic" bargein="false"/>
+ </supported_model>
+</sound_trigger_hal_configuration>
diff --git a/audio/whitefin/cs35l41/crus_sp_cal_mixer_paths.xml b/audio/whitefin/cs35l41/crus_sp_cal_mixer_paths.xml
new file mode 100644
index 0000000..82af8a7
--- /dev/null
+++ b/audio/whitefin/cs35l41/crus_sp_cal_mixer_paths.xml
@@ -0,0 +1,307 @@
+<?xml version="1.0" encoding="ISO-8859-1"?>
+<!-- Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. -->
+<!-- -->
+<!-- Redistribution and use in source and binary forms, with or without -->
+<!-- modification, are permitted provided that the following conditions are -->
+<!-- met: -->
+<!-- * Redistributions of source code must retain the above copyright -->
+<!-- notice, this list of conditions and the following disclaimer. -->
+<!-- * Redistributions in binary form must reproduce the above -->
+<!-- copyright notice, this list of conditions and the following -->
+<!-- disclaimer in the documentation and/or other materials provided -->
+<!-- with the distribution. -->
+<!-- * Neither the name of The Linux Foundation nor the names of its -->
+<!-- contributors may be used to endorse or promote products derived -->
+<!-- from this software without specific prior written permission. -->
+<!-- -->
+<!-- THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED -->
+<!-- WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -->
+<!-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT -->
+<!-- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS -->
+<!-- BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -->
+<!-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -->
+<!-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR -->
+<!-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -->
+<!-- OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN -->
+<!-- IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -->
+<mixer>
+ <!-- Initial Values -->
+ <!-- Preload Stage -->
+ <ctl name="Main AMP Enable Switch" value="0" />
+ <ctl name="DSP1 Preload Switch" value="0" />
+ <ctl name="R Main AMP Enable Switch" value="0" />
+ <ctl name="R DSP1 Preload Switch" value="0" />
+ <!-- Clock-trigger Stage -->
+ <ctl name="SINK_IDS" id="0" value="-1"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="PCM Playback Volume" value="10"/>
+ <ctl name="TDM_0_RX Mixer EP6" value="0"/>
+
+ <!-- Preparation Stage -->
+ <path name="crus-switch-fw-prepare">
+ <ctl name="DRE DRE Switch" value="1" />
+ <ctl name="VBSTMON Output Switch" value="1" />
+ <ctl name="DSP Booted" value="0" />
+ <ctl name="DSP1 Preload Switch" value="0" />
+ <ctl name="R DRE DRE Switch" value="1" />
+ <ctl name="R VBSTMON Output Switch" value="1" />
+ <ctl name="R DSP Booted" value="0" />
+ <ctl name="R DSP1 Preload Switch" value="0" />
+ </path>
+
+ <!-- Preload Stage -->
+ <path name="crus-fw-preload">
+ <ctl name="DSP1 Preload Switch" value="1" />
+ <ctl name="R DSP1 Preload Switch" value="1" />
+ </path>
+
+ <!-- Firmware-switching Stage -->
+ <path name="crus-switch-fw-Calibration">
+ <ctl name="AMP PCM Gain" value="17" />
+ <ctl name="Digital PCM Volume" value="817" />
+ <ctl name="PCM Source" value="DSP" />
+ <ctl name="DSP1 Firmware" value="Calibration" />
+ <ctl name="R AMP PCM Gain" value="17" />
+ <ctl name="R Digital PCM Volume" value="817" />
+ <ctl name="R PCM Source" value="DSP" />
+ <ctl name="R DSP1 Firmware" value="Calibration" />
+ </path>
+
+ <path name="crus-switch-fw-Diagnostic">
+ <ctl name="AMP PCM Gain" value="17" />
+ <ctl name="Digital PCM Volume" value="817" />
+ <ctl name="PCM Source" value="DSP" />
+ <ctl name="DSP1 Firmware" value="Diagnostic" />
+ <ctl name="R AMP PCM Gain" value="17" />
+ <ctl name="R Digital PCM Volume" value="817" />
+ <ctl name="R PCM Source" value="DSP" />
+ <ctl name="R DSP1 Firmware" value="Diagnostic" />
+ </path>
+
+ <path name="crus-switch-fw-Protection">
+ <ctl name="PCM Source" value="DSP" />
+ <ctl name="DSP1 Firmware" value="Protection" />
+ <ctl name="R PCM Source" value="DSP" />
+ <ctl name="R DSP1 Firmware" value="Protection" />
+ </path>
+
+ <!-- DSP-initialization Stage -->
+ <path name="crus-dsp-pre-calibration-amp1">
+ <ctl name="Main AMP Enable Switch" value="1" />
+ </path>
+
+ <path name="crus-dsp-pre-calibration-amp2">
+ <ctl name="R Main AMP Enable Switch" value="1" />
+ </path>
+
+ <path name="crus-dsp-pre-calibration">
+ <path name="crus-dsp-pre-calibration-amp1" />
+ <path name="crus-dsp-pre-calibration-amp2" />
+ </path>
+
+ <path name="crus-dsp-pre-diagnostic-amp1">
+ <ctl name="Main AMP Enable Switch" value="1" />
+ </path>
+
+ <path name="crus-dsp-pre-diagnostic-amp2">
+ <ctl name="R Main AMP Enable Switch" value="1" />
+ </path>
+
+ <path name="crus-dsp-pre-diagnostic">
+ <path name="crus-dsp-pre-diagnostic-amp1" />
+ <path name="crus-dsp-pre-diagnostic-amp2" />
+ </path>
+
+ <path name="crus-dsp-pre-protection">
+ <ctl name="Main AMP Enable Switch" value="1" />
+ <ctl name="R Main AMP Enable Switch" value="1" />
+ </path>
+
+ <!-- Clock-trigger Stage -->
+ <path name="platform-controls">
+ <ctl name="PCM Playback Volume" value="1000"/>
+ <ctl name="SINK_IDS" id="0" value="0"/>
+ <ctl name="SINK_IDS" id="1" value="-1"/>
+ <ctl name="TDM_0_RX Mixer EP6" value="1"/>
+ </path>
+
+ <!-- Post loaded firmware -->
+ <path name="crus-dsp-post-loading-fw">
+ <ctl name="Main AMP Enable Switch" value="0" />
+ <ctl name="R Main AMP Enable Switch" value="0" />
+ </path>
+
+ <!-- Value & Information Fetch Stage -->
+ <path name="platform-values">
+ <ctl name="TDM_0_RX Format" />
+ <ctl name="TDM_0_RX Chan" />
+ <ctl name="TDM_0_RX Sample Rate" />
+ <ctl name="PCM Playback Volume" />
+ <ctl name="TDM_0_RX Mixer EP6" />
+ </path>
+
+ <path name="cs35l41-values">
+ <ctl name="DRE DRE Switch" />
+ <ctl name="R DRE DRE Switch" />
+ <ctl name="VBSTMON Output Switch" />
+ <ctl name="R VBSTMON Output Switch" />
+ <ctl name="AMP PCM Gain" />
+ <ctl name="R AMP PCM Gain" />
+ <ctl name="Digital PCM Volume" />
+ <ctl name="R Digital PCM Volume" />
+ <ctl name="PCM Source" />
+ <ctl name="R PCM Source" />
+ <ctl name="DSP Booted" />
+ <ctl name="R DSP Booted" />
+ <ctl name="Main AMP Enable Switch" />
+ <ctl name="R Main AMP Enable Switch" />
+ <ctl name="DSP1 Preload Switch" />
+ <ctl name="R DSP1 Preload Switch" />
+ <ctl name="DSP1 Firmware" />
+ <ctl name="R DSP1 Firmware" />
+ </path>
+
+
+ <!-- Note that the order of controls does matter because
+ it should be matched to the structure defined in
+ sp_cal_common.h -->
+ <!--
+ struct calibration_data {
+ unsigned int cal_r;
+ unsigned int cal_status;
+ unsigned int cal_checksum;
+ unsigned int cal_ambient;
+ unsigned int amp_pcm_gain;
+ unsigned int digital_pcm_gain;
+ };
+ -->
+ <path name="cs35l41-dsp-amp1-calibration-values">
+ <ctl name="DSP1 Calibration cd CAL_R" />
+ <ctl name="DSP1 Calibration cd CAL_STATUS" />
+ <ctl name="DSP1 Calibration cd CAL_CHECKSUM" />
+ <ctl name="DSP1 Calibration cd CAL_AMBIENT" />
+ <ctl name="AMP PCM Gain" />
+ <ctl name="Digital PCM Volume" />
+
+ <!-- Only for debug print -->
+ <ctl name="DSP1 Calibration cd CAL_SET_STATUS" />
+ </path>
+
+ <path name="cs35l41-dsp-amp2-calibration-values">
+ <ctl name="R DSP1 Calibration cd CAL_R" />
+ <ctl name="R DSP1 Calibration cd CAL_STATUS" />
+ <ctl name="R DSP1 Calibration cd CAL_CHECKSUM" />
+ <ctl name="R DSP1 Calibration cd CAL_AMBIENT" />
+ <ctl name="R AMP PCM Gain" />
+ <ctl name="R Digital PCM Volume" />
+
+ <!-- Only for debug print -->
+ <ctl name="R DSP1 Calibration cd CAL_SET_STATUS" />
+ </path>
+
+ <!--
+ struct diagnostic_data {
+ struct calibration_data calibration_data;
+ unsigned int z_low_diff;
+ unsigned int diag_f0;
+ unsigned int diag_f0_status;
+ };
+ -->
+ <path name="cs35l41-dsp-amp1-diagnostic-values">
+ <!-- struct calibration_data START -->
+ <ctl name="DSP1 Diagnostic cd CAL_R" />
+ <ctl name="DSP1 Diagnostic cd CAL_STATUS" />
+ <ctl name="DSP1 Diagnostic cd CAL_CHECKSUM" />
+ <ctl name="DSP1 Diagnostic cd CAL_AMBIENT" />
+ <ctl name="AMP PCM Gain" />
+ <ctl name="Digital PCM Volume" />
+ <!-- struct calibration_data END -->
+ <ctl name="DSP1 Diagnostic cd DIAG_Z_LOW_DIFF" />
+ <ctl name="DSP1 Diagnostic cd DIAG_F0" />
+ <ctl name="DSP1 Diagnostic cd DIAG_F0_STATUS" />
+
+ <!-- Only for debug print -->
+ <ctl name="DSP1 Diagnostic cd CAL_SET_STATUS" />
+ </path>
+
+ <path name="cs35l41-dsp-amp2-diagnostic-values">
+ <!-- struct calibration_data START -->
+ <ctl name="R DSP1 Diagnostic cd CAL_R" />
+ <ctl name="R DSP1 Diagnostic cd CAL_STATUS" />
+ <ctl name="R DSP1 Diagnostic cd CAL_CHECKSUM" />
+ <ctl name="R DSP1 Diagnostic cd CAL_AMBIENT" />
+ <ctl name="R AMP PCM Gain" />
+ <ctl name="R Digital PCM Volume" />
+ <!-- struct calibration_data END -->
+ <ctl name="R DSP1 Diagnostic cd DIAG_Z_LOW_DIFF" />
+ <ctl name="R DSP1 Diagnostic cd DIAG_F0" />
+ <ctl name="R DSP1 Diagnostic cd DIAG_F0_STATUS" />
+
+ <!-- Only for debug print -->
+ <ctl name="R DSP1 Diagnostic cd CAL_SET_STATUS" />
+ </path>
+
+ <path name="cs35l41-dsp-amp1-protection-values">
+ <!-- struct calibration_data START -->
+ <ctl name="DSP1 Protection cd CAL_R" />
+ <ctl name="DSP1 Protection cd CAL_STATUS" />
+ <ctl name="DSP1 Protection cd CAL_CHECKSUM" />
+ <ctl name="DSP1 Protection cd CAL_AMBIENT" />
+
+ <!-- These controls are unrelated so we can simply
+ skip them
+ <ctl name="AMP PCM Gain" />
+ <ctl name="Digital PCM Volume" />
+ -->
+ <!-- struct calibration_data END -->
+ </path>
+
+ <path name="cs35l41-dsp-amp2-protection-values">
+ <!-- struct calibration_data START -->
+ <ctl name="R DSP1 Protection cd CAL_R" />
+ <ctl name="R DSP1 Protection cd CAL_STATUS" />
+ <ctl name="R DSP1 Protection cd CAL_CHECKSUM" />
+ <ctl name="R DSP1 Protection cd CAL_AMBIENT" />
+
+ <!-- These controls are unrelated so we can simply
+ skip them
+ <ctl name="R AMP PCM Gain" />
+ <ctl name="R Digital PCM Volume" />
+ -->
+ <!-- struct calibration_data END -->
+ </path>
+
+ <path name="cs35l41-dsp-amp1-calibration-completion">
+ <ctl name="DSP1 Calibration cd CAL_STATUS" />
+ </path>
+
+ <path name="cs35l41-dsp-amp2-calibration-completion">
+ <ctl name="R DSP1 Calibration cd CAL_STATUS" />
+ </path>
+
+ <path name="cs35l41-dsp-amp1-protection-completion">
+ <ctl name="DSP1 Protection cd CAL_SET_STATUS" />
+ </path>
+
+ <path name="cs35l41-dsp-amp2-protection-completion">
+ <ctl name="R DSP1 Protection cd CAL_SET_STATUS" />
+ </path>
+
+ <path name="cs35l41-dsp-amp1-diagnostic-completion">
+ <ctl name="DSP1 Diagnostic cd CAL_STATUS" />
+ <ctl name="DSP1 Diagnostic cd DIAG_F0_STATUS" />
+ </path>
+
+ <path name="cs35l41-dsp-amp2-diagnostic-completion">
+ <ctl name="R DSP1 Diagnostic cd CAL_STATUS" />
+ <ctl name="R DSP1 Diagnostic cd DIAG_F0_STATUS" />
+ </path>
+
+ <path name="cs35l41-dsp-amp1-enable-status">
+ <ctl name="Main AMP Enable Switch" />
+ </path>
+
+ <path name="cs35l41-dsp-amp2-enable-status">
+ <ctl name="R Main AMP Enable Switch" />
+ </path>
+</mixer>
diff --git a/audio/whitefin/cs35l41/fw/R-cs35l41-dsp1-spk-cali.bin b/audio/whitefin/cs35l41/fw/R-cs35l41-dsp1-spk-cali.bin
new file mode 100644
index 0000000..52cd454
--- /dev/null
+++ b/audio/whitefin/cs35l41/fw/R-cs35l41-dsp1-spk-cali.bin
Binary files differ
diff --git a/audio/whitefin/cs35l41/fw/R-cs35l41-dsp1-spk-diag.bin b/audio/whitefin/cs35l41/fw/R-cs35l41-dsp1-spk-diag.bin
new file mode 100644
index 0000000..2887e93
--- /dev/null
+++ b/audio/whitefin/cs35l41/fw/R-cs35l41-dsp1-spk-diag.bin
Binary files differ
diff --git a/audio/whitefin/cs35l41/fw/R-cs35l41-dsp1-spk-prot.bin b/audio/whitefin/cs35l41/fw/R-cs35l41-dsp1-spk-prot.bin
new file mode 100644
index 0000000..7b5284d
--- /dev/null
+++ b/audio/whitefin/cs35l41/fw/R-cs35l41-dsp1-spk-prot.bin
Binary files differ
diff --git a/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-cali.bin b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-cali.bin
new file mode 100644
index 0000000..0e2b6ed
--- /dev/null
+++ b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-cali.bin
Binary files differ
diff --git a/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-cali.wmfw b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-cali.wmfw
new file mode 100644
index 0000000..83dbe7e
--- /dev/null
+++ b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-cali.wmfw
Binary files differ
diff --git a/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-diag.bin b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-diag.bin
new file mode 100644
index 0000000..4638b9c
--- /dev/null
+++ b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-diag.bin
Binary files differ
diff --git a/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-diag.wmfw b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-diag.wmfw
new file mode 100644
index 0000000..b708cde
--- /dev/null
+++ b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-diag.wmfw
Binary files differ
diff --git a/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-prot.bin b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-prot.bin
new file mode 100644
index 0000000..76bdaae
--- /dev/null
+++ b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-prot.bin
Binary files differ
diff --git a/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-prot.wmfw b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-prot.wmfw
new file mode 100644
index 0000000..83dbe7e
--- /dev/null
+++ b/audio/whitefin/cs35l41/fw/cs35l41-dsp1-spk-prot.wmfw
Binary files differ
diff --git a/audio/whitefin/factory-audio-tables.mk b/audio/whitefin/factory-audio-tables.mk
new file mode 100644
index 0000000..27c29d4
--- /dev/null
+++ b/audio/whitefin/factory-audio-tables.mk
@@ -0,0 +1,22 @@
+#
+# Copyright (C) 2020 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+AUDIO_FACTORY_TABLE_FOLDER := whitefin
+
+# Mixer Path Configuration for Audio Factory
+PRODUCT_COPY_FILES += \
+ device/google/raviole/audio/$(AUDIO_FACTORY_TABLE_FOLDER)/config/mixer_paths_factory.xml:$(TARGET_COPY_OUT_VENDOR)/etc/mixer_paths_factory.xml
+
diff --git a/audio/whitefin/tuning/bluenote/exported.xml b/audio/whitefin/tuning/bluenote/exported.xml
new file mode 100644
index 0000000..48a2104
--- /dev/null
+++ b/audio/whitefin/tuning/bluenote/exported.xml
@@ -0,0 +1,298 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<tunings>
+ <tuning>
+ <keys>
+ <key>1170956864708935680</key>
+ <key>1170957964220563456</key>
+ <key>3494866978118565888</key>
+ </keys>
+ <signalflow id="3" name="Spatial Audio">
+ <module id="101" name="Auto Gain Control">
+ <param id="0" name="opMode_" size="1" type="uint32">0</param>
+ <param id="1" name="fs_" size="1" type="uint32">0</param>
+ <param id="2" name="numCh_" size="1" type="uint32">0</param>
+ <param id="3" name="chMask_" size="1" type="uint32">0</param>
+ <param id="31" name="GainApplied" size="1" type="float">0.0</param>
+ <param id="32" name="idealRMS" size="1" type="float">0.0</param>
+ <param id="33" name="noiseGate" size="1" type="float">0.0</param>
+ <param id="34" name="minGain" size="1" type="float">0.0</param>
+ <param id="35" name="maxGain" size="1" type="float">0.0</param>
+ <param id="36" name="longGainAtRt" size="1" type="uint32">0</param>
+ <param id="37" name="GainAtRt" size="1" type="uint32">0</param>
+ <param id="38" name="rmsTav" size="1" type="uint32">0</param>
+ </module>
+ <module id="102" name="Surround Record">
+ <param id="0" name="opMode_" size="1" type="uint32">0</param>
+ <param id="1" name="fs_" size="1" type="uint32">0</param>
+ <param id="2" name="numCh_" size="1" type="uint32">0</param>
+ <param id="3" name="chMask_" size="1" type="uint32">0</param>
+ <param id="31" name="alpha" size="1" type="float">0.0</param>
+ </module>
+ <module id="103" name="Multi Channel IIR">
+ <param id="0" name="opMode_" size="1" type="uint32">0</param>
+ <param id="1" name="fs_" size="1" type="uint32">0</param>
+ <param id="2" name="numCh_" size="1" type="uint32">0</param>
+ <param id="3" name="chMask_" size="1" type="uint32">0</param>
+ <param id="31" name="numChannels" size="1" type="uint32">1</param>
+ <struct id="32">
+ <param id="-1" name="numSections" size="1" type="uint32">0</param>
+ <param id="-1" name="coeffPtr" size="150" type="float">0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0</param>
+ </struct>
+ <param id="33" name="gainPtr" size="3" type="int32">0,0,0</param>
+ </module>
+ <module id="104" name="Multi Band DRC">
+ <param id="0" name="opMode_" size="1" type="uint32">3</param>
+ <param id="1" name="fs_" size="1" type="uint32">0</param>
+ <param id="2" name="numCh_" size="1" type="uint32">0</param>
+ <param id="3" name="chMask_" size="1" type="uint32">0</param>
+ <struct id="31">
+ <param id="-1" name="numBand" size="1" type="uint32">1</param>
+ <param id="-1" name="ch0_cross_profile" size="3072" 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+ <param id="-1" name="band2_numOfKnee" size="1" type="uint32">1</param>
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+ <param id="-1" name="band2_compressRatio" size="4" type="float">0.0,0.0,0.0,0.0</param>
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+ <param id="-1" name="band2_hysteresis" size="4" type="float">0.0,0.0,0.0,0.0</param>
+ </struct>
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+ <param id="-1" name="limiter_releaseTime_ms" size="1" type="uint32">0</param>
+ </struct>
+ </module>
+ </signalflow>
+ </tuning>
+ <tuning>
+ <keys>
+ <key>2323914724061741056</key>
+ <key>2323914741241610240</key>
+ </keys>
+ <signalflow id="1" name="Fortemdia">
+ <module id="1" name="Forty"/>
+ </signalflow>
+ </tuning>
+ <tuning>
+ <keys>
+ <key>2323914728356708352</key>
+ </keys>
+ <signalflow id="2" name="Waves">
+ <module id="2" name="Waves"/>
+ </signalflow>
+ </tuning>
+ <tuning>
+ <keys>
+ <key>2323915136378601472</key>
+ </keys>
+ <signalflow id="3" name="Spatial Audio">
+ <module id="101" name="Auto Gain Control">
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+ <param id="1" name="fs_" size="1" type="uint32">0</param>
+ <param id="2" name="numCh_" size="1" type="uint32">0</param>
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+ <param id="31" name="GainApplied" size="1" type="float">0.0</param>
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+ <param id="38" name="rmsTav" size="1" type="uint32">0</param>
+ </module>
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+ <param id="31" name="alpha" size="1" type="float">0.0</param>
+ </module>
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+ <param id="-1" name="band1_hysteresis" size="4" type="float">0.0,0.0,0.0,0.0</param>
+ <param id="-1" name="band2_delay_ms" size="1" type="float">0.0</param>
+ <param id="-1" name="band2_rms_ms" size="1" type="float">0.0</param>
+ <param id="-1" name="band2_gain_dB" size="1" type="float">0.0</param>
+ <param id="-1" name="band2_Min_Gain_dB" size="1" type="float">0.0</param>
+ <param id="-1" name="band2_numOfKnee" size="1" type="uint32">1</param>
+ <param id="-1" name="band2_threadhold_dB" size="3" type="float">0.0,0.0,0.0</param>
+ <param id="-1" name="band2_compressRatio" size="4" type="float">0.0,0.0,0.0,0.0</param>
+ <param id="-1" name="band2_kneeWidth" size="3" type="float">0.0,0.0,0.0</param>
+ <param id="-1" name="band2_attackTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+ <param id="-1" name="band2_releaseTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+ <param id="-1" name="band2_hysteresis" size="4" type="float">0.0,0.0,0.0,0.0</param>
+ </struct>
+ <struct id="33">
+ <param id="-1" name="limiter_gain_dB" size="1" type="float">0.0</param>
+ <param id="-1" name="limiter_threadhold_dB" size="1" type="float">0.0</param>
+ <param id="-1" name="limiter_attackTime_ms" size="1" type="uint32">0</param>
+ <param id="-1" name="limiter_releaseTime_ms" size="1" type="uint32">0</param>
+ </struct>
+ </module>
+ </signalflow>
+ </tuning>
+ <tuning>
+ <keys>
+ <key>2323922832959995904</key>
+ </keys>
+ <signalflow id="3" name="Spatial Audio">
+ <module id="101" name="Auto Gain Control">
+ <param id="0" name="opMode_" size="1" type="uint32">0</param>
+ <param id="1" name="fs_" size="1" type="uint32">0</param>
+ <param id="2" name="numCh_" size="1" type="uint32">0</param>
+ <param id="3" name="chMask_" size="1" type="uint32">0</param>
+ <param id="31" name="GainApplied" size="1" type="float">0.0</param>
+ <param id="32" name="idealRMS" size="1" type="float">0.0</param>
+ <param id="33" name="noiseGate" size="1" type="float">0.0</param>
+ <param id="34" name="minGain" size="1" type="float">0.0</param>
+ <param id="35" name="maxGain" size="1" type="float">0.0</param>
+ <param id="36" name="longGainAtRt" size="1" type="uint32">0</param>
+ <param id="37" name="GainAtRt" size="1" type="uint32">0</param>
+ <param id="38" name="rmsTav" size="1" type="uint32">0</param>
+ </module>
+ <module id="102" name="Surround Record">
+ <param id="0" name="opMode_" size="1" type="uint32">0</param>
+ <param id="1" name="fs_" size="1" type="uint32">0</param>
+ <param id="2" name="numCh_" size="1" type="uint32">0</param>
+ <param id="3" name="chMask_" size="1" type="uint32">0</param>
+ <param id="31" name="alpha" size="1" type="float">0.0</param>
+ </module>
+ <module id="103" name="Multi Channel IIR">
+ <param id="0" name="opMode_" size="1" type="uint32">2</param>
+ <param id="1" name="fs_" size="1" type="uint32">5</param>
+ <param id="2" name="numCh_" size="1" type="uint32">4</param>
+ <param id="3" name="chMask_" size="1" type="uint32">5</param>
+ <param id="31" name="numChannels" size="1" type="uint32">1</param>
+ <struct id="32">
+ <param id="-1" name="numSections" size="1" type="uint32">2</param>
+ <param id="-1" name="coeffPtr" size="150" type="float">-0.9,0.70000005,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0</param>
+ </struct>
+ <param id="33" name="gainPtr" size="3" type="int32">10,0,0</param>
+ </module>
+ <module id="104" name="Multi Band DRC">
+ <param id="0" name="opMode_" size="1" type="uint32">3</param>
+ <param id="1" name="fs_" size="1" type="uint32">9</param>
+ <param id="2" name="numCh_" size="1" type="uint32">6</param>
+ <param id="3" name="chMask_" size="1" type="uint32">10</param>
+ <struct id="31">
+ <param id="-1" name="numBand" size="1" type="uint32">2</param>
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+ <param id="-1" name="band1_releaseTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+ <param id="-1" name="band1_hysteresis" size="4" type="float">0.0,0.0,0.0,0.0</param>
+ <param id="-1" name="band2_delay_ms" size="1" type="float">0.0</param>
+ <param id="-1" name="band2_rms_ms" size="1" type="float">0.0</param>
+ <param id="-1" name="band2_gain_dB" size="1" type="float">0.0</param>
+ <param id="-1" name="band2_Min_Gain_dB" size="1" type="float">0.0</param>
+ <param id="-1" name="band2_numOfKnee" size="1" type="uint32">1</param>
+ <param id="-1" name="band2_threadhold_dB" size="3" type="float">0.0,0.0,0.0</param>
+ <param id="-1" name="band2_compressRatio" size="4" type="float">0.0,0.0,0.0,0.0</param>
+ <param id="-1" name="band2_kneeWidth" size="3" type="float">0.0,0.0,0.0</param>
+ <param id="-1" name="band2_attackTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+ <param id="-1" name="band2_releaseTime_ms" size="4" type="float">0.0,0.0,0.0,0.6</param>
+ <param id="-1" name="band2_hysteresis" size="4" type="float">0.0,0.5,0.0,0.6</param>
+ </struct>
+ <struct id="33">
+ <param id="-1" name="limiter_gain_dB" size="1" type="float">0.70000005</param>
+ <param id="-1" name="limiter_threadhold_dB" size="1" type="float">0.0</param>
+ <param id="-1" name="limiter_attackTime_ms" size="1" type="uint32">0</param>
+ <param id="-1" name="limiter_releaseTime_ms" size="1" type="uint32">0</param>
+ </struct>
+ </module>
+ </signalflow>
+ </tuning>
+</tunings>
diff --git a/audio/whitefin/tuning/bluenote/playback.gatf b/audio/whitefin/tuning/bluenote/playback.gatf
new file mode 100644
index 0000000..9f7493b
--- /dev/null
+++ b/audio/whitefin/tuning/bluenote/playback.gatf
Binary files differ
diff --git a/audio/whitefin/tuning/bluenote/recording.gatf b/audio/whitefin/tuning/bluenote/recording.gatf
new file mode 100644
index 0000000..4d4868e
--- /dev/null
+++ b/audio/whitefin/tuning/bluenote/recording.gatf
Binary files differ
diff --git a/audio/whitefin/tuning/bluenote/voice.gatf b/audio/whitefin/tuning/bluenote/voice.gatf
new file mode 100644
index 0000000..1b2aaf5
--- /dev/null
+++ b/audio/whitefin/tuning/bluenote/voice.gatf
Binary files differ
diff --git a/audio/whitefin/tuning/fortemedia/BLUETOOTH.dat b/audio/whitefin/tuning/fortemedia/BLUETOOTH.dat
new file mode 100644
index 0000000..eaea8b8
--- /dev/null
+++ b/audio/whitefin/tuning/fortemedia/BLUETOOTH.dat
Binary files differ
diff --git a/audio/whitefin/tuning/fortemedia/BLUETOOTH.mods b/audio/whitefin/tuning/fortemedia/BLUETOOTH.mods
new file mode 100644
index 0000000..844d2ec
--- /dev/null
+++ b/audio/whitefin/tuning/fortemedia/BLUETOOTH.mods
@@ -0,0 +1,35064 @@
+#PLATFORM_NAME gChip
+#SINGLE_API_VER 1.1.4
+#SAVE_TIME 2020-12-15 15:45:41
+
+#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x000D //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x053D //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0100 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7500 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x0200 //TX_MIN_EQ_RE_EST_0
+153 0x0200 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1800 //TX_MIN_EQ_RE_EST_7
+160 0x1800 //TX_MIN_EQ_RE_EST_8
+161 0x3000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x6000 //TX_MIN_EQ_RE_EST_11
+164 0x7FFF //TX_MIN_EQ_RE_EST_12
+165 0x2000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x2000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x157C //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x1000 //TX_ADPT_STRICT_L
+222 0x1000 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF900 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0050 //TX_DELTA_THR_SN_EST_0
+251 0x01A0 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x7F00 //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0800 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0012 //TX_NS_LVL_CTRL_1
+283 0x0017 //TX_NS_LVL_CTRL_2
+284 0x0015 //TX_NS_LVL_CTRL_3
+285 0x0012 //TX_NS_LVL_CTRL_4
+286 0x0012 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000D //TX_MIN_GAIN_S_2
+292 0x000F //TX_MIN_GAIN_S_3
+293 0x000F //TX_MIN_GAIN_S_4
+294 0x000F //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x4000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x3000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x3000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7D00 //TX_LAMBDA_PFILT_S_0
+340 0x7900 //TX_LAMBDA_PFILT_S_1
+341 0x7400 //TX_LAMBDA_PFILT_S_2
+342 0x7900 //TX_LAMBDA_PFILT_S_3
+343 0x7D00 //TX_LAMBDA_PFILT_S_4
+344 0x7D00 //TX_LAMBDA_PFILT_S_5
+345 0x7D00 //TX_LAMBDA_PFILT_S_6
+346 0x7D00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0FA0 //TX_DT_BINVAD_ENDF
+358 0x0400 //TX_C_POST_FLT_DT
+359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x03ED //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x55F0 //TX_NOISE_TH_4
+374 0x7FFF //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0FA0 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x1000 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x000A //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x007A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x5000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x7FFF //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0014 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x483C //TX_FDEQ_GAIN_3
+571 0x303C //TX_FDEQ_GAIN_4
+572 0x3048 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D08 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x7800 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E48 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C08 //TX_PREEQ_BIN_MIC1_2
+693 0x0700 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x7800 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x4000 //TX_TDDRC_ALPHA_UP_01
+784 0x4000 //TX_TDDRC_ALPHA_UP_02
+785 0x4000 //TX_TDDRC_ALPHA_UP_03
+786 0x4000 //TX_TDDRC_ALPHA_UP_04
+787 0x6000 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0004 //TX_TDDRC_THRD_0
+855 0x0010 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x4000 //TX_TDDRC_ALPHA_UP_00
+861 0x6000 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0000 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+10 0x0000 //RX_PGA
+11 0x0000 //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x0000 //RX_THR_PITCH_DET_0
+14 0x0000 //RX_THR_PITCH_DET_1
+15 0x0000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0000 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0000 //RX_NS_LVL_CTRL
+23 0x0000 //RX_THR_SN_EST
+24 0x0000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x0000 //RX_LMT_ALPHA
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+125 0x0000 //RX_LAMBDA_PKA_FP
+126 0x0000 //RX_TPKA_FP
+127 0x0000 //RX_MIN_G_FP
+128 0x0000 //RX_MAX_G_FP
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F3C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x000D //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x053D //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0300 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x5000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0010 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFB00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0018 //TX_NS_LVL_CTRL_3
+285 0x0016 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7C00 //TX_LAMBDA_PFILT_S_0
+340 0x7C00 //TX_LAMBDA_PFILT_S_1
+341 0x7C00 //TX_LAMBDA_PFILT_S_2
+342 0x7A00 //TX_LAMBDA_PFILT_S_3
+343 0x7C00 //TX_LAMBDA_PFILT_S_4
+344 0x7C00 //TX_LAMBDA_PFILT_S_5
+345 0x7C00 //TX_LAMBDA_PFILT_S_6
+346 0x7C00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0800 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0032 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x017E //TX_NOISE_TH_1
+371 0x0230 //TX_NOISE_TH_2
+372 0x3492 //TX_NOISE_TH_3
+373 0x4E20 //TX_NOISE_TH_4
+374 0x55B8 //TX_NOISE_TH_5
+375 0x49E6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0F0A //TX_NOISE_TH_6
+379 0x0033 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0033 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2648 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C0C //TX_PREEQ_BIN_MIC1_2
+693 0x0C0F //TX_PREEQ_BIN_MIC1_3
+694 0x0F0F //TX_PREEQ_BIN_MIC1_4
+695 0x0F09 //TX_PREEQ_BIN_MIC1_5
+696 0x0909 //TX_PREEQ_BIN_MIC1_6
+697 0x0908 //TX_PREEQ_BIN_MIC1_7
+698 0x0700 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0002 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0B50 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0000 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+10 0x0000 //RX_PGA
+11 0x0000 //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x0000 //RX_THR_PITCH_DET_0
+14 0x0000 //RX_THR_PITCH_DET_1
+15 0x0000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0000 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0000 //RX_NS_LVL_CTRL
+23 0x0000 //RX_THR_SN_EST
+24 0x0000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x0000 //RX_LMT_ALPHA
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+125 0x0000 //RX_LAMBDA_PKA_FP
+126 0x0000 //RX_TPKA_FP
+127 0x0000 //RX_MIN_G_FP
+128 0x0000 //RX_MAX_G_FP
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0093 //TX_DIST2REF1
+22 0x001A //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0400 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x2000 //TX_MIN_EQ_RE_EST_0
+153 0x0600 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x3000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x36B0 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x1000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0000 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x0014 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7D00 //TX_LAMBDA_PFILT_S_0
+340 0x7D00 //TX_LAMBDA_PFILT_S_1
+341 0x7D00 //TX_LAMBDA_PFILT_S_2
+342 0x7D00 //TX_LAMBDA_PFILT_S_3
+343 0x7D00 //TX_LAMBDA_PFILT_S_4
+344 0x7D00 //TX_LAMBDA_PFILT_S_5
+345 0x7D00 //TX_LAMBDA_PFILT_S_6
+346 0x7D00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0040 //TX_DT_BINVAD_TH_0
+354 0x0040 //TX_DT_BINVAD_TH_1
+355 0x0100 //TX_DT_BINVAD_TH_2
+356 0x0100 //TX_DT_BINVAD_TH_3
+357 0x36B0 //TX_DT_BINVAD_ENDF
+358 0x0200 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x01F4 //TX_NOISE_TH_2
+372 0x4E20 //TX_NOISE_TH_3
+373 0x2710 //TX_NOISE_TH_4
+374 0x2710 //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0DAC //TX_NOISE_TH_6
+379 0x0050 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0050 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4000 //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4850 //TX_FDEQ_GAIN_2
+570 0x5050 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x484A //TX_FDEQ_GAIN_5
+573 0x4E5E //TX_FDEQ_GAIN_6
+574 0x5850 //TX_FDEQ_GAIN_7
+575 0x5050 //TX_FDEQ_GAIN_8
+576 0x5050 //TX_FDEQ_GAIN_9
+577 0x5064 //TX_FDEQ_GAIN_10
+578 0x5C70 //TX_FDEQ_GAIN_11
+579 0x7088 //TX_FDEQ_GAIN_12
+580 0x8080 //TX_FDEQ_GAIN_13
+581 0x7474 //TX_FDEQ_GAIN_14
+582 0x8080 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0xF200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2625 //TX_PREEQ_GAIN_MIC1_8
+675 0x2421 //TX_PREEQ_GAIN_MIC1_9
+676 0x1D19 //TX_PREEQ_GAIN_MIC1_10
+677 0x1820 //TX_PREEQ_GAIN_MIC1_11
+678 0x2830 //TX_PREEQ_GAIN_MIC1_12
+679 0x303C //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C0C //TX_PREEQ_BIN_MIC1_2
+693 0x0C0F //TX_PREEQ_BIN_MIC1_3
+694 0x0F0F //TX_PREEQ_BIN_MIC1_4
+695 0x0F09 //TX_PREEQ_BIN_MIC1_5
+696 0x0909 //TX_PREEQ_BIN_MIC1_6
+697 0x0908 //TX_PREEQ_BIN_MIC1_7
+698 0x070F //TX_PREEQ_BIN_MIC1_8
+699 0x1F08 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0920 //TX_PREEQ_BIN_MIC1_11
+702 0x2020 //TX_PREEQ_BIN_MIC1_12
+703 0x2021 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0xF200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0056 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0042 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0002 //TX_TDDRC_THRD_1
+856 0x1000 //TX_TDDRC_THRD_2
+857 0x1000 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0BE0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0000 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+10 0x0000 //RX_PGA
+11 0x0000 //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x0000 //RX_THR_PITCH_DET_0
+14 0x0000 //RX_THR_PITCH_DET_1
+15 0x0000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0000 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0000 //RX_NS_LVL_CTRL
+23 0x0000 //RX_THR_SN_EST
+24 0x0000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x0000 //RX_LMT_ALPHA
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+125 0x0000 //RX_LAMBDA_PKA_FP
+126 0x0000 //RX_TPKA_FP
+127 0x0000 //RX_MIN_G_FP
+128 0x0000 //RX_MAX_G_FP
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x4B7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0093 //TX_DIST2REF1
+22 0x001A //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0A19 //TX_PGA_0
+28 0x0A19 //TX_PGA_1
+29 0x0A19 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0300 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7A00 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x2000 //TX_MIN_EQ_RE_EST_1
+154 0x2000 //TX_MIN_EQ_RE_EST_2
+155 0x4000 //TX_MIN_EQ_RE_EST_3
+156 0x4000 //TX_MIN_EQ_RE_EST_4
+157 0x7FFF //TX_MIN_EQ_RE_EST_5
+158 0x7FFF //TX_MIN_EQ_RE_EST_6
+159 0x7FFF //TX_MIN_EQ_RE_EST_7
+160 0x7FFF //TX_MIN_EQ_RE_EST_8
+161 0x7FFF //TX_MIN_EQ_RE_EST_9
+162 0x7FFF //TX_MIN_EQ_RE_EST_10
+163 0x7FFF //TX_MIN_EQ_RE_EST_11
+164 0x7FFF //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0CCD //TX_LAMBDA_CB_NLE
+167 0x2000 //TX_C_POST_FLT
+168 0x7FFF //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x09C4 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7D00 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0DAC //TX_DT_CUT_K
+214 0x0020 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0063 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFB00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0018 //TX_NS_LVL_CTRL_3
+285 0x0016 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7C00 //TX_LAMBDA_PFILT_S_0
+340 0x7C00 //TX_LAMBDA_PFILT_S_1
+341 0x7C00 //TX_LAMBDA_PFILT_S_2
+342 0x7A00 //TX_LAMBDA_PFILT_S_3
+343 0x7C00 //TX_LAMBDA_PFILT_S_4
+344 0x7C00 //TX_LAMBDA_PFILT_S_5
+345 0x7C00 //TX_LAMBDA_PFILT_S_6
+346 0x7C00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0200 //TX_DT_BINVAD_TH_0
+354 0x0200 //TX_DT_BINVAD_TH_1
+355 0x0200 //TX_DT_BINVAD_TH_2
+356 0x0200 //TX_DT_BINVAD_TH_3
+357 0x1F40 //TX_DT_BINVAD_ENDF
+358 0x0100 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x4E20 //TX_NOISE_TH_3
+373 0x4E20 //TX_NOISE_TH_4
+374 0x59D8 //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x2710 //TX_NOISE_TH_6
+379 0x0033 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0033 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x7FFF //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x5B5B //TX_FDEQ_GAIN_10
+578 0x7373 //TX_FDEQ_GAIN_11
+579 0x739A //TX_FDEQ_GAIN_12
+580 0x9AC4 //TX_FDEQ_GAIN_13
+581 0xC4C4 //TX_FDEQ_GAIN_14
+582 0xC4C4 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2625 //TX_PREEQ_GAIN_MIC1_8
+675 0x2421 //TX_PREEQ_GAIN_MIC1_9
+676 0x1D19 //TX_PREEQ_GAIN_MIC1_10
+677 0x1820 //TX_PREEQ_GAIN_MIC1_11
+678 0x2830 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x1812 //TX_PREEQ_BIN_MIC1_0
+691 0x0A0A //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x080A //TX_PREEQ_BIN_MIC1_3
+694 0x0B09 //TX_PREEQ_BIN_MIC1_4
+695 0x0A06 //TX_PREEQ_BIN_MIC1_5
+696 0x0606 //TX_PREEQ_BIN_MIC1_6
+697 0x0605 //TX_PREEQ_BIN_MIC1_7
+698 0x050A //TX_PREEQ_BIN_MIC1_8
+699 0x1505 //TX_PREEQ_BIN_MIC1_9
+700 0x0506 //TX_PREEQ_BIN_MIC1_10
+701 0x0615 //TX_PREEQ_BIN_MIC1_11
+702 0x1516 //TX_PREEQ_BIN_MIC1_12
+703 0x2021 //TX_PREEQ_BIN_MIC1_13
+704 0x2021 //TX_PREEQ_BIN_MIC1_14
+705 0x2021 //TX_PREEQ_BIN_MIC1_15
+706 0x0800 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0004 //TX_FILTINDX
+854 0x0004 //TX_TDDRC_THRD_0
+855 0x0016 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0CE6 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0000 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+10 0x0000 //RX_PGA
+11 0x0000 //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x0000 //RX_THR_PITCH_DET_0
+14 0x0000 //RX_THR_PITCH_DET_1
+15 0x0000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0000 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0000 //RX_NS_LVL_CTRL
+23 0x0000 //RX_THR_SN_EST
+24 0x0000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x0000 //RX_LMT_ALPHA
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+125 0x0000 //RX_LAMBDA_PKA_FP
+126 0x0000 //RX_TPKA_FP
+127 0x0000 //RX_MIN_G_FP
+128 0x0000 //RX_MAX_G_FP
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0000 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0000 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0044 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0000 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x004C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0000 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0044 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x286A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x4500 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0400 //TX_DELTA_THR_SN_EST_2
+253 0x0300 //TX_DELTA_THR_SN_EST_3
+254 0x0600 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0019 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0019 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0010 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x0011 //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000F //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x7000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x4000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0200 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0004 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0044 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x004C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0044 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x286A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x4500 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0400 //TX_DELTA_THR_SN_EST_2
+253 0x0300 //TX_DELTA_THR_SN_EST_3
+254 0x0600 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0019 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0019 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0010 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x0011 //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000F //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x7000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x4000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0200 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0004 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0000 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0044 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0000 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x004C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0000 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0044 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x286A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x4500 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0400 //TX_DELTA_THR_SN_EST_2
+253 0x0300 //TX_DELTA_THR_SN_EST_3
+254 0x0600 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0019 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0019 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0010 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x0011 //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000F //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x7000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x4000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0200 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0004 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0044 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x017F //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x004C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01AE //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4040 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2A28 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0044 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x2000 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x286A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0800 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x4500 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0400 //TX_DELTA_THR_SN_EST_2
+253 0x0300 //TX_DELTA_THR_SN_EST_3
+254 0x0600 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0019 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0019 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0010 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x0011 //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000F //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x7000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x4000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x2000 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0200 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0004 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x02D2 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
diff --git a/audio/whitefin/tuning/fortemedia/HANDSET.dat b/audio/whitefin/tuning/fortemedia/HANDSET.dat
new file mode 100644
index 0000000..147bd79
--- /dev/null
+++ b/audio/whitefin/tuning/fortemedia/HANDSET.dat
Binary files differ
diff --git a/audio/whitefin/tuning/fortemedia/HANDSET.mods b/audio/whitefin/tuning/fortemedia/HANDSET.mods
new file mode 100644
index 0000000..96a1829
--- /dev/null
+++ b/audio/whitefin/tuning/fortemedia/HANDSET.mods
@@ -0,0 +1,28053 @@
+#PLATFORM_NAME gChip
+#EXPORT_FLAG HANDSET
+#SINGLE_API_VER 1.1.6
+#SAVE_TIME 2021-01-25 11:34:13
+
+#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0036 //TX_PATCH_REG
+3 0x6F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7646 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0800 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x0200 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x0400 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x0400 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7B00 //TX_DTD_THR1_0
+198 0x7B00 //TX_DTD_THR1_1
+199 0x7B00 //TX_DTD_THR1_2
+200 0x7B00 //TX_DTD_THR1_3
+201 0x7B00 //TX_DTD_THR1_4
+202 0x7B00 //TX_DTD_THR1_5
+203 0x7B00 //TX_DTD_THR1_6
+204 0x1000 //TX_DTD_THR2_0
+205 0x1000 //TX_DTD_THR2_1
+206 0x1000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0FA0 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0000 //TX_RATIO_DT_L_TH_LOW
+224 0x0000 //TX_RATIO_DT_H_TH_LOW
+225 0x0000 //TX_RATIO_DT_L_TH_HIGH
+226 0x0000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0000 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0025 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0000 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xF800 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF900 //TX_THR_SN_EST_3
+246 0xF900 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x01A0 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x01A0 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x3000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x3000 //TX_LAMBDA_NN_EST_4
+263 0x3000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x0000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x3000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x3000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x3000 //TX_MAINREFRTO_TH_H
+277 0x1000 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x4000 //TX_B_POST_FLT_0
+280 0x4000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x001B //TX_NS_LVL_CTRL_1
+283 0x0019 //TX_NS_LVL_CTRL_2
+284 0x0017 //TX_NS_LVL_CTRL_3
+285 0x0017 //TX_NS_LVL_CTRL_4
+286 0x0019 //TX_NS_LVL_CTRL_5
+287 0x0014 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x0010 //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x5000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x4000 //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x3000 //TX_SNRI_SUP_7
+308 0x3000 //TX_THR_LFNS
+309 0x001A //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x7000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x2000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x2000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x4000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x7FFF //TX_B_POST_FILT_2
+325 0x5000 //TX_B_POST_FILT_3
+326 0x7FFF //TX_B_POST_FILT_4
+327 0x7FFF //TX_B_POST_FILT_5
+328 0x4000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7200 //TX_LAMBDA_PFILT_S_2
+342 0x7900 //TX_LAMBDA_PFILT_S_3
+343 0x7400 //TX_LAMBDA_PFILT_S_4
+344 0x7200 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x0C80 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0004 //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x0320 //TX_NOISE_TH_1
+371 0x022C //TX_NOISE_TH_2
+372 0x2710 //TX_NOISE_TH_3
+373 0x1B58 //TX_NOISE_TH_4
+374 0x7FFF //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x0640 //TX_NOISE_TH_6
+379 0x0004 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x000A //TX_NS_ENOISE_MIC0_TH
+406 0x0004 //TX_MINENOISE_MIC0_TH
+407 0x0014 //TX_MINENOISE_MIC0_S_TH
+408 0x4900 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x4000 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0640 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x001A //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0080 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0018 //TX_FDEQ_SUBNUM
+567 0x5454 //TX_FDEQ_GAIN_0
+568 0x5452 //TX_FDEQ_GAIN_1
+569 0x5250 //TX_FDEQ_GAIN_2
+570 0x504C //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x483C //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x483C //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4242 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0301 //TX_FDEQ_BIN_1
+593 0x0101 //TX_FDEQ_BIN_2
+594 0x0103 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0306 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x060A //TX_FDEQ_BIN_7
+599 0x0F04 //TX_FDEQ_BIN_8
+600 0x0402 //TX_FDEQ_BIN_9
+601 0x0708 //TX_FDEQ_BIN_10
+602 0x0708 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E48 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C08 //TX_PREEQ_BIN_MIC0_2
+644 0x0700 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0000 //TX_GAIN_LIMIT_1
+775 0x0006 //TX_GAIN_LIMIT_2
+776 0x0006 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0010 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0500 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x001C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0612 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0014 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0036 //TX_PATCH_REG
+3 0x2F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0800 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x0200 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x0400 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x0400 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0000 //TX_RATIO_DT_L_TH_LOW
+224 0x0000 //TX_RATIO_DT_H_TH_LOW
+225 0x0000 //TX_RATIO_DT_L_TH_HIGH
+226 0x0000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0000 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0120 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0000 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFB00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x01A0 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x5000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x0000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x2000 //TX_MAINREFRTOH_TH_H
+275 0x1400 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x4000 //TX_B_POST_FLT_1
+281 0x0018 //TX_NS_LVL_CTRL_0
+282 0x001C //TX_NS_LVL_CTRL_1
+283 0x0019 //TX_NS_LVL_CTRL_2
+284 0x001C //TX_NS_LVL_CTRL_3
+285 0x0019 //TX_NS_LVL_CTRL_4
+286 0x001A //TX_NS_LVL_CTRL_5
+287 0x001E //TX_NS_LVL_CTRL_6
+288 0x001C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0018 //TX_MIN_GAIN_S_1
+291 0x0012 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0012 //TX_MIN_GAIN_S_4
+294 0x0018 //TX_MIN_GAIN_S_5
+295 0x0018 //TX_MIN_GAIN_S_6
+296 0x0018 //TX_MIN_GAIN_S_7
+297 0x5000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x4000 //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x7000 //TX_A_POST_FILT_S_0
+315 0x7000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x2000 //TX_A_POST_FILT_S_4
+319 0x7000 //TX_A_POST_FILT_S_5
+320 0x7000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x5000 //TX_B_POST_FILT_2
+325 0x4000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x4000 //TX_B_POST_FILT_6
+329 0x4000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C29 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0600 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x0139 //TX_NOISE_TH_1
+371 0x0479 //TX_NOISE_TH_2
+372 0x2E90 //TX_NOISE_TH_3
+373 0x4422 //TX_NOISE_TH_4
+374 0x5586 //TX_NOISE_TH_5
+375 0x4425 //TX_NOISE_TH_5_2
+376 0x0032 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x21E8 //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4900 //TX_MIN_G_CTRL_SSNS
+409 0x1000 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x05A8 //TX_SB_RHO_MEAN2_TH
+441 0x0384 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0280 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0200 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4854 //TX_FDEQ_GAIN_10
+578 0x5454 //TX_FDEQ_GAIN_11
+579 0x5460 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0F0F //TX_FDEQ_BIN_9
+601 0x0F0F //TX_FDEQ_BIN_10
+602 0x0F0F //TX_FDEQ_BIN_11
+603 0x0F0A //TX_FDEQ_BIN_12
+604 0x1109 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2648 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C0C //TX_PREEQ_BIN_MIC0_2
+644 0x0C0F //TX_PREEQ_BIN_MIC0_3
+645 0x0F0F //TX_PREEQ_BIN_MIC0_4
+646 0x0F09 //TX_PREEQ_BIN_MIC0_5
+647 0x0909 //TX_PREEQ_BIN_MIC0_6
+648 0x0908 //TX_PREEQ_BIN_MIC0_7
+649 0x0700 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0000 //TX_GAIN_LIMIT_1
+775 0x0006 //TX_GAIN_LIMIT_2
+776 0x0006 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0002 //TX_TDDRC_THRD_0
+855 0x0003 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0480 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x199A //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x2000 //TX_B_LESSCUT_RTO_MASK
+877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x001C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0520 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0014 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x1000 //RX_LMT_THRD
+37 0x7FDF //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0026 //TX_PATCH_REG
+3 0x6F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7900 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0400 //TX_MIN_EQ_RE_EST_0
+153 0x0400 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x1000 //TX_MIN_EQ_RE_EST_4
+157 0x1000 //TX_MIN_EQ_RE_EST_5
+158 0x1000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x1800 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x6000 //TX_DTD_THR3
+212 0x0177 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0C00 //TX_RATIO_DT_L_TH_LOW
+224 0x2000 //TX_RATIO_DT_H_TH_LOW
+225 0x1800 //TX_RATIO_DT_L_TH_HIGH
+226 0x3000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0A00 //TX_RATIO_DT_L0_TH
+228 0x7000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0240 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x0600 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0018 //TX_NS_LVL_CTRL_4
+286 0x0016 //TX_NS_LVL_CTRL_5
+287 0x0012 //TX_NS_LVL_CTRL_6
+288 0x0017 //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0012 //TX_MIN_GAIN_S_1
+291 0x0007 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0012 //TX_MIN_GAIN_S_5
+295 0x0012 //TX_MIN_GAIN_S_6
+296 0x0012 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x6000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x6000 //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x6000 //TX_SNRI_SUP_7
+308 0x6000 //TX_THR_LFNS
+309 0x0017 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x3000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x6000 //TX_B_POST_FILT_6
+329 0x3000 //TX_B_POST_FILT_7
+330 0x1000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x07D0 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x00C6 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x47E0 //TX_NOISE_TH_4
+374 0x57E4 //TX_NOISE_TH_5
+375 0x4BD6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x39DF //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x0200 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x2000 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x051E //TX_SB_RHO_MEAN2_TH
+441 0x02F0 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0300 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x5454 //TX_FDEQ_GAIN_6
+574 0x5048 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x5058 //TX_FDEQ_GAIN_10
+578 0x5058 //TX_FDEQ_GAIN_11
+579 0x6464 //TX_FDEQ_GAIN_12
+580 0x4864 //TX_FDEQ_GAIN_13
+581 0x6460 //TX_FDEQ_GAIN_14
+582 0x4C58 //TX_FDEQ_GAIN_15
+583 0x8080 //TX_FDEQ_GAIN_16
+584 0x8048 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x080E //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0F0F //TX_FDEQ_BIN_9
+601 0x0E0D //TX_FDEQ_BIN_10
+602 0x0F28 //TX_FDEQ_BIN_11
+603 0x111B //TX_FDEQ_BIN_12
+604 0x291E //TX_FDEQ_BIN_13
+605 0x1E10 //TX_FDEQ_BIN_14
+606 0x1810 //TX_FDEQ_BIN_15
+607 0x1021 //TX_FDEQ_BIN_16
+608 0x1000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2625 //TX_PREEQ_GAIN_MIC0_8
+626 0x2421 //TX_PREEQ_GAIN_MIC0_9
+627 0x1D19 //TX_PREEQ_GAIN_MIC0_10
+628 0x1820 //TX_PREEQ_GAIN_MIC0_11
+629 0x2830 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C0C //TX_PREEQ_BIN_MIC0_2
+644 0x0C0F //TX_PREEQ_BIN_MIC0_3
+645 0x0F0F //TX_PREEQ_BIN_MIC0_4
+646 0x0F09 //TX_PREEQ_BIN_MIC0_5
+647 0x0909 //TX_PREEQ_BIN_MIC0_6
+648 0x0908 //TX_PREEQ_BIN_MIC0_7
+649 0x070F //TX_PREEQ_BIN_MIC0_8
+650 0x1F08 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0920 //TX_PREEQ_BIN_MIC0_11
+653 0x2020 //TX_PREEQ_BIN_MIC0_12
+654 0x2021 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0056 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0042 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0006 //TX_GAIN_LIMIT_1
+775 0x0000 //TX_GAIN_LIMIT_2
+776 0x0000 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0002 //TX_TDDRC_THRD_0
+855 0x0003 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x04F0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0xECCD //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x2000 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x001C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x064E //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x5800 //RX_THR_PITCH_DET_0
+14 0x5000 //RX_THR_PITCH_DET_1
+15 0x4000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0026 //TX_PATCH_REG
+3 0x6B7A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7900 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0400 //TX_MIN_EQ_RE_EST_0
+153 0x0400 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x1000 //TX_MIN_EQ_RE_EST_4
+157 0x1000 //TX_MIN_EQ_RE_EST_5
+158 0x1000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x1800 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x6000 //TX_DTD_THR3
+212 0x0177 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0C00 //TX_RATIO_DT_L_TH_LOW
+224 0x2000 //TX_RATIO_DT_H_TH_LOW
+225 0x1800 //TX_RATIO_DT_L_TH_HIGH
+226 0x3000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0A00 //TX_RATIO_DT_L0_TH
+228 0x7000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0360 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x0600 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0018 //TX_NS_LVL_CTRL_4
+286 0x0016 //TX_NS_LVL_CTRL_5
+287 0x0012 //TX_NS_LVL_CTRL_6
+288 0x0017 //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0012 //TX_MIN_GAIN_S_1
+291 0x0007 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0012 //TX_MIN_GAIN_S_5
+295 0x0012 //TX_MIN_GAIN_S_6
+296 0x0012 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x6000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x6000 //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x6000 //TX_SNRI_SUP_7
+308 0x6000 //TX_THR_LFNS
+309 0x0017 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x3000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x6000 //TX_B_POST_FILT_6
+329 0x3000 //TX_B_POST_FILT_7
+330 0x1000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x07D0 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x00C6 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x47E0 //TX_NOISE_TH_4
+374 0x57E4 //TX_NOISE_TH_5
+375 0x4BD6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x39DF //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x0200 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x2000 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x051E //TX_SB_RHO_MEAN2_TH
+441 0x051E //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0300 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4854 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x5454 //TX_FDEQ_GAIN_5
+573 0x5454 //TX_FDEQ_GAIN_6
+574 0x6048 //TX_FDEQ_GAIN_7
+575 0x5454 //TX_FDEQ_GAIN_8
+576 0x6464 //TX_FDEQ_GAIN_9
+577 0x6464 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x9898 //TX_FDEQ_GAIN_12
+580 0x9898 //TX_FDEQ_GAIN_13
+581 0x9898 //TX_FDEQ_GAIN_14
+582 0x9898 //TX_FDEQ_GAIN_15
+583 0x9898 //TX_FDEQ_GAIN_16
+584 0x9898 //TX_FDEQ_GAIN_17
+585 0x9898 //TX_FDEQ_GAIN_18
+586 0x9848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0F03 //TX_FDEQ_BIN_0
+592 0x0909 //TX_FDEQ_BIN_1
+593 0x080F //TX_FDEQ_BIN_2
+594 0x0609 //TX_FDEQ_BIN_3
+595 0x0F03 //TX_FDEQ_BIN_4
+596 0x1402 //TX_FDEQ_BIN_5
+597 0x0E13 //TX_FDEQ_BIN_6
+598 0x110F //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x0E0F //TX_FDEQ_BIN_9
+601 0x080D //TX_FDEQ_BIN_10
+602 0x0F0F //TX_FDEQ_BIN_11
+603 0x0F0F //TX_FDEQ_BIN_12
+604 0x0A0F //TX_FDEQ_BIN_13
+605 0x0809 //TX_FDEQ_BIN_14
+606 0x0A0B //TX_FDEQ_BIN_15
+607 0x0C0D //TX_FDEQ_BIN_16
+608 0x0E0F //TX_FDEQ_BIN_17
+609 0x1013 //TX_FDEQ_BIN_18
+610 0x0A00 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2625 //TX_PREEQ_GAIN_MIC0_8
+626 0x2421 //TX_PREEQ_GAIN_MIC0_9
+627 0x1D19 //TX_PREEQ_GAIN_MIC0_10
+628 0x1820 //TX_PREEQ_GAIN_MIC0_11
+629 0x2830 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x1812 //TX_PREEQ_BIN_MIC0_0
+642 0x0A0A //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x080A //TX_PREEQ_BIN_MIC0_3
+645 0x0B09 //TX_PREEQ_BIN_MIC0_4
+646 0x0A06 //TX_PREEQ_BIN_MIC0_5
+647 0x0606 //TX_PREEQ_BIN_MIC0_6
+648 0x0605 //TX_PREEQ_BIN_MIC0_7
+649 0x050A //TX_PREEQ_BIN_MIC0_8
+650 0x1505 //TX_PREEQ_BIN_MIC0_9
+651 0x0506 //TX_PREEQ_BIN_MIC0_10
+652 0x0615 //TX_PREEQ_BIN_MIC0_11
+653 0x1516 //TX_PREEQ_BIN_MIC0_12
+654 0x2021 //TX_PREEQ_BIN_MIC0_13
+655 0x2021 //TX_PREEQ_BIN_MIC0_14
+656 0x2021 //TX_PREEQ_BIN_MIC0_15
+657 0x0800 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x03A0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0xECCD //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x2000 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x001C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x064E //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x5800 //RX_THR_PITCH_DET_0
+14 0x5000 //RX_THR_PITCH_DET_1
+15 0x4000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0036 //TX_PATCH_REG
+3 0x6F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7646 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0800 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x0200 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x0400 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x0400 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7B00 //TX_DTD_THR1_0
+198 0x7B00 //TX_DTD_THR1_1
+199 0x7B00 //TX_DTD_THR1_2
+200 0x7B00 //TX_DTD_THR1_3
+201 0x7B00 //TX_DTD_THR1_4
+202 0x7B00 //TX_DTD_THR1_5
+203 0x7B00 //TX_DTD_THR1_6
+204 0x1000 //TX_DTD_THR2_0
+205 0x1000 //TX_DTD_THR2_1
+206 0x1000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0FA0 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0000 //TX_RATIO_DT_L_TH_LOW
+224 0x0000 //TX_RATIO_DT_H_TH_LOW
+225 0x0000 //TX_RATIO_DT_L_TH_HIGH
+226 0x0000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0000 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0025 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0000 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xF800 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF900 //TX_THR_SN_EST_3
+246 0xF900 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x01A0 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x01A0 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x3000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x3000 //TX_LAMBDA_NN_EST_4
+263 0x3000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x0000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x3000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x3000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x3000 //TX_MAINREFRTO_TH_H
+277 0x1000 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x4000 //TX_B_POST_FLT_0
+280 0x4000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x001B //TX_NS_LVL_CTRL_1
+283 0x0019 //TX_NS_LVL_CTRL_2
+284 0x0017 //TX_NS_LVL_CTRL_3
+285 0x0017 //TX_NS_LVL_CTRL_4
+286 0x0019 //TX_NS_LVL_CTRL_5
+287 0x0014 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x0010 //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x5000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x4000 //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x3000 //TX_SNRI_SUP_7
+308 0x3000 //TX_THR_LFNS
+309 0x001A //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x7000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x2000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x2000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x4000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x7FFF //TX_B_POST_FILT_2
+325 0x5000 //TX_B_POST_FILT_3
+326 0x7FFF //TX_B_POST_FILT_4
+327 0x7FFF //TX_B_POST_FILT_5
+328 0x4000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7200 //TX_LAMBDA_PFILT_S_2
+342 0x7900 //TX_LAMBDA_PFILT_S_3
+343 0x7400 //TX_LAMBDA_PFILT_S_4
+344 0x7200 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x0C80 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0004 //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x0320 //TX_NOISE_TH_1
+371 0x022C //TX_NOISE_TH_2
+372 0x2710 //TX_NOISE_TH_3
+373 0x1B58 //TX_NOISE_TH_4
+374 0x7FFF //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x0640 //TX_NOISE_TH_6
+379 0x0004 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x000A //TX_NS_ENOISE_MIC0_TH
+406 0x0004 //TX_MINENOISE_MIC0_TH
+407 0x0014 //TX_MINENOISE_MIC0_S_TH
+408 0x4900 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x4000 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0640 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x001A //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0080 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0018 //TX_FDEQ_SUBNUM
+567 0x5454 //TX_FDEQ_GAIN_0
+568 0x5452 //TX_FDEQ_GAIN_1
+569 0x5250 //TX_FDEQ_GAIN_2
+570 0x504C //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x483C //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x483C //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4242 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0301 //TX_FDEQ_BIN_1
+593 0x0101 //TX_FDEQ_BIN_2
+594 0x0103 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0306 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x060A //TX_FDEQ_BIN_7
+599 0x0F04 //TX_FDEQ_BIN_8
+600 0x0402 //TX_FDEQ_BIN_9
+601 0x0708 //TX_FDEQ_BIN_10
+602 0x0708 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E48 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C08 //TX_PREEQ_BIN_MIC0_2
+644 0x0700 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0000 //TX_GAIN_LIMIT_1
+775 0x0006 //TX_GAIN_LIMIT_2
+776 0x0006 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0010 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0500 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x000C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0014 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0036 //TX_PATCH_REG
+3 0x2F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0800 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x0200 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x0400 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x0400 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0000 //TX_RATIO_DT_L_TH_LOW
+224 0x0000 //TX_RATIO_DT_H_TH_LOW
+225 0x0000 //TX_RATIO_DT_L_TH_HIGH
+226 0x0000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0000 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0120 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0000 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFB00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x01A0 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x5000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x0000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x2000 //TX_MAINREFRTOH_TH_H
+275 0x1400 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x4000 //TX_B_POST_FLT_1
+281 0x0018 //TX_NS_LVL_CTRL_0
+282 0x001C //TX_NS_LVL_CTRL_1
+283 0x0019 //TX_NS_LVL_CTRL_2
+284 0x001C //TX_NS_LVL_CTRL_3
+285 0x0019 //TX_NS_LVL_CTRL_4
+286 0x001A //TX_NS_LVL_CTRL_5
+287 0x001E //TX_NS_LVL_CTRL_6
+288 0x001C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0018 //TX_MIN_GAIN_S_1
+291 0x0012 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0012 //TX_MIN_GAIN_S_4
+294 0x0018 //TX_MIN_GAIN_S_5
+295 0x0018 //TX_MIN_GAIN_S_6
+296 0x0018 //TX_MIN_GAIN_S_7
+297 0x5000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x4000 //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x7000 //TX_A_POST_FILT_S_0
+315 0x7000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x2000 //TX_A_POST_FILT_S_4
+319 0x7000 //TX_A_POST_FILT_S_5
+320 0x7000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x5000 //TX_B_POST_FILT_2
+325 0x4000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x4000 //TX_B_POST_FILT_6
+329 0x4000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C29 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0600 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x0139 //TX_NOISE_TH_1
+371 0x0479 //TX_NOISE_TH_2
+372 0x2E90 //TX_NOISE_TH_3
+373 0x4422 //TX_NOISE_TH_4
+374 0x5586 //TX_NOISE_TH_5
+375 0x4425 //TX_NOISE_TH_5_2
+376 0x0032 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x21E8 //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4900 //TX_MIN_G_CTRL_SSNS
+409 0x1000 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x05A8 //TX_SB_RHO_MEAN2_TH
+441 0x0384 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0280 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0200 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4854 //TX_FDEQ_GAIN_10
+578 0x5454 //TX_FDEQ_GAIN_11
+579 0x5460 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0F0F //TX_FDEQ_BIN_9
+601 0x0F0F //TX_FDEQ_BIN_10
+602 0x0F0F //TX_FDEQ_BIN_11
+603 0x0F0A //TX_FDEQ_BIN_12
+604 0x1109 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2648 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C0C //TX_PREEQ_BIN_MIC0_2
+644 0x0C0F //TX_PREEQ_BIN_MIC0_3
+645 0x0F0F //TX_PREEQ_BIN_MIC0_4
+646 0x0F09 //TX_PREEQ_BIN_MIC0_5
+647 0x0909 //TX_PREEQ_BIN_MIC0_6
+648 0x0908 //TX_PREEQ_BIN_MIC0_7
+649 0x0700 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0000 //TX_GAIN_LIMIT_1
+775 0x0006 //TX_GAIN_LIMIT_2
+776 0x0006 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0002 //TX_TDDRC_THRD_0
+855 0x0003 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0480 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x199A //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x2000 //TX_B_LESSCUT_RTO_MASK
+877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x000C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0014 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0026 //TX_PATCH_REG
+3 0x6F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7900 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0400 //TX_MIN_EQ_RE_EST_0
+153 0x0400 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x1000 //TX_MIN_EQ_RE_EST_4
+157 0x1000 //TX_MIN_EQ_RE_EST_5
+158 0x1000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x1800 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x6000 //TX_DTD_THR3
+212 0x0177 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0C00 //TX_RATIO_DT_L_TH_LOW
+224 0x2000 //TX_RATIO_DT_H_TH_LOW
+225 0x1800 //TX_RATIO_DT_L_TH_HIGH
+226 0x3000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0A00 //TX_RATIO_DT_L0_TH
+228 0x7000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0240 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x0600 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0018 //TX_NS_LVL_CTRL_4
+286 0x0016 //TX_NS_LVL_CTRL_5
+287 0x0012 //TX_NS_LVL_CTRL_6
+288 0x0017 //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0012 //TX_MIN_GAIN_S_1
+291 0x0007 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0012 //TX_MIN_GAIN_S_5
+295 0x0012 //TX_MIN_GAIN_S_6
+296 0x0012 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x6000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x6000 //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x6000 //TX_SNRI_SUP_7
+308 0x6000 //TX_THR_LFNS
+309 0x0017 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x3000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x6000 //TX_B_POST_FILT_6
+329 0x3000 //TX_B_POST_FILT_7
+330 0x1000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x07D0 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x00C6 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x47E0 //TX_NOISE_TH_4
+374 0x57E4 //TX_NOISE_TH_5
+375 0x4BD6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x39DF //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x0200 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x2000 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x051E //TX_SB_RHO_MEAN2_TH
+441 0x02F0 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0300 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x5454 //TX_FDEQ_GAIN_6
+574 0x5048 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x5058 //TX_FDEQ_GAIN_10
+578 0x5058 //TX_FDEQ_GAIN_11
+579 0x6464 //TX_FDEQ_GAIN_12
+580 0x4864 //TX_FDEQ_GAIN_13
+581 0x6460 //TX_FDEQ_GAIN_14
+582 0x4C58 //TX_FDEQ_GAIN_15
+583 0x8080 //TX_FDEQ_GAIN_16
+584 0x8048 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x080E //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0F0F //TX_FDEQ_BIN_9
+601 0x0E0D //TX_FDEQ_BIN_10
+602 0x0F28 //TX_FDEQ_BIN_11
+603 0x111B //TX_FDEQ_BIN_12
+604 0x291E //TX_FDEQ_BIN_13
+605 0x1E10 //TX_FDEQ_BIN_14
+606 0x1810 //TX_FDEQ_BIN_15
+607 0x1021 //TX_FDEQ_BIN_16
+608 0x1000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2625 //TX_PREEQ_GAIN_MIC0_8
+626 0x2421 //TX_PREEQ_GAIN_MIC0_9
+627 0x1D19 //TX_PREEQ_GAIN_MIC0_10
+628 0x1820 //TX_PREEQ_GAIN_MIC0_11
+629 0x2830 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C0C //TX_PREEQ_BIN_MIC0_2
+644 0x0C0F //TX_PREEQ_BIN_MIC0_3
+645 0x0F0F //TX_PREEQ_BIN_MIC0_4
+646 0x0F09 //TX_PREEQ_BIN_MIC0_5
+647 0x0909 //TX_PREEQ_BIN_MIC0_6
+648 0x0908 //TX_PREEQ_BIN_MIC0_7
+649 0x070F //TX_PREEQ_BIN_MIC0_8
+650 0x1F08 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0920 //TX_PREEQ_BIN_MIC0_11
+653 0x2020 //TX_PREEQ_BIN_MIC0_12
+654 0x2021 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0056 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0042 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0006 //TX_GAIN_LIMIT_1
+775 0x0000 //TX_GAIN_LIMIT_2
+776 0x0000 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0002 //TX_TDDRC_THRD_0
+855 0x0003 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x04F0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0xECCD //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x2000 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x000C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x5800 //RX_THR_PITCH_DET_0
+14 0x5000 //RX_THR_PITCH_DET_1
+15 0x4000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0026 //TX_PATCH_REG
+3 0x6B7A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7900 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0400 //TX_MIN_EQ_RE_EST_0
+153 0x0400 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x1000 //TX_MIN_EQ_RE_EST_4
+157 0x1000 //TX_MIN_EQ_RE_EST_5
+158 0x1000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x1800 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x6000 //TX_DTD_THR3
+212 0x0177 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0C00 //TX_RATIO_DT_L_TH_LOW
+224 0x2000 //TX_RATIO_DT_H_TH_LOW
+225 0x1800 //TX_RATIO_DT_L_TH_HIGH
+226 0x3000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0A00 //TX_RATIO_DT_L0_TH
+228 0x7000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0360 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x0600 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0018 //TX_NS_LVL_CTRL_4
+286 0x0016 //TX_NS_LVL_CTRL_5
+287 0x0012 //TX_NS_LVL_CTRL_6
+288 0x0017 //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0012 //TX_MIN_GAIN_S_1
+291 0x0007 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0012 //TX_MIN_GAIN_S_5
+295 0x0012 //TX_MIN_GAIN_S_6
+296 0x0012 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x6000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x6000 //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x6000 //TX_SNRI_SUP_7
+308 0x6000 //TX_THR_LFNS
+309 0x0017 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x3000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x6000 //TX_B_POST_FILT_6
+329 0x3000 //TX_B_POST_FILT_7
+330 0x1000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x07D0 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x00C6 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x47E0 //TX_NOISE_TH_4
+374 0x57E4 //TX_NOISE_TH_5
+375 0x4BD6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x39DF //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x0200 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x2000 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x051E //TX_SB_RHO_MEAN2_TH
+441 0x051E //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0300 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4854 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x5454 //TX_FDEQ_GAIN_5
+573 0x5454 //TX_FDEQ_GAIN_6
+574 0x6048 //TX_FDEQ_GAIN_7
+575 0x5454 //TX_FDEQ_GAIN_8
+576 0x6464 //TX_FDEQ_GAIN_9
+577 0x6464 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x9898 //TX_FDEQ_GAIN_12
+580 0x9898 //TX_FDEQ_GAIN_13
+581 0x9898 //TX_FDEQ_GAIN_14
+582 0x9898 //TX_FDEQ_GAIN_15
+583 0x9898 //TX_FDEQ_GAIN_16
+584 0x9898 //TX_FDEQ_GAIN_17
+585 0x9898 //TX_FDEQ_GAIN_18
+586 0x9848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0F03 //TX_FDEQ_BIN_0
+592 0x0909 //TX_FDEQ_BIN_1
+593 0x080F //TX_FDEQ_BIN_2
+594 0x0609 //TX_FDEQ_BIN_3
+595 0x0F03 //TX_FDEQ_BIN_4
+596 0x1402 //TX_FDEQ_BIN_5
+597 0x0E13 //TX_FDEQ_BIN_6
+598 0x110F //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x0E0F //TX_FDEQ_BIN_9
+601 0x080D //TX_FDEQ_BIN_10
+602 0x0F0F //TX_FDEQ_BIN_11
+603 0x0F0F //TX_FDEQ_BIN_12
+604 0x0A0F //TX_FDEQ_BIN_13
+605 0x0809 //TX_FDEQ_BIN_14
+606 0x0A0B //TX_FDEQ_BIN_15
+607 0x0C0D //TX_FDEQ_BIN_16
+608 0x0E0F //TX_FDEQ_BIN_17
+609 0x1013 //TX_FDEQ_BIN_18
+610 0x0A00 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2625 //TX_PREEQ_GAIN_MIC0_8
+626 0x2421 //TX_PREEQ_GAIN_MIC0_9
+627 0x1D19 //TX_PREEQ_GAIN_MIC0_10
+628 0x1820 //TX_PREEQ_GAIN_MIC0_11
+629 0x2830 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x1812 //TX_PREEQ_BIN_MIC0_0
+642 0x0A0A //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x080A //TX_PREEQ_BIN_MIC0_3
+645 0x0B09 //TX_PREEQ_BIN_MIC0_4
+646 0x0A06 //TX_PREEQ_BIN_MIC0_5
+647 0x0606 //TX_PREEQ_BIN_MIC0_6
+648 0x0605 //TX_PREEQ_BIN_MIC0_7
+649 0x050A //TX_PREEQ_BIN_MIC0_8
+650 0x1505 //TX_PREEQ_BIN_MIC0_9
+651 0x0506 //TX_PREEQ_BIN_MIC0_10
+652 0x0615 //TX_PREEQ_BIN_MIC0_11
+653 0x1516 //TX_PREEQ_BIN_MIC0_12
+654 0x2021 //TX_PREEQ_BIN_MIC0_13
+655 0x2021 //TX_PREEQ_BIN_MIC0_14
+656 0x2021 //TX_PREEQ_BIN_MIC0_15
+657 0x0800 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x03A0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0xECCD //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x2000 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x000C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x5800 //RX_THR_PITCH_DET_0
+14 0x5000 //RX_THR_PITCH_DET_1
+15 0x4000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET-TMOBILE_US-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0036 //TX_PATCH_REG
+3 0x6F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7646 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0800 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x0200 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x0400 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x0400 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7B00 //TX_DTD_THR1_0
+198 0x7B00 //TX_DTD_THR1_1
+199 0x7B00 //TX_DTD_THR1_2
+200 0x7B00 //TX_DTD_THR1_3
+201 0x7B00 //TX_DTD_THR1_4
+202 0x7B00 //TX_DTD_THR1_5
+203 0x7B00 //TX_DTD_THR1_6
+204 0x1000 //TX_DTD_THR2_0
+205 0x1000 //TX_DTD_THR2_1
+206 0x1000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0FA0 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0000 //TX_RATIO_DT_L_TH_LOW
+224 0x0000 //TX_RATIO_DT_H_TH_LOW
+225 0x0000 //TX_RATIO_DT_L_TH_HIGH
+226 0x0000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0000 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0025 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0000 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xF800 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF900 //TX_THR_SN_EST_3
+246 0xF900 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x01A0 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x01A0 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x3000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x3000 //TX_LAMBDA_NN_EST_4
+263 0x3000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x0000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x3000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x3000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x3000 //TX_MAINREFRTO_TH_H
+277 0x1000 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x4000 //TX_B_POST_FLT_0
+280 0x4000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x001B //TX_NS_LVL_CTRL_1
+283 0x0019 //TX_NS_LVL_CTRL_2
+284 0x0017 //TX_NS_LVL_CTRL_3
+285 0x0017 //TX_NS_LVL_CTRL_4
+286 0x0019 //TX_NS_LVL_CTRL_5
+287 0x0014 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x0010 //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x5000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x4000 //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x3000 //TX_SNRI_SUP_7
+308 0x3000 //TX_THR_LFNS
+309 0x001A //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x7000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x2000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x2000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x4000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x7FFF //TX_B_POST_FILT_2
+325 0x5000 //TX_B_POST_FILT_3
+326 0x7FFF //TX_B_POST_FILT_4
+327 0x7FFF //TX_B_POST_FILT_5
+328 0x4000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7200 //TX_LAMBDA_PFILT_S_2
+342 0x7900 //TX_LAMBDA_PFILT_S_3
+343 0x7400 //TX_LAMBDA_PFILT_S_4
+344 0x7200 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x0C80 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0004 //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x0320 //TX_NOISE_TH_1
+371 0x022C //TX_NOISE_TH_2
+372 0x2710 //TX_NOISE_TH_3
+373 0x1B58 //TX_NOISE_TH_4
+374 0x7FFF //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x0640 //TX_NOISE_TH_6
+379 0x0004 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x000A //TX_NS_ENOISE_MIC0_TH
+406 0x0004 //TX_MINENOISE_MIC0_TH
+407 0x0014 //TX_MINENOISE_MIC0_S_TH
+408 0x4900 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x4000 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0640 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x001A //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0080 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0018 //TX_FDEQ_SUBNUM
+567 0x5454 //TX_FDEQ_GAIN_0
+568 0x5452 //TX_FDEQ_GAIN_1
+569 0x5250 //TX_FDEQ_GAIN_2
+570 0x504C //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x483C //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x483C //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4242 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0301 //TX_FDEQ_BIN_1
+593 0x0101 //TX_FDEQ_BIN_2
+594 0x0103 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0306 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x060A //TX_FDEQ_BIN_7
+599 0x0F04 //TX_FDEQ_BIN_8
+600 0x0402 //TX_FDEQ_BIN_9
+601 0x0708 //TX_FDEQ_BIN_10
+602 0x0708 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E48 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C08 //TX_PREEQ_BIN_MIC0_2
+644 0x0700 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0000 //TX_GAIN_LIMIT_1
+775 0x0006 //TX_GAIN_LIMIT_2
+776 0x0006 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0010 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0500 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x001C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0612 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0014 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x9F48 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x5458 //RX_FDEQ_GAIN_2
+42 0x6062 //RX_FDEQ_GAIN_3
+43 0x605C //RX_FDEQ_GAIN_4
+44 0x5854 //RX_FDEQ_GAIN_5
+45 0x5454 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x585E //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x6C6C //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET-TMOBILE_US-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0036 //TX_PATCH_REG
+3 0x2F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0800 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x0200 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x0400 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x0400 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0000 //TX_RATIO_DT_L_TH_LOW
+224 0x0000 //TX_RATIO_DT_H_TH_LOW
+225 0x0000 //TX_RATIO_DT_L_TH_HIGH
+226 0x0000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0000 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0120 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0000 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFB00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x01A0 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x5000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x0000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x2000 //TX_MAINREFRTOH_TH_H
+275 0x1400 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x4000 //TX_B_POST_FLT_1
+281 0x0018 //TX_NS_LVL_CTRL_0
+282 0x001C //TX_NS_LVL_CTRL_1
+283 0x0019 //TX_NS_LVL_CTRL_2
+284 0x001C //TX_NS_LVL_CTRL_3
+285 0x0019 //TX_NS_LVL_CTRL_4
+286 0x001A //TX_NS_LVL_CTRL_5
+287 0x001E //TX_NS_LVL_CTRL_6
+288 0x001C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0018 //TX_MIN_GAIN_S_1
+291 0x0012 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0012 //TX_MIN_GAIN_S_4
+294 0x0018 //TX_MIN_GAIN_S_5
+295 0x0018 //TX_MIN_GAIN_S_6
+296 0x0018 //TX_MIN_GAIN_S_7
+297 0x5000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x4000 //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x7000 //TX_A_POST_FILT_S_0
+315 0x7000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x2000 //TX_A_POST_FILT_S_4
+319 0x7000 //TX_A_POST_FILT_S_5
+320 0x7000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x5000 //TX_B_POST_FILT_2
+325 0x4000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x4000 //TX_B_POST_FILT_6
+329 0x4000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C29 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0600 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x0139 //TX_NOISE_TH_1
+371 0x0479 //TX_NOISE_TH_2
+372 0x2E90 //TX_NOISE_TH_3
+373 0x4422 //TX_NOISE_TH_4
+374 0x5586 //TX_NOISE_TH_5
+375 0x4425 //TX_NOISE_TH_5_2
+376 0x0032 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x21E8 //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4900 //TX_MIN_G_CTRL_SSNS
+409 0x1000 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x05A8 //TX_SB_RHO_MEAN2_TH
+441 0x0384 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0280 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0200 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4854 //TX_FDEQ_GAIN_10
+578 0x5454 //TX_FDEQ_GAIN_11
+579 0x5460 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0F0F //TX_FDEQ_BIN_9
+601 0x0F0F //TX_FDEQ_BIN_10
+602 0x0F0F //TX_FDEQ_BIN_11
+603 0x0F0A //TX_FDEQ_BIN_12
+604 0x1109 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2648 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C0C //TX_PREEQ_BIN_MIC0_2
+644 0x0C0F //TX_PREEQ_BIN_MIC0_3
+645 0x0F0F //TX_PREEQ_BIN_MIC0_4
+646 0x0F09 //TX_PREEQ_BIN_MIC0_5
+647 0x0909 //TX_PREEQ_BIN_MIC0_6
+648 0x0908 //TX_PREEQ_BIN_MIC0_7
+649 0x0700 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0000 //TX_GAIN_LIMIT_1
+775 0x0006 //TX_GAIN_LIMIT_2
+776 0x0006 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0002 //TX_TDDRC_THRD_0
+855 0x0003 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0480 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x199A //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x2000 //TX_B_LESSCUT_RTO_MASK
+877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x001C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0520 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0014 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x1000 //RX_LMT_THRD
+37 0x7FDF //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x7F40 //RX_FDEQ_GAIN_0
+40 0x4044 //RX_FDEQ_GAIN_1
+41 0x5456 //RX_FDEQ_GAIN_2
+42 0x5E62 //RX_FDEQ_GAIN_3
+43 0x6060 //RX_FDEQ_GAIN_4
+44 0x5C58 //RX_FDEQ_GAIN_5
+45 0x5460 //RX_FDEQ_GAIN_6
+46 0x6268 //RX_FDEQ_GAIN_7
+47 0x686C //RX_FDEQ_GAIN_8
+48 0x7070 //RX_FDEQ_GAIN_9
+49 0x7C78 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET-TMOBILE_US-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0026 //TX_PATCH_REG
+3 0x6F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7900 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0400 //TX_MIN_EQ_RE_EST_0
+153 0x0400 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x1000 //TX_MIN_EQ_RE_EST_4
+157 0x1000 //TX_MIN_EQ_RE_EST_5
+158 0x1000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x1800 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x6000 //TX_DTD_THR3
+212 0x0177 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0C00 //TX_RATIO_DT_L_TH_LOW
+224 0x2000 //TX_RATIO_DT_H_TH_LOW
+225 0x1800 //TX_RATIO_DT_L_TH_HIGH
+226 0x3000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0A00 //TX_RATIO_DT_L0_TH
+228 0x7000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0240 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x0600 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0018 //TX_NS_LVL_CTRL_4
+286 0x0016 //TX_NS_LVL_CTRL_5
+287 0x0012 //TX_NS_LVL_CTRL_6
+288 0x0017 //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0012 //TX_MIN_GAIN_S_1
+291 0x0007 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0012 //TX_MIN_GAIN_S_5
+295 0x0012 //TX_MIN_GAIN_S_6
+296 0x0012 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x6000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x6000 //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x6000 //TX_SNRI_SUP_7
+308 0x6000 //TX_THR_LFNS
+309 0x0017 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x3000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x6000 //TX_B_POST_FILT_6
+329 0x3000 //TX_B_POST_FILT_7
+330 0x1000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x07D0 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x00C6 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x47E0 //TX_NOISE_TH_4
+374 0x57E4 //TX_NOISE_TH_5
+375 0x4BD6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x39DF //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x0200 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x2000 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x051E //TX_SB_RHO_MEAN2_TH
+441 0x02F0 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0300 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x5454 //TX_FDEQ_GAIN_6
+574 0x5048 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x5058 //TX_FDEQ_GAIN_10
+578 0x5058 //TX_FDEQ_GAIN_11
+579 0x6464 //TX_FDEQ_GAIN_12
+580 0x4864 //TX_FDEQ_GAIN_13
+581 0x6460 //TX_FDEQ_GAIN_14
+582 0x4C58 //TX_FDEQ_GAIN_15
+583 0x8080 //TX_FDEQ_GAIN_16
+584 0x8048 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x080E //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0F0F //TX_FDEQ_BIN_9
+601 0x0E0D //TX_FDEQ_BIN_10
+602 0x0F28 //TX_FDEQ_BIN_11
+603 0x111B //TX_FDEQ_BIN_12
+604 0x291E //TX_FDEQ_BIN_13
+605 0x1E10 //TX_FDEQ_BIN_14
+606 0x1810 //TX_FDEQ_BIN_15
+607 0x1021 //TX_FDEQ_BIN_16
+608 0x1000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2625 //TX_PREEQ_GAIN_MIC0_8
+626 0x2421 //TX_PREEQ_GAIN_MIC0_9
+627 0x1D19 //TX_PREEQ_GAIN_MIC0_10
+628 0x1820 //TX_PREEQ_GAIN_MIC0_11
+629 0x2830 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C0C //TX_PREEQ_BIN_MIC0_2
+644 0x0C0F //TX_PREEQ_BIN_MIC0_3
+645 0x0F0F //TX_PREEQ_BIN_MIC0_4
+646 0x0F09 //TX_PREEQ_BIN_MIC0_5
+647 0x0909 //TX_PREEQ_BIN_MIC0_6
+648 0x0908 //TX_PREEQ_BIN_MIC0_7
+649 0x070F //TX_PREEQ_BIN_MIC0_8
+650 0x1F08 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0920 //TX_PREEQ_BIN_MIC0_11
+653 0x2020 //TX_PREEQ_BIN_MIC0_12
+654 0x2021 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0056 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0042 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0006 //TX_GAIN_LIMIT_1
+775 0x0000 //TX_GAIN_LIMIT_2
+776 0x0000 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0002 //TX_TDDRC_THRD_0
+855 0x0003 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x04F0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0xECCD //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x2000 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x001C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x064E //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x5800 //RX_THR_PITCH_DET_0
+14 0x5000 //RX_THR_PITCH_DET_1
+15 0x4000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET-TMOBILE_US-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0026 //TX_PATCH_REG
+3 0x6B7A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7900 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0400 //TX_MIN_EQ_RE_EST_0
+153 0x0400 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x1000 //TX_MIN_EQ_RE_EST_4
+157 0x1000 //TX_MIN_EQ_RE_EST_5
+158 0x1000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x1800 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x6000 //TX_DTD_THR3
+212 0x0177 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0C00 //TX_RATIO_DT_L_TH_LOW
+224 0x2000 //TX_RATIO_DT_H_TH_LOW
+225 0x1800 //TX_RATIO_DT_L_TH_HIGH
+226 0x3000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0A00 //TX_RATIO_DT_L0_TH
+228 0x7000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0360 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x0600 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0018 //TX_NS_LVL_CTRL_4
+286 0x0016 //TX_NS_LVL_CTRL_5
+287 0x0012 //TX_NS_LVL_CTRL_6
+288 0x0017 //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0012 //TX_MIN_GAIN_S_1
+291 0x0007 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0012 //TX_MIN_GAIN_S_5
+295 0x0012 //TX_MIN_GAIN_S_6
+296 0x0012 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x6000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x6000 //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x6000 //TX_SNRI_SUP_7
+308 0x6000 //TX_THR_LFNS
+309 0x0017 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x3000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x6000 //TX_B_POST_FILT_6
+329 0x3000 //TX_B_POST_FILT_7
+330 0x1000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x07D0 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x00C6 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x47E0 //TX_NOISE_TH_4
+374 0x57E4 //TX_NOISE_TH_5
+375 0x4BD6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x39DF //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x0200 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x2000 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x051E //TX_SB_RHO_MEAN2_TH
+441 0x051E //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0300 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4854 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x5454 //TX_FDEQ_GAIN_5
+573 0x5454 //TX_FDEQ_GAIN_6
+574 0x6048 //TX_FDEQ_GAIN_7
+575 0x5454 //TX_FDEQ_GAIN_8
+576 0x6464 //TX_FDEQ_GAIN_9
+577 0x6464 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x9898 //TX_FDEQ_GAIN_12
+580 0x9898 //TX_FDEQ_GAIN_13
+581 0x9898 //TX_FDEQ_GAIN_14
+582 0x9898 //TX_FDEQ_GAIN_15
+583 0x9898 //TX_FDEQ_GAIN_16
+584 0x9898 //TX_FDEQ_GAIN_17
+585 0x9898 //TX_FDEQ_GAIN_18
+586 0x9848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0F03 //TX_FDEQ_BIN_0
+592 0x0909 //TX_FDEQ_BIN_1
+593 0x080F //TX_FDEQ_BIN_2
+594 0x0609 //TX_FDEQ_BIN_3
+595 0x0F03 //TX_FDEQ_BIN_4
+596 0x1402 //TX_FDEQ_BIN_5
+597 0x0E13 //TX_FDEQ_BIN_6
+598 0x110F //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x0E0F //TX_FDEQ_BIN_9
+601 0x080D //TX_FDEQ_BIN_10
+602 0x0F0F //TX_FDEQ_BIN_11
+603 0x0F0F //TX_FDEQ_BIN_12
+604 0x0A0F //TX_FDEQ_BIN_13
+605 0x0809 //TX_FDEQ_BIN_14
+606 0x0A0B //TX_FDEQ_BIN_15
+607 0x0C0D //TX_FDEQ_BIN_16
+608 0x0E0F //TX_FDEQ_BIN_17
+609 0x1013 //TX_FDEQ_BIN_18
+610 0x0A00 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2625 //TX_PREEQ_GAIN_MIC0_8
+626 0x2421 //TX_PREEQ_GAIN_MIC0_9
+627 0x1D19 //TX_PREEQ_GAIN_MIC0_10
+628 0x1820 //TX_PREEQ_GAIN_MIC0_11
+629 0x2830 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x1812 //TX_PREEQ_BIN_MIC0_0
+642 0x0A0A //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x080A //TX_PREEQ_BIN_MIC0_3
+645 0x0B09 //TX_PREEQ_BIN_MIC0_4
+646 0x0A06 //TX_PREEQ_BIN_MIC0_5
+647 0x0606 //TX_PREEQ_BIN_MIC0_6
+648 0x0605 //TX_PREEQ_BIN_MIC0_7
+649 0x050A //TX_PREEQ_BIN_MIC0_8
+650 0x1505 //TX_PREEQ_BIN_MIC0_9
+651 0x0506 //TX_PREEQ_BIN_MIC0_10
+652 0x0615 //TX_PREEQ_BIN_MIC0_11
+653 0x1516 //TX_PREEQ_BIN_MIC0_12
+654 0x2021 //TX_PREEQ_BIN_MIC0_13
+655 0x2021 //TX_PREEQ_BIN_MIC0_14
+656 0x2021 //TX_PREEQ_BIN_MIC0_15
+657 0x0800 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x03A0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0xECCD //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x2000 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x001C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x064E //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x5800 //RX_THR_PITCH_DET_0
+14 0x5000 //RX_THR_PITCH_DET_1
+15 0x4000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x8549 //RX_FDEQ_GAIN_0
+40 0x494A //RX_FDEQ_GAIN_1
+41 0x6168 //RX_FDEQ_GAIN_2
+42 0x686E //RX_FDEQ_GAIN_3
+43 0x746E //RX_FDEQ_GAIN_4
+44 0x6E62 //RX_FDEQ_GAIN_5
+45 0x686C //RX_FDEQ_GAIN_6
+46 0x6E82 //RX_FDEQ_GAIN_7
+47 0x8086 //RX_FDEQ_GAIN_8
+48 0x9092 //RX_FDEQ_GAIN_9
+49 0x9C98 //RX_FDEQ_GAIN_10
+50 0x8486 //RX_FDEQ_GAIN_11
+51 0x6858 //RX_FDEQ_GAIN_12
+52 0x5048 //RX_FDEQ_GAIN_13
+53 0x3428 //RX_FDEQ_GAIN_14
+54 0x5484 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0202 //RX_FDEQ_BIN_1
+65 0x0302 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0036 //TX_PATCH_REG
+3 0x6F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7646 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0800 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6000 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x0200 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x0400 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x0400 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7B00 //TX_DTD_THR1_0
+198 0x7B00 //TX_DTD_THR1_1
+199 0x7B00 //TX_DTD_THR1_2
+200 0x7B00 //TX_DTD_THR1_3
+201 0x7B00 //TX_DTD_THR1_4
+202 0x7B00 //TX_DTD_THR1_5
+203 0x7B00 //TX_DTD_THR1_6
+204 0x1000 //TX_DTD_THR2_0
+205 0x1000 //TX_DTD_THR2_1
+206 0x1000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0FA0 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0000 //TX_RATIO_DT_L_TH_LOW
+224 0x0000 //TX_RATIO_DT_H_TH_LOW
+225 0x0000 //TX_RATIO_DT_L_TH_HIGH
+226 0x0000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0000 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0025 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0000 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xF800 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF900 //TX_THR_SN_EST_3
+246 0xF900 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x01A0 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x01A0 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x3000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x3000 //TX_LAMBDA_NN_EST_4
+263 0x3000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x0000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x3000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x3000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x3000 //TX_MAINREFRTO_TH_H
+277 0x1000 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x4000 //TX_B_POST_FLT_0
+280 0x4000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x001B //TX_NS_LVL_CTRL_1
+283 0x0019 //TX_NS_LVL_CTRL_2
+284 0x0017 //TX_NS_LVL_CTRL_3
+285 0x0017 //TX_NS_LVL_CTRL_4
+286 0x0019 //TX_NS_LVL_CTRL_5
+287 0x0014 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x0010 //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x5000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x4000 //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x3000 //TX_SNRI_SUP_7
+308 0x3000 //TX_THR_LFNS
+309 0x001A //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x7000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x2000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x2000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x4000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x7FFF //TX_B_POST_FILT_2
+325 0x5000 //TX_B_POST_FILT_3
+326 0x7FFF //TX_B_POST_FILT_4
+327 0x7FFF //TX_B_POST_FILT_5
+328 0x4000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7200 //TX_LAMBDA_PFILT_S_2
+342 0x7900 //TX_LAMBDA_PFILT_S_3
+343 0x7400 //TX_LAMBDA_PFILT_S_4
+344 0x7200 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x0C80 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0004 //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x0320 //TX_NOISE_TH_1
+371 0x022C //TX_NOISE_TH_2
+372 0x2710 //TX_NOISE_TH_3
+373 0x1B58 //TX_NOISE_TH_4
+374 0x7FFF //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x0640 //TX_NOISE_TH_6
+379 0x0004 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x000A //TX_NS_ENOISE_MIC0_TH
+406 0x0004 //TX_MINENOISE_MIC0_TH
+407 0x0014 //TX_MINENOISE_MIC0_S_TH
+408 0x4900 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x4000 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0640 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x001A //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0080 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0018 //TX_FDEQ_SUBNUM
+567 0x5454 //TX_FDEQ_GAIN_0
+568 0x5452 //TX_FDEQ_GAIN_1
+569 0x5250 //TX_FDEQ_GAIN_2
+570 0x504C //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x483C //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x483C //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4242 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0301 //TX_FDEQ_BIN_1
+593 0x0101 //TX_FDEQ_BIN_2
+594 0x0103 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0306 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x060A //TX_FDEQ_BIN_7
+599 0x0F04 //TX_FDEQ_BIN_8
+600 0x0402 //TX_FDEQ_BIN_9
+601 0x0708 //TX_FDEQ_BIN_10
+602 0x0708 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E48 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C08 //TX_PREEQ_BIN_MIC0_2
+644 0x0700 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0000 //TX_GAIN_LIMIT_1
+775 0x0006 //TX_GAIN_LIMIT_2
+776 0x0006 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0010 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0500 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x000C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0014 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0360 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C48 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0303 //RX_FDEQ_BIN_3
+67 0x0303 //RX_FDEQ_BIN_4
+68 0x0303 //RX_FDEQ_BIN_5
+69 0x0303 //RX_FDEQ_BIN_6
+70 0x0303 //RX_FDEQ_BIN_7
+71 0x0A0A //RX_FDEQ_BIN_8
+72 0x0A0E //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0036 //TX_PATCH_REG
+3 0x2F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0800 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x0200 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x0400 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x0400 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0000 //TX_RATIO_DT_L_TH_LOW
+224 0x0000 //TX_RATIO_DT_H_TH_LOW
+225 0x0000 //TX_RATIO_DT_L_TH_HIGH
+226 0x0000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0000 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0120 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0000 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFB00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x01A0 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x5000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x0000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x2000 //TX_MAINREFRTOH_TH_H
+275 0x1400 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x4000 //TX_B_POST_FLT_1
+281 0x0018 //TX_NS_LVL_CTRL_0
+282 0x001C //TX_NS_LVL_CTRL_1
+283 0x0019 //TX_NS_LVL_CTRL_2
+284 0x001C //TX_NS_LVL_CTRL_3
+285 0x0019 //TX_NS_LVL_CTRL_4
+286 0x001A //TX_NS_LVL_CTRL_5
+287 0x001E //TX_NS_LVL_CTRL_6
+288 0x001C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0018 //TX_MIN_GAIN_S_1
+291 0x0012 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0012 //TX_MIN_GAIN_S_4
+294 0x0018 //TX_MIN_GAIN_S_5
+295 0x0018 //TX_MIN_GAIN_S_6
+296 0x0018 //TX_MIN_GAIN_S_7
+297 0x5000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x4000 //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x7000 //TX_A_POST_FILT_S_0
+315 0x7000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x2000 //TX_A_POST_FILT_S_4
+319 0x7000 //TX_A_POST_FILT_S_5
+320 0x7000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x4000 //TX_B_POST_FILT_1
+324 0x5000 //TX_B_POST_FILT_2
+325 0x4000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x4000 //TX_B_POST_FILT_6
+329 0x4000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C29 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0600 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x0139 //TX_NOISE_TH_1
+371 0x0479 //TX_NOISE_TH_2
+372 0x2E90 //TX_NOISE_TH_3
+373 0x4422 //TX_NOISE_TH_4
+374 0x5586 //TX_NOISE_TH_5
+375 0x4425 //TX_NOISE_TH_5_2
+376 0x0032 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x21E8 //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4900 //TX_MIN_G_CTRL_SSNS
+409 0x1000 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x05A8 //TX_SB_RHO_MEAN2_TH
+441 0x0384 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0280 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0200 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4854 //TX_FDEQ_GAIN_10
+578 0x5454 //TX_FDEQ_GAIN_11
+579 0x5460 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0F0F //TX_FDEQ_BIN_9
+601 0x0F0F //TX_FDEQ_BIN_10
+602 0x0F0F //TX_FDEQ_BIN_11
+603 0x0F0A //TX_FDEQ_BIN_12
+604 0x1109 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2648 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C0C //TX_PREEQ_BIN_MIC0_2
+644 0x0C0F //TX_PREEQ_BIN_MIC0_3
+645 0x0F0F //TX_PREEQ_BIN_MIC0_4
+646 0x0F09 //TX_PREEQ_BIN_MIC0_5
+647 0x0909 //TX_PREEQ_BIN_MIC0_6
+648 0x0908 //TX_PREEQ_BIN_MIC0_7
+649 0x0700 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0000 //TX_GAIN_LIMIT_1
+775 0x0006 //TX_GAIN_LIMIT_2
+776 0x0006 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0002 //TX_TDDRC_THRD_0
+855 0x0003 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0480 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x199A //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x2000 //TX_B_LESSCUT_RTO_MASK
+877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x000C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0014 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0400 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4A4C //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5A5C //RX_FDEQ_GAIN_7
+47 0x5C5C //RX_FDEQ_GAIN_8
+48 0x5C5C //RX_FDEQ_GAIN_9
+49 0x5C5C //RX_FDEQ_GAIN_10
+50 0x5C5C //RX_FDEQ_GAIN_11
+51 0x5C5C //RX_FDEQ_GAIN_12
+52 0x5C5C //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0505 //RX_FDEQ_BIN_3
+67 0x0505 //RX_FDEQ_BIN_4
+68 0x0505 //RX_FDEQ_BIN_5
+69 0x0505 //RX_FDEQ_BIN_6
+70 0x0505 //RX_FDEQ_BIN_7
+71 0x160C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0026 //TX_PATCH_REG
+3 0x6F7E //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7900 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0400 //TX_MIN_EQ_RE_EST_0
+153 0x0400 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x1000 //TX_MIN_EQ_RE_EST_4
+157 0x1000 //TX_MIN_EQ_RE_EST_5
+158 0x1000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x1800 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x6000 //TX_DTD_THR3
+212 0x0177 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0C00 //TX_RATIO_DT_L_TH_LOW
+224 0x2000 //TX_RATIO_DT_H_TH_LOW
+225 0x1800 //TX_RATIO_DT_L_TH_HIGH
+226 0x3000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0A00 //TX_RATIO_DT_L0_TH
+228 0x7000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0240 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x0600 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0018 //TX_NS_LVL_CTRL_4
+286 0x0016 //TX_NS_LVL_CTRL_5
+287 0x0012 //TX_NS_LVL_CTRL_6
+288 0x0017 //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0012 //TX_MIN_GAIN_S_1
+291 0x0007 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0012 //TX_MIN_GAIN_S_5
+295 0x0012 //TX_MIN_GAIN_S_6
+296 0x0012 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x6000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x6000 //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x6000 //TX_SNRI_SUP_7
+308 0x6000 //TX_THR_LFNS
+309 0x0017 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x3000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x6000 //TX_B_POST_FILT_6
+329 0x3000 //TX_B_POST_FILT_7
+330 0x1000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x07D0 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x00C6 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x47E0 //TX_NOISE_TH_4
+374 0x57E4 //TX_NOISE_TH_5
+375 0x4BD6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x39DF //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x0200 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x2000 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x051E //TX_SB_RHO_MEAN2_TH
+441 0x02F0 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0300 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x5454 //TX_FDEQ_GAIN_6
+574 0x5048 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x5058 //TX_FDEQ_GAIN_10
+578 0x5058 //TX_FDEQ_GAIN_11
+579 0x6464 //TX_FDEQ_GAIN_12
+580 0x4864 //TX_FDEQ_GAIN_13
+581 0x6460 //TX_FDEQ_GAIN_14
+582 0x4C58 //TX_FDEQ_GAIN_15
+583 0x8080 //TX_FDEQ_GAIN_16
+584 0x8048 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x080E //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0F0F //TX_FDEQ_BIN_9
+601 0x0E0D //TX_FDEQ_BIN_10
+602 0x0F28 //TX_FDEQ_BIN_11
+603 0x111B //TX_FDEQ_BIN_12
+604 0x291E //TX_FDEQ_BIN_13
+605 0x1E10 //TX_FDEQ_BIN_14
+606 0x1810 //TX_FDEQ_BIN_15
+607 0x1021 //TX_FDEQ_BIN_16
+608 0x1000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2625 //TX_PREEQ_GAIN_MIC0_8
+626 0x2421 //TX_PREEQ_GAIN_MIC0_9
+627 0x1D19 //TX_PREEQ_GAIN_MIC0_10
+628 0x1820 //TX_PREEQ_GAIN_MIC0_11
+629 0x2830 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x251A //TX_PREEQ_BIN_MIC0_0
+642 0x0F0F //TX_PREEQ_BIN_MIC0_1
+643 0x0C0C //TX_PREEQ_BIN_MIC0_2
+644 0x0C0F //TX_PREEQ_BIN_MIC0_3
+645 0x0F0F //TX_PREEQ_BIN_MIC0_4
+646 0x0F09 //TX_PREEQ_BIN_MIC0_5
+647 0x0909 //TX_PREEQ_BIN_MIC0_6
+648 0x0908 //TX_PREEQ_BIN_MIC0_7
+649 0x070F //TX_PREEQ_BIN_MIC0_8
+650 0x1F08 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0920 //TX_PREEQ_BIN_MIC0_11
+653 0x2020 //TX_PREEQ_BIN_MIC0_12
+654 0x2021 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0056 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0042 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0006 //TX_GAIN_LIMIT_1
+775 0x0000 //TX_GAIN_LIMIT_2
+776 0x0000 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0002 //TX_TDDRC_THRD_0
+855 0x0003 //TX_TDDRC_THRD_1
+856 0x1500 //TX_TDDRC_THRD_2
+857 0x1500 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x04F0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0xECCD //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x2000 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x000C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x5800 //RX_THR_PITCH_DET_0
+14 0x5000 //RX_THR_PITCH_DET_1
+15 0x4000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0026 //TX_PATCH_REG
+3 0x6B7A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0002 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7900 //TX_EAD_THR
+151 0x2000 //TX_THR_RE_EST
+152 0x0400 //TX_MIN_EQ_RE_EST_0
+153 0x0400 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x1000 //TX_MIN_EQ_RE_EST_4
+157 0x1000 //TX_MIN_EQ_RE_EST_5
+158 0x1000 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x1000 //TX_LAMBDA_CB_NLE
+167 0x1800 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x003C //TX_SE_HOLD_N
+170 0x0046 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7000 //TX_DTD_THR1_2
+200 0x7F00 //TX_DTD_THR1_3
+201 0x7F00 //TX_DTD_THR1_4
+202 0x7F00 //TX_DTD_THR1_5
+203 0x7F00 //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x6000 //TX_DTD_THR3
+212 0x0177 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0C00 //TX_RATIO_DT_L_TH_LOW
+224 0x2000 //TX_RATIO_DT_H_TH_LOW
+225 0x1800 //TX_RATIO_DT_L_TH_HIGH
+226 0x3000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0A00 //TX_RATIO_DT_L0_TH
+228 0x7000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0360 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF600 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF800 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF700 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x0600 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0014 //TX_NS_LVL_CTRL_0
+282 0x0016 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0018 //TX_NS_LVL_CTRL_4
+286 0x0016 //TX_NS_LVL_CTRL_5
+287 0x0012 //TX_NS_LVL_CTRL_6
+288 0x0017 //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0012 //TX_MIN_GAIN_S_1
+291 0x0007 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0012 //TX_MIN_GAIN_S_5
+295 0x0012 //TX_MIN_GAIN_S_6
+296 0x0012 //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x6000 //TX_SNRI_SUP_2
+303 0x6000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x6000 //TX_SNRI_SUP_5
+306 0x6000 //TX_SNRI_SUP_6
+307 0x6000 //TX_SNRI_SUP_7
+308 0x6000 //TX_THR_LFNS
+309 0x0017 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x4000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x3000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x6000 //TX_B_POST_FILT_6
+329 0x3000 //TX_B_POST_FILT_7
+330 0x1000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x07D0 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1D4C //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x1000 //TX_C_POST_FLT_DT
+359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x00C6 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x47E0 //TX_NOISE_TH_4
+374 0x57E4 //TX_NOISE_TH_5
+375 0x4BD6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x4E20 //TX_NOISE_TH_5_4
+378 0x39DF //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x0200 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x0FA0 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x2328 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x03E8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2800 //TX_BF_RESET_THR_HS
+424 0x0CCD //TX_SB_RTO_MEAN_TH
+425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x2000 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0990 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0100 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x051E //TX_SB_RHO_MEAN2_TH
+441 0x051E //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0001 //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x001E //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0300 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x7FFF //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0010 //TX_WIND_SUPRTO
+540 0x0014 //TX_WNS_MIN_G
+541 0x0600 //TX_WNS_B_POST_FLT
+542 0x3000 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0200 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0030 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4854 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x5454 //TX_FDEQ_GAIN_5
+573 0x5454 //TX_FDEQ_GAIN_6
+574 0x6048 //TX_FDEQ_GAIN_7
+575 0x5454 //TX_FDEQ_GAIN_8
+576 0x6464 //TX_FDEQ_GAIN_9
+577 0x6464 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x9898 //TX_FDEQ_GAIN_12
+580 0x9898 //TX_FDEQ_GAIN_13
+581 0x9898 //TX_FDEQ_GAIN_14
+582 0x9898 //TX_FDEQ_GAIN_15
+583 0x9898 //TX_FDEQ_GAIN_16
+584 0x9898 //TX_FDEQ_GAIN_17
+585 0x9898 //TX_FDEQ_GAIN_18
+586 0x9848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0F03 //TX_FDEQ_BIN_0
+592 0x0909 //TX_FDEQ_BIN_1
+593 0x080F //TX_FDEQ_BIN_2
+594 0x0609 //TX_FDEQ_BIN_3
+595 0x0F03 //TX_FDEQ_BIN_4
+596 0x1402 //TX_FDEQ_BIN_5
+597 0x0E13 //TX_FDEQ_BIN_6
+598 0x110F //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x0E0F //TX_FDEQ_BIN_9
+601 0x080D //TX_FDEQ_BIN_10
+602 0x0F0F //TX_FDEQ_BIN_11
+603 0x0F0F //TX_FDEQ_BIN_12
+604 0x0A0F //TX_FDEQ_BIN_13
+605 0x0809 //TX_FDEQ_BIN_14
+606 0x0A0B //TX_FDEQ_BIN_15
+607 0x0C0D //TX_FDEQ_BIN_16
+608 0x0E0F //TX_FDEQ_BIN_17
+609 0x1013 //TX_FDEQ_BIN_18
+610 0x0A00 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0030 //TX_PREEQ_SUBNUM_MIC0
+617 0x4846 //TX_PREEQ_GAIN_MIC0_0
+618 0x4544 //TX_PREEQ_GAIN_MIC0_1
+619 0x4240 //TX_PREEQ_GAIN_MIC0_2
+620 0x3E3C //TX_PREEQ_GAIN_MIC0_3
+621 0x3A38 //TX_PREEQ_GAIN_MIC0_4
+622 0x3635 //TX_PREEQ_GAIN_MIC0_5
+623 0x3330 //TX_PREEQ_GAIN_MIC0_6
+624 0x2E2A //TX_PREEQ_GAIN_MIC0_7
+625 0x2625 //TX_PREEQ_GAIN_MIC0_8
+626 0x2421 //TX_PREEQ_GAIN_MIC0_9
+627 0x1D19 //TX_PREEQ_GAIN_MIC0_10
+628 0x1820 //TX_PREEQ_GAIN_MIC0_11
+629 0x2830 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x1812 //TX_PREEQ_BIN_MIC0_0
+642 0x0A0A //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x080A //TX_PREEQ_BIN_MIC0_3
+645 0x0B09 //TX_PREEQ_BIN_MIC0_4
+646 0x0A06 //TX_PREEQ_BIN_MIC0_5
+647 0x0606 //TX_PREEQ_BIN_MIC0_6
+648 0x0605 //TX_PREEQ_BIN_MIC0_7
+649 0x050A //TX_PREEQ_BIN_MIC0_8
+650 0x1505 //TX_PREEQ_BIN_MIC0_9
+651 0x0506 //TX_PREEQ_BIN_MIC0_10
+652 0x0615 //TX_PREEQ_BIN_MIC0_11
+653 0x1516 //TX_PREEQ_BIN_MIC0_12
+654 0x2021 //TX_PREEQ_BIN_MIC0_13
+655 0x2021 //TX_PREEQ_BIN_MIC0_14
+656 0x2021 //TX_PREEQ_BIN_MIC0_15
+657 0x0800 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0030 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0FA0 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x03A0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0xECCD //TX_TFMASKLTH_BINVAD
+873 0xFCCD //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x2000 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x6333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x000C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x5800 //RX_THR_PITCH_DET_0
+14 0x5000 //RX_THR_PITCH_DET_1
+15 0x4000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7000 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01E0 //RX_TDDRC_DRC_GAIN
+38 0x0030 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4844 //RX_FDEQ_GAIN_2
+42 0x4B4D //RX_FDEQ_GAIN_3
+43 0x4E50 //RX_FDEQ_GAIN_4
+44 0x5254 //RX_FDEQ_GAIN_5
+45 0x5658 //RX_FDEQ_GAIN_6
+46 0x5C60 //RX_FDEQ_GAIN_7
+47 0x6468 //RX_FDEQ_GAIN_8
+48 0x6C70 //RX_FDEQ_GAIN_9
+49 0x7474 //RX_FDEQ_GAIN_10
+50 0x7474 //RX_FDEQ_GAIN_11
+51 0x7474 //RX_FDEQ_GAIN_12
+52 0x7474 //RX_FDEQ_GAIN_13
+53 0x7474 //RX_FDEQ_GAIN_14
+54 0x7474 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0402 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1E1E //RX_FDEQ_BIN_11
+75 0x1E1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E1E //RX_FDEQ_BIN_14
+78 0x202C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
diff --git a/audio/whitefin/tuning/fortemedia/HANDSFREE.dat b/audio/whitefin/tuning/fortemedia/HANDSFREE.dat
new file mode 100644
index 0000000..fd2bea5
--- /dev/null
+++ b/audio/whitefin/tuning/fortemedia/HANDSFREE.dat
Binary files differ
diff --git a/audio/whitefin/tuning/fortemedia/HANDSFREE.mods b/audio/whitefin/tuning/fortemedia/HANDSFREE.mods
new file mode 100644
index 0000000..16355d0
--- /dev/null
+++ b/audio/whitefin/tuning/fortemedia/HANDSFREE.mods
@@ -0,0 +1,7016 @@
+#PLATFORM_NAME gChip
+#SINGLE_API_VER 1.1.4
+#SAVE_TIME 2020-12-08 14:06:32
+
+#CASE_NAME HANDFREE-HANDFREE-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x000D //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x053D //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0100 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7500 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x0200 //TX_MIN_EQ_RE_EST_0
+153 0x0200 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1800 //TX_MIN_EQ_RE_EST_7
+160 0x1800 //TX_MIN_EQ_RE_EST_8
+161 0x3000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x6000 //TX_MIN_EQ_RE_EST_11
+164 0x7FFF //TX_MIN_EQ_RE_EST_12
+165 0x2000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x2000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x157C //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x1000 //TX_ADPT_STRICT_L
+222 0x1000 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF900 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0050 //TX_DELTA_THR_SN_EST_0
+251 0x01A0 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x7F00 //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0800 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0012 //TX_NS_LVL_CTRL_1
+283 0x0017 //TX_NS_LVL_CTRL_2
+284 0x0015 //TX_NS_LVL_CTRL_3
+285 0x0012 //TX_NS_LVL_CTRL_4
+286 0x0012 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000D //TX_MIN_GAIN_S_2
+292 0x000F //TX_MIN_GAIN_S_3
+293 0x000F //TX_MIN_GAIN_S_4
+294 0x000F //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x4000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x3000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x3000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7D00 //TX_LAMBDA_PFILT_S_0
+340 0x7900 //TX_LAMBDA_PFILT_S_1
+341 0x7400 //TX_LAMBDA_PFILT_S_2
+342 0x7900 //TX_LAMBDA_PFILT_S_3
+343 0x7D00 //TX_LAMBDA_PFILT_S_4
+344 0x7D00 //TX_LAMBDA_PFILT_S_5
+345 0x7D00 //TX_LAMBDA_PFILT_S_6
+346 0x7D00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0FA0 //TX_DT_BINVAD_ENDF
+358 0x0400 //TX_C_POST_FLT_DT
+359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x03ED //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x55F0 //TX_NOISE_TH_4
+374 0x7FFF //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0FA0 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x1000 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x000A //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x007A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x5000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x7FFF //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0014 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x483C //TX_FDEQ_GAIN_3
+571 0x303C //TX_FDEQ_GAIN_4
+572 0x3048 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D08 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x7800 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E48 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C08 //TX_PREEQ_BIN_MIC1_2
+693 0x0700 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x7800 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x4000 //TX_TDDRC_ALPHA_UP_01
+784 0x4000 //TX_TDDRC_ALPHA_UP_02
+785 0x4000 //TX_TDDRC_ALPHA_UP_03
+786 0x4000 //TX_TDDRC_ALPHA_UP_04
+787 0x6000 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0004 //TX_TDDRC_THRD_0
+855 0x0010 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x4000 //TX_TDDRC_ALPHA_UP_00
+861 0x6000 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x027C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0005 //RX_FILTINDX
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0023 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0034 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x004D //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0073 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x00AC //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDFREE-HANDFREE-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F3C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x000D //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x053D //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0300 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x5000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0010 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFB00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0018 //TX_NS_LVL_CTRL_3
+285 0x0016 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7C00 //TX_LAMBDA_PFILT_S_0
+340 0x7C00 //TX_LAMBDA_PFILT_S_1
+341 0x7C00 //TX_LAMBDA_PFILT_S_2
+342 0x7A00 //TX_LAMBDA_PFILT_S_3
+343 0x7C00 //TX_LAMBDA_PFILT_S_4
+344 0x7C00 //TX_LAMBDA_PFILT_S_5
+345 0x7C00 //TX_LAMBDA_PFILT_S_6
+346 0x7C00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0800 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0032 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x017E //TX_NOISE_TH_1
+371 0x0230 //TX_NOISE_TH_2
+372 0x3492 //TX_NOISE_TH_3
+373 0x4E20 //TX_NOISE_TH_4
+374 0x55B8 //TX_NOISE_TH_5
+375 0x49E6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0F0A //TX_NOISE_TH_6
+379 0x0033 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0033 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2648 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C0C //TX_PREEQ_BIN_MIC1_2
+693 0x0C0F //TX_PREEQ_BIN_MIC1_3
+694 0x0F0F //TX_PREEQ_BIN_MIC1_4
+695 0x0F09 //TX_PREEQ_BIN_MIC1_5
+696 0x0909 //TX_PREEQ_BIN_MIC1_6
+697 0x0908 //TX_PREEQ_BIN_MIC1_7
+698 0x0700 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0002 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0B50 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x027C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7B02 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0023 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0034 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x004D //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0073 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x00AC //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDFREE-HANDFREE-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0093 //TX_DIST2REF1
+22 0x001A //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0400 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x2000 //TX_MIN_EQ_RE_EST_0
+153 0x0600 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x3000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x36B0 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x1000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0000 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x0014 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7D00 //TX_LAMBDA_PFILT_S_0
+340 0x7D00 //TX_LAMBDA_PFILT_S_1
+341 0x7D00 //TX_LAMBDA_PFILT_S_2
+342 0x7D00 //TX_LAMBDA_PFILT_S_3
+343 0x7D00 //TX_LAMBDA_PFILT_S_4
+344 0x7D00 //TX_LAMBDA_PFILT_S_5
+345 0x7D00 //TX_LAMBDA_PFILT_S_6
+346 0x7D00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0040 //TX_DT_BINVAD_TH_0
+354 0x0040 //TX_DT_BINVAD_TH_1
+355 0x0100 //TX_DT_BINVAD_TH_2
+356 0x0100 //TX_DT_BINVAD_TH_3
+357 0x36B0 //TX_DT_BINVAD_ENDF
+358 0x0200 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x01F4 //TX_NOISE_TH_2
+372 0x4E20 //TX_NOISE_TH_3
+373 0x2710 //TX_NOISE_TH_4
+374 0x2710 //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0DAC //TX_NOISE_TH_6
+379 0x0050 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0050 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4000 //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4850 //TX_FDEQ_GAIN_2
+570 0x5050 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x484A //TX_FDEQ_GAIN_5
+573 0x4E5E //TX_FDEQ_GAIN_6
+574 0x5850 //TX_FDEQ_GAIN_7
+575 0x5050 //TX_FDEQ_GAIN_8
+576 0x5050 //TX_FDEQ_GAIN_9
+577 0x5064 //TX_FDEQ_GAIN_10
+578 0x5C70 //TX_FDEQ_GAIN_11
+579 0x7088 //TX_FDEQ_GAIN_12
+580 0x8080 //TX_FDEQ_GAIN_13
+581 0x7474 //TX_FDEQ_GAIN_14
+582 0x8080 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0xF200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2625 //TX_PREEQ_GAIN_MIC1_8
+675 0x2421 //TX_PREEQ_GAIN_MIC1_9
+676 0x1D19 //TX_PREEQ_GAIN_MIC1_10
+677 0x1820 //TX_PREEQ_GAIN_MIC1_11
+678 0x2830 //TX_PREEQ_GAIN_MIC1_12
+679 0x303C //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C0C //TX_PREEQ_BIN_MIC1_2
+693 0x0C0F //TX_PREEQ_BIN_MIC1_3
+694 0x0F0F //TX_PREEQ_BIN_MIC1_4
+695 0x0F09 //TX_PREEQ_BIN_MIC1_5
+696 0x0909 //TX_PREEQ_BIN_MIC1_6
+697 0x0908 //TX_PREEQ_BIN_MIC1_7
+698 0x070F //TX_PREEQ_BIN_MIC1_8
+699 0x1F08 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0920 //TX_PREEQ_BIN_MIC1_11
+702 0x2020 //TX_PREEQ_BIN_MIC1_12
+703 0x2021 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0xF200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0056 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0042 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0002 //TX_TDDRC_THRD_1
+856 0x1000 //TX_TDDRC_THRD_2
+857 0x1000 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0BE0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x027C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0023 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0034 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x004D //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0073 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x00AC //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HANDFREE-HANDFREE-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x4B7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0093 //TX_DIST2REF1
+22 0x001A //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0A19 //TX_PGA_0
+28 0x0A19 //TX_PGA_1
+29 0x0A19 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0300 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7A00 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x2000 //TX_MIN_EQ_RE_EST_1
+154 0x2000 //TX_MIN_EQ_RE_EST_2
+155 0x4000 //TX_MIN_EQ_RE_EST_3
+156 0x4000 //TX_MIN_EQ_RE_EST_4
+157 0x7FFF //TX_MIN_EQ_RE_EST_5
+158 0x7FFF //TX_MIN_EQ_RE_EST_6
+159 0x7FFF //TX_MIN_EQ_RE_EST_7
+160 0x7FFF //TX_MIN_EQ_RE_EST_8
+161 0x7FFF //TX_MIN_EQ_RE_EST_9
+162 0x7FFF //TX_MIN_EQ_RE_EST_10
+163 0x7FFF //TX_MIN_EQ_RE_EST_11
+164 0x7FFF //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0CCD //TX_LAMBDA_CB_NLE
+167 0x2000 //TX_C_POST_FLT
+168 0x7FFF //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x09C4 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7D00 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0DAC //TX_DT_CUT_K
+214 0x0020 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0063 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFB00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0018 //TX_NS_LVL_CTRL_3
+285 0x0016 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7C00 //TX_LAMBDA_PFILT_S_0
+340 0x7C00 //TX_LAMBDA_PFILT_S_1
+341 0x7C00 //TX_LAMBDA_PFILT_S_2
+342 0x7A00 //TX_LAMBDA_PFILT_S_3
+343 0x7C00 //TX_LAMBDA_PFILT_S_4
+344 0x7C00 //TX_LAMBDA_PFILT_S_5
+345 0x7C00 //TX_LAMBDA_PFILT_S_6
+346 0x7C00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0200 //TX_DT_BINVAD_TH_0
+354 0x0200 //TX_DT_BINVAD_TH_1
+355 0x0200 //TX_DT_BINVAD_TH_2
+356 0x0200 //TX_DT_BINVAD_TH_3
+357 0x1F40 //TX_DT_BINVAD_ENDF
+358 0x0100 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x4E20 //TX_NOISE_TH_3
+373 0x4E20 //TX_NOISE_TH_4
+374 0x59D8 //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x2710 //TX_NOISE_TH_6
+379 0x0033 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0033 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x7FFF //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x5B5B //TX_FDEQ_GAIN_10
+578 0x7373 //TX_FDEQ_GAIN_11
+579 0x739A //TX_FDEQ_GAIN_12
+580 0x9AC4 //TX_FDEQ_GAIN_13
+581 0xC4C4 //TX_FDEQ_GAIN_14
+582 0xC4C4 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2625 //TX_PREEQ_GAIN_MIC1_8
+675 0x2421 //TX_PREEQ_GAIN_MIC1_9
+676 0x1D19 //TX_PREEQ_GAIN_MIC1_10
+677 0x1820 //TX_PREEQ_GAIN_MIC1_11
+678 0x2830 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x1812 //TX_PREEQ_BIN_MIC1_0
+691 0x0A0A //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x080A //TX_PREEQ_BIN_MIC1_3
+694 0x0B09 //TX_PREEQ_BIN_MIC1_4
+695 0x0A06 //TX_PREEQ_BIN_MIC1_5
+696 0x0606 //TX_PREEQ_BIN_MIC1_6
+697 0x0605 //TX_PREEQ_BIN_MIC1_7
+698 0x050A //TX_PREEQ_BIN_MIC1_8
+699 0x1505 //TX_PREEQ_BIN_MIC1_9
+700 0x0506 //TX_PREEQ_BIN_MIC1_10
+701 0x0615 //TX_PREEQ_BIN_MIC1_11
+702 0x1516 //TX_PREEQ_BIN_MIC1_12
+703 0x2021 //TX_PREEQ_BIN_MIC1_13
+704 0x2021 //TX_PREEQ_BIN_MIC1_14
+705 0x2021 //TX_PREEQ_BIN_MIC1_15
+706 0x0800 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0004 //TX_FILTINDX
+854 0x0004 //TX_TDDRC_THRD_0
+855 0x0016 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0CE6 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x006C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7E56 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0014 //RX_NS_LVL_CTRL
+23 0xF400 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0023 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0034 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x004D //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0073 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x00AC //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
diff --git a/audio/whitefin/tuning/fortemedia/HEADSET.dat b/audio/whitefin/tuning/fortemedia/HEADSET.dat
new file mode 100644
index 0000000..80034e5
--- /dev/null
+++ b/audio/whitefin/tuning/fortemedia/HEADSET.dat
Binary files differ
diff --git a/audio/whitefin/tuning/fortemedia/HEADSET.mods b/audio/whitefin/tuning/fortemedia/HEADSET.mods
new file mode 100644
index 0000000..2d7c410
--- /dev/null
+++ b/audio/whitefin/tuning/fortemedia/HEADSET.mods
@@ -0,0 +1,56100 @@
+#PLATFORM_NAME gChip
+#SINGLE_API_VER 1.1.4
+#SAVE_TIME 2020-12-15 14:38:02
+
+#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7646 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7CCC //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6333 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0010 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x2900 //TX_MIN_EQ_RE_EST_0
+153 0x1000 //TX_MIN_EQ_RE_EST_1
+154 0x1000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x2000 //TX_C_POST_FLT
+168 0x2000 //TX_GAIN_NP
+169 0x0064 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x2000 //TX_DTD_THR2_3
+208 0x2000 //TX_DTD_THR2_4
+209 0x2000 //TX_DTD_THR2_5
+210 0x2000 //TX_DTD_THR2_6
+211 0x4100 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x2000 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0010 //TX_EPD_OFFSET_00
+233 0x0010 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xFD00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xFA00 //TX_THR_SN_EST_6
+249 0xFA00 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0000 //TX_DELTA_THR_SN_EST_2
+253 0x0400 //TX_DELTA_THR_SN_EST_3
+254 0x0000 //TX_DELTA_THR_SN_EST_4
+255 0x0000 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0000 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0400 //TX_B_POST_FLT_0
+280 0x0400 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0014 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0010 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000D //TX_MIN_GAIN_S_0
+290 0x0012 //TX_MIN_GAIN_S_1
+291 0x0012 //TX_MIN_GAIN_S_2
+292 0x0012 //TX_MIN_GAIN_S_3
+293 0x0012 //TX_MIN_GAIN_S_4
+294 0x000D //TX_MIN_GAIN_S_5
+295 0x000D //TX_MIN_GAIN_S_6
+296 0x000D //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x5000 //TX_SNRI_SUP_2
+303 0x5000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0014 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x7FFF //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x7000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x4000 //TX_A_POST_FILT_S_7
+322 0x0400 //TX_B_POST_FILT_0
+323 0x0400 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7F00 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x6000 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0FA0 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0029 //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x0900 //TX_NOISE_TH_1
+371 0x0033 //TX_NOISE_TH_2
+372 0x423D //TX_NOISE_TH_3
+373 0x0231 //TX_NOISE_TH_4
+374 0x68DE //TX_NOISE_TH_5
+375 0x5784 //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02EF //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0280 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2400 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0014 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4448 //TX_FDEQ_GAIN_4
+572 0x4442 //TX_FDEQ_GAIN_5
+573 0x3032 //TX_FDEQ_GAIN_6
+574 0x363A //TX_FDEQ_GAIN_7
+575 0x3830 //TX_FDEQ_GAIN_8
+576 0x3838 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D08 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0010 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0802 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0010 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0802 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0010 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0802 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x000B //TX_GAIN_LIMIT_0
+774 0x000B //TX_GAIN_LIMIT_1
+775 0x000B //TX_GAIN_LIMIT_2
+776 0x000B //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0001 //TX_FILTINDX
+854 0x0002 //TX_TDDRC_THRD_0
+855 0x0008 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0700 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0x2000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x4500 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x0064 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7D00 //TX_DTD_THR1_0
+198 0x7D00 //TX_DTD_THR1_1
+199 0x7D00 //TX_DTD_THR1_2
+200 0x7D00 //TX_DTD_THR1_3
+201 0x7D00 //TX_DTD_THR1_4
+202 0x7D00 //TX_DTD_THR1_5
+203 0x7D00 //TX_DTD_THR1_6
+204 0x4000 //TX_DTD_THR2_0
+205 0x1000 //TX_DTD_THR2_1
+206 0x1000 //TX_DTD_THR2_2
+207 0x1000 //TX_DTD_THR2_3
+208 0x1000 //TX_DTD_THR2_4
+209 0x1000 //TX_DTD_THR2_5
+210 0x1000 //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x1B58 //TX_DT_CUT_K
+214 0x1000 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xF700 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0018 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0018 //TX_NS_LVL_CTRL_3
+285 0x0012 //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x0009 //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x6000 //TX_SNRI_SUP_2
+303 0x5000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x3000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7F00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7000 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0065 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x0900 //TX_NOISE_TH_1
+371 0x009B //TX_NOISE_TH_2
+372 0x4149 //TX_NOISE_TH_3
+373 0x0331 //TX_NOISE_TH_4
+374 0x542C //TX_NOISE_TH_5
+375 0x55E5 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00FB //TX_NOISE_TH_6
+379 0x0029 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0029 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4442 //TX_FDEQ_GAIN_5
+573 0x3434 //TX_FDEQ_GAIN_6
+574 0x3C3A //TX_FDEQ_GAIN_7
+575 0x3838 //TX_FDEQ_GAIN_8
+576 0x3838 //TX_FDEQ_GAIN_9
+577 0x2E2E //TX_FDEQ_GAIN_10
+578 0x2A2A //TX_FDEQ_GAIN_11
+579 0x2A32 //TX_FDEQ_GAIN_12
+580 0x3838 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0001 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0700 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xCCCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x6B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x6D60 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7D00 //TX_DTD_THR1_0
+198 0x7D00 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xF700 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x0018 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0018 //TX_NS_LVL_CTRL_3
+285 0x0012 //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x0009 //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x6000 //TX_SNRI_SUP_2
+303 0x5000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x3000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7F00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7000 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x3838 //TX_FDEQ_GAIN_9
+577 0x3C3C //TX_FDEQ_GAIN_10
+578 0x3C28 //TX_FDEQ_GAIN_11
+579 0x2828 //TX_FDEQ_GAIN_12
+580 0x3030 //TX_FDEQ_GAIN_13
+581 0x3030 //TX_FDEQ_GAIN_14
+582 0x5048 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0020 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x6B6A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B4C //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x61A8 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x7FFF //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x0800 //TX_DTD_THR1_0
+198 0x0800 //TX_DTD_THR1_1
+199 0x0800 //TX_DTD_THR1_2
+200 0x0800 //TX_DTD_THR1_3
+201 0x0800 //TX_DTD_THR1_4
+202 0x0800 //TX_DTD_THR1_5
+203 0x0800 //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0400 //TX_DELTA_THR_SN_EST_2
+253 0x0300 //TX_DELTA_THR_SN_EST_3
+254 0x0600 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0019 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0019 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0010 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x0011 //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000F //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x7000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x4000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7B02 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7646 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7CCC //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6333 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0010 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x1000 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x2000 //TX_C_POST_FLT
+168 0x2000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x0064 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x2000 //TX_DTD_THR2_3
+208 0x2000 //TX_DTD_THR2_4
+209 0x2000 //TX_DTD_THR2_5
+210 0x2000 //TX_DTD_THR2_6
+211 0x4100 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x1000 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0010 //TX_EPD_OFFSET_00
+233 0x0010 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xFA00 //TX_THR_SN_EST_6
+249 0xFA00 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0000 //TX_DELTA_THR_SN_EST_2
+253 0x0000 //TX_DELTA_THR_SN_EST_3
+254 0x0000 //TX_DELTA_THR_SN_EST_4
+255 0x0000 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0000 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0400 //TX_B_POST_FLT_0
+280 0x0400 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0010 //TX_NS_LVL_CTRL_1
+283 0x0010 //TX_NS_LVL_CTRL_2
+284 0x0010 //TX_NS_LVL_CTRL_3
+285 0x0010 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0010 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000D //TX_MIN_GAIN_S_0
+290 0x000D //TX_MIN_GAIN_S_1
+291 0x000D //TX_MIN_GAIN_S_2
+292 0x000D //TX_MIN_GAIN_S_3
+293 0x000D //TX_MIN_GAIN_S_4
+294 0x000D //TX_MIN_GAIN_S_5
+295 0x000D //TX_MIN_GAIN_S_6
+296 0x000D //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0014 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x4000 //TX_A_POST_FILT_S_7
+322 0x0400 //TX_B_POST_FILT_0
+323 0x0400 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x0FA0 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x02BC //TX_NOISE_TH_1
+371 0x1F40 //TX_NOISE_TH_2
+372 0x4650 //TX_NOISE_TH_3
+373 0x7148 //TX_NOISE_TH_4
+374 0x044C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x0032 //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0280 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2400 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0014 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D08 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0010 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0802 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0010 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0802 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0010 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0802 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x000B //TX_GAIN_LIMIT_0
+774 0x000B //TX_GAIN_LIMIT_1
+775 0x000B //TX_GAIN_LIMIT_2
+776 0x000B //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0001 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0001 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x6B6A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B4C //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x61A8 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x7FFF //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x0800 //TX_DTD_THR1_0
+198 0x0800 //TX_DTD_THR1_1
+199 0x0800 //TX_DTD_THR1_2
+200 0x0800 //TX_DTD_THR1_3
+201 0x0800 //TX_DTD_THR1_4
+202 0x0800 //TX_DTD_THR1_5
+203 0x0800 //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0400 //TX_DELTA_THR_SN_EST_2
+253 0x0300 //TX_DELTA_THR_SN_EST_3
+254 0x0600 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0019 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0019 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0010 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x0011 //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000F //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x7000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x4000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7B02 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7646 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7CCC //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6333 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0010 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x1000 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x2000 //TX_C_POST_FLT
+168 0x2000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x0064 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x2000 //TX_DTD_THR2_3
+208 0x2000 //TX_DTD_THR2_4
+209 0x2000 //TX_DTD_THR2_5
+210 0x2000 //TX_DTD_THR2_6
+211 0x4100 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x1000 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0010 //TX_EPD_OFFSET_00
+233 0x0010 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xFA00 //TX_THR_SN_EST_6
+249 0xFA00 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0000 //TX_DELTA_THR_SN_EST_2
+253 0x0000 //TX_DELTA_THR_SN_EST_3
+254 0x0000 //TX_DELTA_THR_SN_EST_4
+255 0x0000 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0000 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0400 //TX_B_POST_FLT_0
+280 0x0400 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0010 //TX_NS_LVL_CTRL_1
+283 0x0010 //TX_NS_LVL_CTRL_2
+284 0x0010 //TX_NS_LVL_CTRL_3
+285 0x0010 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0010 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000D //TX_MIN_GAIN_S_0
+290 0x000D //TX_MIN_GAIN_S_1
+291 0x000D //TX_MIN_GAIN_S_2
+292 0x000D //TX_MIN_GAIN_S_3
+293 0x000D //TX_MIN_GAIN_S_4
+294 0x000D //TX_MIN_GAIN_S_5
+295 0x000D //TX_MIN_GAIN_S_6
+296 0x000D //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0014 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x4000 //TX_A_POST_FILT_S_7
+322 0x0400 //TX_B_POST_FILT_0
+323 0x0400 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x0FA0 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x02BC //TX_NOISE_TH_1
+371 0x1F40 //TX_NOISE_TH_2
+372 0x4650 //TX_NOISE_TH_3
+373 0x7148 //TX_NOISE_TH_4
+374 0x044C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x0032 //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0280 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2400 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0014 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D08 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0010 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0802 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0010 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0802 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0010 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0802 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x000B //TX_GAIN_LIMIT_0
+774 0x000B //TX_GAIN_LIMIT_1
+775 0x000B //TX_GAIN_LIMIT_2
+776 0x000B //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0001 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0001 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0009 //TX_OPERATION_MODE_0
+1 0x0009 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x6B6A //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B4C //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0200 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x61A8 //TX_EAD_THR
+151 0x0400 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x3000 //TX_MIN_EQ_RE_EST_1
+154 0x4000 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x6000 //TX_MIN_EQ_RE_EST_6
+159 0x6000 //TX_MIN_EQ_RE_EST_7
+160 0x6000 //TX_MIN_EQ_RE_EST_8
+161 0x6000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x4000 //TX_MIN_EQ_RE_EST_11
+164 0x4000 //TX_MIN_EQ_RE_EST_12
+165 0x3000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x3000 //TX_C_POST_FLT
+168 0x7FFF //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x0800 //TX_DTD_THR1_0
+198 0x0800 //TX_DTD_THR1_1
+199 0x0800 //TX_DTD_THR1_2
+200 0x0800 //TX_DTD_THR1_3
+201 0x0800 //TX_DTD_THR1_4
+202 0x0800 //TX_DTD_THR1_5
+203 0x0800 //TX_DTD_THR1_6
+204 0x0800 //TX_DTD_THR2_0
+205 0x0800 //TX_DTD_THR2_1
+206 0x0800 //TX_DTD_THR2_2
+207 0x0800 //TX_DTD_THR2_3
+208 0x0800 //TX_DTD_THR2_4
+209 0x0100 //TX_DTD_THR2_5
+210 0x0100 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00C0 //TX_EPD_OFFSET_00
+233 0x00C0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF700 //TX_THR_SN_EST_0
+243 0xFB00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF700 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xF600 //TX_THR_SN_EST_5
+248 0xF600 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0200 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0400 //TX_DELTA_THR_SN_EST_2
+253 0x0300 //TX_DELTA_THR_SN_EST_3
+254 0x0600 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x2000 //TX_B_POST_FLT_1
+281 0x0012 //TX_NS_LVL_CTRL_0
+282 0x0019 //TX_NS_LVL_CTRL_1
+283 0x0016 //TX_NS_LVL_CTRL_2
+284 0x0016 //TX_NS_LVL_CTRL_3
+285 0x0019 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0010 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x0011 //TX_MIN_GAIN_S_1
+291 0x000C //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000F //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000C //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7000 //TX_SNRI_SUP_0
+301 0x6000 //TX_SNRI_SUP_1
+302 0x7000 //TX_SNRI_SUP_2
+303 0x7000 //TX_SNRI_SUP_3
+304 0x6000 //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0016 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x6000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x6000 //TX_A_POST_FILT_S_2
+317 0x6000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x6000 //TX_A_POST_FILT_S_5
+320 0x6000 //TX_A_POST_FILT_S_6
+321 0x6000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x4000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7CCD //TX_LAMBDA_PFILT_S_0
+340 0x7CCD //TX_LAMBDA_PFILT_S_1
+341 0x7CCD //TX_LAMBDA_PFILT_S_2
+342 0x7CCD //TX_LAMBDA_PFILT_S_3
+343 0x7CCD //TX_LAMBDA_PFILT_S_4
+344 0x7CCD //TX_LAMBDA_PFILT_S_5
+345 0x7CCD //TX_LAMBDA_PFILT_S_6
+346 0x7CCD //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0500 //TX_A_PEPPER
+349 0x1600 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0020 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x02A6 //TX_NOISE_TH_1
+371 0x04B0 //TX_NOISE_TH_2
+372 0x3194 //TX_NOISE_TH_3
+373 0x0960 //TX_NOISE_TH_4
+374 0x5555 //TX_NOISE_TH_5
+375 0x3FF4 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x02BC //TX_NOISE_TH_6
+379 0x0020 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0004 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0020 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0001 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x07F2 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7B02 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x000D //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x053D //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0100 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7500 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x0200 //TX_MIN_EQ_RE_EST_0
+153 0x0200 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1800 //TX_MIN_EQ_RE_EST_7
+160 0x1800 //TX_MIN_EQ_RE_EST_8
+161 0x3000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x6000 //TX_MIN_EQ_RE_EST_11
+164 0x7FFF //TX_MIN_EQ_RE_EST_12
+165 0x2000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x2000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x157C //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x1000 //TX_ADPT_STRICT_L
+222 0x1000 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF900 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0050 //TX_DELTA_THR_SN_EST_0
+251 0x01A0 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x7F00 //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0800 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0012 //TX_NS_LVL_CTRL_1
+283 0x0017 //TX_NS_LVL_CTRL_2
+284 0x0015 //TX_NS_LVL_CTRL_3
+285 0x0012 //TX_NS_LVL_CTRL_4
+286 0x0012 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000D //TX_MIN_GAIN_S_2
+292 0x000F //TX_MIN_GAIN_S_3
+293 0x000F //TX_MIN_GAIN_S_4
+294 0x000F //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x4000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x3000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x3000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7D00 //TX_LAMBDA_PFILT_S_0
+340 0x7900 //TX_LAMBDA_PFILT_S_1
+341 0x7400 //TX_LAMBDA_PFILT_S_2
+342 0x7900 //TX_LAMBDA_PFILT_S_3
+343 0x7D00 //TX_LAMBDA_PFILT_S_4
+344 0x7D00 //TX_LAMBDA_PFILT_S_5
+345 0x7D00 //TX_LAMBDA_PFILT_S_6
+346 0x7D00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0FA0 //TX_DT_BINVAD_ENDF
+358 0x0400 //TX_C_POST_FLT_DT
+359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x03ED //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x55F0 //TX_NOISE_TH_4
+374 0x7FFF //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0FA0 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x1000 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x000A //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x007A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x5000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x7FFF //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0014 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x483C //TX_FDEQ_GAIN_3
+571 0x303C //TX_FDEQ_GAIN_4
+572 0x3048 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D08 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x7800 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E48 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C08 //TX_PREEQ_BIN_MIC1_2
+693 0x0700 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x7800 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x4000 //TX_TDDRC_ALPHA_UP_01
+784 0x4000 //TX_TDDRC_ALPHA_UP_02
+785 0x4000 //TX_TDDRC_ALPHA_UP_03
+786 0x4000 //TX_TDDRC_ALPHA_UP_04
+787 0x6000 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0004 //TX_TDDRC_THRD_0
+855 0x0010 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x4000 //TX_TDDRC_ALPHA_UP_00
+861 0x6000 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x5FFC //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1D00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F3C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x000D //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x053D //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0300 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x5000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0010 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFB00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0018 //TX_NS_LVL_CTRL_3
+285 0x0016 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7C00 //TX_LAMBDA_PFILT_S_0
+340 0x7C00 //TX_LAMBDA_PFILT_S_1
+341 0x7C00 //TX_LAMBDA_PFILT_S_2
+342 0x7A00 //TX_LAMBDA_PFILT_S_3
+343 0x7C00 //TX_LAMBDA_PFILT_S_4
+344 0x7C00 //TX_LAMBDA_PFILT_S_5
+345 0x7C00 //TX_LAMBDA_PFILT_S_6
+346 0x7C00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0800 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0032 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x017E //TX_NOISE_TH_1
+371 0x0230 //TX_NOISE_TH_2
+372 0x3492 //TX_NOISE_TH_3
+373 0x4E20 //TX_NOISE_TH_4
+374 0x55B8 //TX_NOISE_TH_5
+375 0x49E6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0F0A //TX_NOISE_TH_6
+379 0x0033 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0033 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2648 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C0C //TX_PREEQ_BIN_MIC1_2
+693 0x0C0F //TX_PREEQ_BIN_MIC1_3
+694 0x0F0F //TX_PREEQ_BIN_MIC1_4
+695 0x0F09 //TX_PREEQ_BIN_MIC1_5
+696 0x0909 //TX_PREEQ_BIN_MIC1_6
+697 0x0908 //TX_PREEQ_BIN_MIC1_7
+698 0x0700 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0002 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0B50 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1200 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0093 //TX_DIST2REF1
+22 0x001A //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0400 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x2000 //TX_MIN_EQ_RE_EST_0
+153 0x0600 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x3000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x36B0 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x1000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0000 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x0014 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7D00 //TX_LAMBDA_PFILT_S_0
+340 0x7D00 //TX_LAMBDA_PFILT_S_1
+341 0x7D00 //TX_LAMBDA_PFILT_S_2
+342 0x7D00 //TX_LAMBDA_PFILT_S_3
+343 0x7D00 //TX_LAMBDA_PFILT_S_4
+344 0x7D00 //TX_LAMBDA_PFILT_S_5
+345 0x7D00 //TX_LAMBDA_PFILT_S_6
+346 0x7D00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0040 //TX_DT_BINVAD_TH_0
+354 0x0040 //TX_DT_BINVAD_TH_1
+355 0x0100 //TX_DT_BINVAD_TH_2
+356 0x0100 //TX_DT_BINVAD_TH_3
+357 0x36B0 //TX_DT_BINVAD_ENDF
+358 0x0200 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x01F4 //TX_NOISE_TH_2
+372 0x4E20 //TX_NOISE_TH_3
+373 0x2710 //TX_NOISE_TH_4
+374 0x2710 //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0DAC //TX_NOISE_TH_6
+379 0x0050 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0050 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4000 //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4850 //TX_FDEQ_GAIN_2
+570 0x5050 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x484A //TX_FDEQ_GAIN_5
+573 0x4E5E //TX_FDEQ_GAIN_6
+574 0x5850 //TX_FDEQ_GAIN_7
+575 0x5050 //TX_FDEQ_GAIN_8
+576 0x5050 //TX_FDEQ_GAIN_9
+577 0x5064 //TX_FDEQ_GAIN_10
+578 0x5C70 //TX_FDEQ_GAIN_11
+579 0x7088 //TX_FDEQ_GAIN_12
+580 0x8080 //TX_FDEQ_GAIN_13
+581 0x7474 //TX_FDEQ_GAIN_14
+582 0x8080 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0xF200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2625 //TX_PREEQ_GAIN_MIC1_8
+675 0x2421 //TX_PREEQ_GAIN_MIC1_9
+676 0x1D19 //TX_PREEQ_GAIN_MIC1_10
+677 0x1820 //TX_PREEQ_GAIN_MIC1_11
+678 0x2830 //TX_PREEQ_GAIN_MIC1_12
+679 0x303C //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C0C //TX_PREEQ_BIN_MIC1_2
+693 0x0C0F //TX_PREEQ_BIN_MIC1_3
+694 0x0F0F //TX_PREEQ_BIN_MIC1_4
+695 0x0F09 //TX_PREEQ_BIN_MIC1_5
+696 0x0909 //TX_PREEQ_BIN_MIC1_6
+697 0x0908 //TX_PREEQ_BIN_MIC1_7
+698 0x070F //TX_PREEQ_BIN_MIC1_8
+699 0x1F08 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0920 //TX_PREEQ_BIN_MIC1_11
+702 0x2020 //TX_PREEQ_BIN_MIC1_12
+703 0x2021 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0xF200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0056 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0042 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0002 //TX_TDDRC_THRD_1
+856 0x1000 //TX_TDDRC_THRD_2
+857 0x1000 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0BE0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0200 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x5454 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x3648 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x4B7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0093 //TX_DIST2REF1
+22 0x001A //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0A19 //TX_PGA_0
+28 0x0A19 //TX_PGA_1
+29 0x0A19 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0300 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7A00 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x2000 //TX_MIN_EQ_RE_EST_1
+154 0x2000 //TX_MIN_EQ_RE_EST_2
+155 0x4000 //TX_MIN_EQ_RE_EST_3
+156 0x4000 //TX_MIN_EQ_RE_EST_4
+157 0x7FFF //TX_MIN_EQ_RE_EST_5
+158 0x7FFF //TX_MIN_EQ_RE_EST_6
+159 0x7FFF //TX_MIN_EQ_RE_EST_7
+160 0x7FFF //TX_MIN_EQ_RE_EST_8
+161 0x7FFF //TX_MIN_EQ_RE_EST_9
+162 0x7FFF //TX_MIN_EQ_RE_EST_10
+163 0x7FFF //TX_MIN_EQ_RE_EST_11
+164 0x7FFF //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0CCD //TX_LAMBDA_CB_NLE
+167 0x2000 //TX_C_POST_FLT
+168 0x7FFF //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x09C4 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7D00 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0DAC //TX_DT_CUT_K
+214 0x0020 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0063 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFB00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0018 //TX_NS_LVL_CTRL_3
+285 0x0016 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7C00 //TX_LAMBDA_PFILT_S_0
+340 0x7C00 //TX_LAMBDA_PFILT_S_1
+341 0x7C00 //TX_LAMBDA_PFILT_S_2
+342 0x7A00 //TX_LAMBDA_PFILT_S_3
+343 0x7C00 //TX_LAMBDA_PFILT_S_4
+344 0x7C00 //TX_LAMBDA_PFILT_S_5
+345 0x7C00 //TX_LAMBDA_PFILT_S_6
+346 0x7C00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0200 //TX_DT_BINVAD_TH_0
+354 0x0200 //TX_DT_BINVAD_TH_1
+355 0x0200 //TX_DT_BINVAD_TH_2
+356 0x0200 //TX_DT_BINVAD_TH_3
+357 0x1F40 //TX_DT_BINVAD_ENDF
+358 0x0100 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x4E20 //TX_NOISE_TH_3
+373 0x4E20 //TX_NOISE_TH_4
+374 0x59D8 //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x2710 //TX_NOISE_TH_6
+379 0x0033 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0033 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x7FFF //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x5B5B //TX_FDEQ_GAIN_10
+578 0x7373 //TX_FDEQ_GAIN_11
+579 0x739A //TX_FDEQ_GAIN_12
+580 0x9AC4 //TX_FDEQ_GAIN_13
+581 0xC4C4 //TX_FDEQ_GAIN_14
+582 0xC4C4 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2625 //TX_PREEQ_GAIN_MIC1_8
+675 0x2421 //TX_PREEQ_GAIN_MIC1_9
+676 0x1D19 //TX_PREEQ_GAIN_MIC1_10
+677 0x1820 //TX_PREEQ_GAIN_MIC1_11
+678 0x2830 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x1812 //TX_PREEQ_BIN_MIC1_0
+691 0x0A0A //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x080A //TX_PREEQ_BIN_MIC1_3
+694 0x0B09 //TX_PREEQ_BIN_MIC1_4
+695 0x0A06 //TX_PREEQ_BIN_MIC1_5
+696 0x0606 //TX_PREEQ_BIN_MIC1_6
+697 0x0605 //TX_PREEQ_BIN_MIC1_7
+698 0x050A //TX_PREEQ_BIN_MIC1_8
+699 0x1505 //TX_PREEQ_BIN_MIC1_9
+700 0x0506 //TX_PREEQ_BIN_MIC1_10
+701 0x0615 //TX_PREEQ_BIN_MIC1_11
+702 0x1516 //TX_PREEQ_BIN_MIC1_12
+703 0x2021 //TX_PREEQ_BIN_MIC1_13
+704 0x2021 //TX_PREEQ_BIN_MIC1_14
+705 0x2021 //TX_PREEQ_BIN_MIC1_15
+706 0x0800 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0004 //TX_FILTINDX
+854 0x0004 //TX_TDDRC_THRD_0
+855 0x0016 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0CE6 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x002C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7B02 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0500 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x000A //RX_NS_LVL_CTRL
+23 0xF600 //RX_THR_SN_EST
+24 0x7000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1200 //RX_TDDRC_THRD_2
+115 0x1900 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0240 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7646 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7CCC //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6333 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0010 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x1000 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x2000 //TX_C_POST_FLT
+168 0x2000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x0064 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x5000 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7F00 //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x2000 //TX_DTD_THR2_0
+205 0x2000 //TX_DTD_THR2_1
+206 0x2000 //TX_DTD_THR2_2
+207 0x2000 //TX_DTD_THR2_3
+208 0x2000 //TX_DTD_THR2_4
+209 0x2000 //TX_DTD_THR2_5
+210 0x2000 //TX_DTD_THR2_6
+211 0x4100 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x1000 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0010 //TX_EPD_OFFSET_00
+233 0x0010 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xFA00 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xFA00 //TX_THR_SN_EST_6
+249 0xFA00 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0000 //TX_DELTA_THR_SN_EST_2
+253 0x0000 //TX_DELTA_THR_SN_EST_3
+254 0x0000 //TX_DELTA_THR_SN_EST_4
+255 0x0000 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0000 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0400 //TX_B_POST_FLT_0
+280 0x0400 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0010 //TX_NS_LVL_CTRL_1
+283 0x0010 //TX_NS_LVL_CTRL_2
+284 0x0010 //TX_NS_LVL_CTRL_3
+285 0x0010 //TX_NS_LVL_CTRL_4
+286 0x0010 //TX_NS_LVL_CTRL_5
+287 0x0010 //TX_NS_LVL_CTRL_6
+288 0x0010 //TX_NS_LVL_CTRL_7
+289 0x000D //TX_MIN_GAIN_S_0
+290 0x000D //TX_MIN_GAIN_S_1
+291 0x000D //TX_MIN_GAIN_S_2
+292 0x000D //TX_MIN_GAIN_S_3
+293 0x000D //TX_MIN_GAIN_S_4
+294 0x000D //TX_MIN_GAIN_S_5
+295 0x000D //TX_MIN_GAIN_S_6
+296 0x000D //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0014 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x4000 //TX_A_POST_FILT_S_6
+321 0x4000 //TX_A_POST_FILT_S_7
+322 0x0400 //TX_B_POST_FILT_0
+323 0x0400 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E14 //TX_LAMBDA_PFILT
+339 0x7C29 //TX_LAMBDA_PFILT_S_0
+340 0x7C29 //TX_LAMBDA_PFILT_S_1
+341 0x7C29 //TX_LAMBDA_PFILT_S_2
+342 0x7C29 //TX_LAMBDA_PFILT_S_3
+343 0x7C29 //TX_LAMBDA_PFILT_S_4
+344 0x7C29 //TX_LAMBDA_PFILT_S_5
+345 0x7C29 //TX_LAMBDA_PFILT_S_6
+346 0x7C29 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x0FA0 //TX_K_PEPPER_HF
+350 0x0400 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1B58 //TX_NOISE_TH_0_2
+369 0x2134 //TX_NOISE_TH_0_3
+370 0x02BC //TX_NOISE_TH_1
+371 0x1F40 //TX_NOISE_TH_2
+372 0x4650 //TX_NOISE_TH_3
+373 0x7148 //TX_NOISE_TH_4
+374 0x044C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x0032 //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN
+385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x00A5 //TX_OUT_ENER_S_TH_NOISY
+387 0x0029 //TX_OUT_ENER_TH_NOISE
+388 0x00CE //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0280 //TX_N_HOLD_HS
+416 0x006E //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2400 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x003C //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x2A3D //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0014 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D08 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0010 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0802 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0010 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0802 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0010 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0802 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x000B //TX_GAIN_LIMIT_0
+774 0x000B //TX_GAIN_LIMIT_1
+775 0x000B //TX_GAIN_LIMIT_2
+776 0x000B //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0001 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0xF800 //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2030 //RX_TDDRC_THRD_2
+115 0x2030 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0478 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2030 //RX_TDDRC_THRD_2
+115 0x2030 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0478 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2030 //RX_TDDRC_THRD_2
+115 0x2030 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0478 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2030 //RX_TDDRC_THRD_2
+115 0x2030 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0478 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2030 //RX_TDDRC_THRD_2
+115 0x2030 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0478 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2030 //RX_TDDRC_THRD_2
+115 0x2030 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0478 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2030 //RX_TDDRC_THRD_2
+115 0x2030 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0478 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2030 //RX_TDDRC_THRD_2
+115 0x2030 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0478 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0008 //TX_OPERATION_MODE_0
+1 0x0008 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7D83 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x6800 //TX_THR_PITCH_DET_0
+131 0x6000 //TX_THR_PITCH_DET_1
+132 0x5800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0019 //TX_EPD_OFFSET_00
+233 0x0019 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000F //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7CCD //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x7FFF //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0608 //TX_PREEQ_BIN_MIC1_0
+691 0x0808 //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x0808 //TX_PREEQ_BIN_MIC1_3
+694 0x0808 //TX_PREEQ_BIN_MIC1_4
+695 0x0808 //TX_PREEQ_BIN_MIC1_5
+696 0x0808 //TX_PREEQ_BIN_MIC1_6
+697 0x0808 //TX_PREEQ_BIN_MIC1_7
+698 0x0808 //TX_PREEQ_BIN_MIC1_8
+699 0x0808 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0808 //TX_PREEQ_BIN_MIC1_11
+702 0x0808 //TX_PREEQ_BIN_MIC1_12
+703 0x0808 //TX_PREEQ_BIN_MIC1_13
+704 0x0808 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x1000 //TX_TDDRC_ALPHA_UP_01
+784 0x1000 //TX_TDDRC_ALPHA_UP_02
+785 0x1000 //TX_TDDRC_ALPHA_UP_03
+786 0x1000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0001 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x1000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x3800 //RX_THR_PITCH_DET_0
+14 0x3000 //RX_THR_PITCH_DET_1
+15 0x2800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0600 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x2000 //RX_TDDRC_THRD_2
+115 0x3000 //RX_TDDRC_THRD_3
+116 0x0800 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0196 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2B68 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x009B //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0B80 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3E00 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7EFF //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x001E //TX_TAIL_LENGTH
+147 0x0080 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7000 //TX_EAD_THR
+151 0x0800 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x0800 //TX_MIN_EQ_RE_EST_1
+154 0x0800 //TX_MIN_EQ_RE_EST_2
+155 0x0800 //TX_MIN_EQ_RE_EST_3
+156 0x0800 //TX_MIN_EQ_RE_EST_4
+157 0x0800 //TX_MIN_EQ_RE_EST_5
+158 0x0800 //TX_MIN_EQ_RE_EST_6
+159 0x0800 //TX_MIN_EQ_RE_EST_7
+160 0x0800 //TX_MIN_EQ_RE_EST_8
+161 0x0800 //TX_MIN_EQ_RE_EST_9
+162 0x0800 //TX_MIN_EQ_RE_EST_10
+163 0x0800 //TX_MIN_EQ_RE_EST_11
+164 0x0800 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x2000 //TX_LAMBDA_CB_NLE
+167 0x6000 //TX_C_POST_FLT
+168 0x7000 //TX_GAIN_NP
+169 0x00C8 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7800 //TX_DTD_THR1_0
+198 0x7000 //TX_DTD_THR1_1
+199 0x7FFF //TX_DTD_THR1_2
+200 0x7FFF //TX_DTD_THR1_3
+201 0x7FFF //TX_DTD_THR1_4
+202 0x7FFF //TX_DTD_THR1_5
+203 0x7FFF //TX_DTD_THR1_6
+204 0x7FFF //TX_DTD_THR2_0
+205 0x7FFF //TX_DTD_THR2_1
+206 0x7FFF //TX_DTD_THR2_2
+207 0x7FFF //TX_DTD_THR2_3
+208 0x7FFF //TX_DTD_THR2_4
+209 0x7FFF //TX_DTD_THR2_5
+210 0x7FFF //TX_DTD_THR2_6
+211 0x1000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0BB8 //TX_DT_CUT_K
+214 0x0CCD //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x00F0 //TX_EPD_OFFSET_00
+233 0x00F0 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF400 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF600 //TX_THR_SN_EST_2
+245 0xF400 //TX_THR_SN_EST_3
+246 0xF400 //TX_THR_SN_EST_4
+247 0xF400 //TX_THR_SN_EST_5
+248 0xF400 //TX_THR_SN_EST_6
+249 0xF600 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x6000 //TX_LAMBDA_NN_EST_0
+259 0x6000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x000B //TX_NS_LVL_CTRL_0
+282 0x000F //TX_NS_LVL_CTRL_1
+283 0x0011 //TX_NS_LVL_CTRL_2
+284 0x000F //TX_NS_LVL_CTRL_3
+285 0x000F //TX_NS_LVL_CTRL_4
+286 0x000F //TX_NS_LVL_CTRL_5
+287 0x000F //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000C //TX_MIN_GAIN_S_0
+290 0x000C //TX_MIN_GAIN_S_1
+291 0x000F //TX_MIN_GAIN_S_2
+292 0x000C //TX_MIN_GAIN_S_3
+293 0x000C //TX_MIN_GAIN_S_4
+294 0x000C //TX_MIN_GAIN_S_5
+295 0x000C //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x7FFF //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x7FFF //TX_SNRI_SUP_4
+305 0x7FFF //TX_SNRI_SUP_5
+306 0x7FFF //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x000E //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x2000 //TX_A_POST_FILT_S_0
+315 0x4000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x5000 //TX_A_POST_FILT_S_3
+318 0x5000 //TX_A_POST_FILT_S_4
+319 0x5000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x5000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x1000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x1000 //TX_B_POST_FILT_4
+327 0x1000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x1000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7900 //TX_LAMBDA_PFILT
+339 0x7B00 //TX_LAMBDA_PFILT_S_0
+340 0x7B00 //TX_LAMBDA_PFILT_S_1
+341 0x7B00 //TX_LAMBDA_PFILT_S_2
+342 0x7B00 //TX_LAMBDA_PFILT_S_3
+343 0x7B00 //TX_LAMBDA_PFILT_S_4
+344 0x7B00 //TX_LAMBDA_PFILT_S_5
+345 0x7B00 //TX_LAMBDA_PFILT_S_6
+346 0x7B00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0800 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0190 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x00C8 //TX_NOISE_TH_2
+372 0x3A98 //TX_NOISE_TH_3
+373 0x0FA0 //TX_NOISE_TH_4
+374 0x157C //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x044C //TX_NOISE_TH_6
+379 0x0014 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x2900 //TX_MIN_G_CTRL_SSNS
+409 0x0800 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4868 //TX_PREEQ_GAIN_MIC0_8
+626 0x6860 //TX_PREEQ_GAIN_MIC0_9
+627 0x6048 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0E10 //TX_PREEQ_BIN_MIC1_0
+691 0x1010 //TX_PREEQ_BIN_MIC1_1
+692 0x1010 //TX_PREEQ_BIN_MIC1_2
+693 0x1010 //TX_PREEQ_BIN_MIC1_3
+694 0x1010 //TX_PREEQ_BIN_MIC1_4
+695 0x1010 //TX_PREEQ_BIN_MIC1_5
+696 0x1010 //TX_PREEQ_BIN_MIC1_6
+697 0x1010 //TX_PREEQ_BIN_MIC1_7
+698 0x1010 //TX_PREEQ_BIN_MIC1_8
+699 0x1010 //TX_PREEQ_BIN_MIC1_9
+700 0x1010 //TX_PREEQ_BIN_MIC1_10
+701 0x1010 //TX_PREEQ_BIN_MIC1_11
+702 0x1010 //TX_PREEQ_BIN_MIC1_12
+703 0x1010 //TX_PREEQ_BIN_MIC1_13
+704 0x1010 //TX_PREEQ_BIN_MIC1_14
+705 0x0200 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x000C //TX_GAIN_LIMIT_0
+774 0x000C //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000C //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x2000 //TX_TDDRC_THRD_2
+857 0x2000 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x05A0 //TX_TDDRC_DRC_GAIN
+867 0x78D6 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0024 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7FFF //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x1800 //RX_THR_PITCH_DET_0
+14 0x1000 //RX_THR_PITCH_DET_1
+15 0x0800 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0003 //RX_NS_LVL_CTRL
+23 0x9000 //RX_THR_SN_EST
+24 0x7CCD //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x5000 //RX_TDDRC_ALPHA_UP_1
+7 0x5000 //RX_TDDRC_ALPHA_UP_2
+8 0x5000 //RX_TDDRC_ALPHA_UP_3
+9 0x2000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x65AD //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x3000 //RX_TDDRC_SLANT_0
+117 0x7EB8 //RX_TDDRC_SLANT_1
+118 0x5000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x01C8 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0007 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x5333 //RX_FDDRC_SLANT_1_0
+107 0x5333 //RX_FDDRC_SLANT_1_1
+108 0x5333 //RX_FDDRC_SLANT_1_2
+109 0x5333 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0000 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0020 //TX_PATCH_REG
+3 0x0000 //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0000 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0000 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0000 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0000 //TX_PGA_0
+28 0x0000 //TX_PGA_1
+29 0x0000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0000 //TX_MIC_REFBLK_VOLUME
+108 0x0000 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0000 //TX_MICBLK_START_BIN
+118 0x0000 //TX_MICBLK_END_BIN
+119 0x0000 //TX_MICBLK_FE_HOLD
+120 0x0000 //TX_MICBLK_MR_EXP_TH
+121 0x0000 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0000 //TX_MIC_BLOCK_N
+128 0x0000 //TX_A_HP
+129 0x0000 //TX_B_PE
+130 0x0000 //TX_THR_PITCH_DET_0
+131 0x0000 //TX_THR_PITCH_DET_1
+132 0x0000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0000 //TX_TAIL_LENGTH
+147 0x0000 //TX_AEC_REF_GAIN_0
+148 0x0000 //TX_AEC_REF_GAIN_1
+149 0x0000 //TX_AEC_REF_GAIN_2
+150 0x0000 //TX_EAD_THR
+151 0x0000 //TX_THR_RE_EST
+152 0x0000 //TX_MIN_EQ_RE_EST_0
+153 0x0000 //TX_MIN_EQ_RE_EST_1
+154 0x0000 //TX_MIN_EQ_RE_EST_2
+155 0x0000 //TX_MIN_EQ_RE_EST_3
+156 0x0000 //TX_MIN_EQ_RE_EST_4
+157 0x0000 //TX_MIN_EQ_RE_EST_5
+158 0x0000 //TX_MIN_EQ_RE_EST_6
+159 0x0000 //TX_MIN_EQ_RE_EST_7
+160 0x0000 //TX_MIN_EQ_RE_EST_8
+161 0x0000 //TX_MIN_EQ_RE_EST_9
+162 0x0000 //TX_MIN_EQ_RE_EST_10
+163 0x0000 //TX_MIN_EQ_RE_EST_11
+164 0x0000 //TX_MIN_EQ_RE_EST_12
+165 0x0000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x0000 //TX_GAIN_NP
+169 0x0000 //TX_SE_HOLD_N
+170 0x0000 //TX_DT_HOLD_N
+171 0x0000 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0000 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x0000 //TX_DTD_THR1_0
+198 0x0000 //TX_DTD_THR1_1
+199 0x0000 //TX_DTD_THR1_2
+200 0x0000 //TX_DTD_THR1_3
+201 0x0000 //TX_DTD_THR1_4
+202 0x0000 //TX_DTD_THR1_5
+203 0x0000 //TX_DTD_THR1_6
+204 0x0000 //TX_DTD_THR2_0
+205 0x0000 //TX_DTD_THR2_1
+206 0x0000 //TX_DTD_THR2_2
+207 0x0000 //TX_DTD_THR2_3
+208 0x0000 //TX_DTD_THR2_4
+209 0x0000 //TX_DTD_THR2_5
+210 0x0000 //TX_DTD_THR2_6
+211 0x0000 //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0000 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0000 //TX_ADPT_STRICT_L
+222 0x0000 //TX_ADPT_STRICT_H
+223 0x0000 //TX_RATIO_DT_L_TH_LOW
+224 0x0000 //TX_RATIO_DT_H_TH_LOW
+225 0x0000 //TX_RATIO_DT_L_TH_HIGH
+226 0x0000 //TX_RATIO_DT_H_TH_HIGH
+227 0x0000 //TX_RATIO_DT_L0_TH
+228 0x0000 //TX_B_POST_FILT_ECHO_L
+229 0x0000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x0000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x0000 //TX_RATIO_DT_L0_TH_HIGH
+235 0x0000 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0x0000 //TX_THR_SN_EST_0
+243 0x0000 //TX_THR_SN_EST_1
+244 0x0000 //TX_THR_SN_EST_2
+245 0x0000 //TX_THR_SN_EST_3
+246 0x0000 //TX_THR_SN_EST_4
+247 0x0000 //TX_THR_SN_EST_5
+248 0x0000 //TX_THR_SN_EST_6
+249 0x0000 //TX_THR_SN_EST_7
+250 0x0000 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0000 //TX_DELTA_THR_SN_EST_2
+253 0x0000 //TX_DELTA_THR_SN_EST_3
+254 0x0000 //TX_DELTA_THR_SN_EST_4
+255 0x0000 //TX_DELTA_THR_SN_EST_5
+256 0x0000 //TX_DELTA_THR_SN_EST_6
+257 0x0000 //TX_DELTA_THR_SN_EST_7
+258 0x0000 //TX_LAMBDA_NN_EST_0
+259 0x0000 //TX_LAMBDA_NN_EST_1
+260 0x0000 //TX_LAMBDA_NN_EST_2
+261 0x0000 //TX_LAMBDA_NN_EST_3
+262 0x0000 //TX_LAMBDA_NN_EST_4
+263 0x0000 //TX_LAMBDA_NN_EST_5
+264 0x0000 //TX_LAMBDA_NN_EST_6
+265 0x0000 //TX_LAMBDA_NN_EST_7
+266 0x0000 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x0000 //TX_G_STRICT
+270 0x0000 //TX_EQ_THR_BF
+271 0x0000 //TX_LAMBDA_EQ_BF
+272 0x0000 //TX_NE_RTO_TH
+273 0x0000 //TX_NE_RTO_TH_L
+274 0x0000 //TX_MAINREFRTOH_TH_H
+275 0x0000 //TX_MAINREFRTOH_TH_L
+276 0x0000 //TX_MAINREFRTO_TH_H
+277 0x0000 //TX_MAINREFRTO_TH_L
+278 0x0000 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x0000 //TX_NS_LVL_CTRL_0
+282 0x0000 //TX_NS_LVL_CTRL_1
+283 0x0000 //TX_NS_LVL_CTRL_2
+284 0x0000 //TX_NS_LVL_CTRL_3
+285 0x0000 //TX_NS_LVL_CTRL_4
+286 0x0000 //TX_NS_LVL_CTRL_5
+287 0x0000 //TX_NS_LVL_CTRL_6
+288 0x0000 //TX_NS_LVL_CTRL_7
+289 0x0000 //TX_MIN_GAIN_S_0
+290 0x0000 //TX_MIN_GAIN_S_1
+291 0x0000 //TX_MIN_GAIN_S_2
+292 0x0000 //TX_MIN_GAIN_S_3
+293 0x0000 //TX_MIN_GAIN_S_4
+294 0x0000 //TX_MIN_GAIN_S_5
+295 0x0000 //TX_MIN_GAIN_S_6
+296 0x0000 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x0000 //TX_SNRI_SUP_0
+301 0x0000 //TX_SNRI_SUP_1
+302 0x0000 //TX_SNRI_SUP_2
+303 0x0000 //TX_SNRI_SUP_3
+304 0x0000 //TX_SNRI_SUP_4
+305 0x0000 //TX_SNRI_SUP_5
+306 0x0000 //TX_SNRI_SUP_6
+307 0x0000 //TX_SNRI_SUP_7
+308 0x0000 //TX_THR_LFNS
+309 0x0000 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x0000 //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x0000 //TX_A_POST_FILT_S_0
+315 0x0000 //TX_A_POST_FILT_S_1
+316 0x0000 //TX_A_POST_FILT_S_2
+317 0x0000 //TX_A_POST_FILT_S_3
+318 0x0000 //TX_A_POST_FILT_S_4
+319 0x0000 //TX_A_POST_FILT_S_5
+320 0x0000 //TX_A_POST_FILT_S_6
+321 0x0000 //TX_A_POST_FILT_S_7
+322 0x0000 //TX_B_POST_FILT_0
+323 0x0000 //TX_B_POST_FILT_1
+324 0x0000 //TX_B_POST_FILT_2
+325 0x0000 //TX_B_POST_FILT_3
+326 0x0000 //TX_B_POST_FILT_4
+327 0x0000 //TX_B_POST_FILT_5
+328 0x0000 //TX_B_POST_FILT_6
+329 0x0000 //TX_B_POST_FILT_7
+330 0x0000 //TX_B_LESSCUT_RTO_S_0
+331 0x0000 //TX_B_LESSCUT_RTO_S_1
+332 0x0000 //TX_B_LESSCUT_RTO_S_2
+333 0x0000 //TX_B_LESSCUT_RTO_S_3
+334 0x0000 //TX_B_LESSCUT_RTO_S_4
+335 0x0000 //TX_B_LESSCUT_RTO_S_5
+336 0x0000 //TX_B_LESSCUT_RTO_S_6
+337 0x0000 //TX_B_LESSCUT_RTO_S_7
+338 0x0000 //TX_LAMBDA_PFILT
+339 0x0000 //TX_LAMBDA_PFILT_S_0
+340 0x0000 //TX_LAMBDA_PFILT_S_1
+341 0x0000 //TX_LAMBDA_PFILT_S_2
+342 0x0000 //TX_LAMBDA_PFILT_S_3
+343 0x0000 //TX_LAMBDA_PFILT_S_4
+344 0x0000 //TX_LAMBDA_PFILT_S_5
+345 0x0000 //TX_LAMBDA_PFILT_S_6
+346 0x0000 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0000 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0000 //TX_HMNC_BST_FLG
+352 0x0000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0000 //TX_NS_B_POST_FLT_LESSCUT
+360 0x0000 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0000 //TX_NOISEDET
+366 0x0000 //TX_NDETCT
+367 0x0000 //TX_NOISE_TH_0
+368 0x0000 //TX_NOISE_TH_0_2
+369 0x0000 //TX_NOISE_TH_0_3
+370 0x0000 //TX_NOISE_TH_1
+371 0x0000 //TX_NOISE_TH_2
+372 0x0000 //TX_NOISE_TH_3
+373 0x0000 //TX_NOISE_TH_4
+374 0x0000 //TX_NOISE_TH_5
+375 0x0000 //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x0000 //TX_NOISE_TH_5_4
+378 0x0000 //TX_NOISE_TH_6
+379 0x0000 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0000 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0000 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0000 //TX_OUT_ENER_S_TH_NOISY
+387 0x0000 //TX_OUT_ENER_TH_NOISE
+388 0x0000 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0000 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x0000 //TX_NS_ENOISE_MIC0_TH
+406 0x0000 //TX_MINENOISE_MIC0_TH
+407 0x0000 //TX_MINENOISE_MIC0_S_TH
+408 0x0000 //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x0000 //TX_NS_FP_K_METAL
+411 0x0000 //TX_NOISEDET_BOOST_TH
+412 0x0000 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x0000 //TX_RHO_UPB
+415 0x0000 //TX_N_HOLD_HS
+416 0x0000 //TX_N_RHO_BFR0
+417 0x0000 //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0000 //TX_THR_STD_NSR
+420 0x0000 //TX_THR_STD_PLH
+421 0x0000 //TX_N_HOLD_STD
+422 0x0000 //TX_THR_STD_RHO
+423 0x0000 //TX_BF_RESET_THR_HS
+424 0x0000 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x0000 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x0000 //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0000 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x0000 //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x0000 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x0000 //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0000 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x0000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0000 //TX_N1_HOLD_HF
+478 0x0000 //TX_N2_HOLD_HF
+479 0x0000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0000 //TX_NOR_OFF_THR
+498 0x0000 //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x0000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x0000 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x0000 //TX_C_POST_FLT_CUT
+506 0x0000 //TX_RADIODTLV
+507 0x0000 //TX_POWER_LINEIN_TH
+508 0x0000 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0000 //TX_ECHO_TH
+511 0x0000 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x0000 //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0000 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0000 //TX_FDEQ_SUBNUM
+567 0x0000 //TX_FDEQ_GAIN_0
+568 0x0000 //TX_FDEQ_GAIN_1
+569 0x0000 //TX_FDEQ_GAIN_2
+570 0x0000 //TX_FDEQ_GAIN_3
+571 0x0000 //TX_FDEQ_GAIN_4
+572 0x0000 //TX_FDEQ_GAIN_5
+573 0x0000 //TX_FDEQ_GAIN_6
+574 0x0000 //TX_FDEQ_GAIN_7
+575 0x0000 //TX_FDEQ_GAIN_8
+576 0x0000 //TX_FDEQ_GAIN_9
+577 0x0000 //TX_FDEQ_GAIN_10
+578 0x0000 //TX_FDEQ_GAIN_11
+579 0x0000 //TX_FDEQ_GAIN_12
+580 0x0000 //TX_FDEQ_GAIN_13
+581 0x0000 //TX_FDEQ_GAIN_14
+582 0x0000 //TX_FDEQ_GAIN_15
+583 0x0000 //TX_FDEQ_GAIN_16
+584 0x0000 //TX_FDEQ_GAIN_17
+585 0x0000 //TX_FDEQ_GAIN_18
+586 0x0000 //TX_FDEQ_GAIN_19
+587 0x0000 //TX_FDEQ_GAIN_20
+588 0x0000 //TX_FDEQ_GAIN_21
+589 0x0000 //TX_FDEQ_GAIN_22
+590 0x0000 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0000 //TX_PREEQ_SUBNUM_MIC0
+617 0x0000 //TX_PREEQ_GAIN_MIC0_0
+618 0x0000 //TX_PREEQ_GAIN_MIC0_1
+619 0x0000 //TX_PREEQ_GAIN_MIC0_2
+620 0x0000 //TX_PREEQ_GAIN_MIC0_3
+621 0x0000 //TX_PREEQ_GAIN_MIC0_4
+622 0x0000 //TX_PREEQ_GAIN_MIC0_5
+623 0x0000 //TX_PREEQ_GAIN_MIC0_6
+624 0x0000 //TX_PREEQ_GAIN_MIC0_7
+625 0x0000 //TX_PREEQ_GAIN_MIC0_8
+626 0x0000 //TX_PREEQ_GAIN_MIC0_9
+627 0x0000 //TX_PREEQ_GAIN_MIC0_10
+628 0x0000 //TX_PREEQ_GAIN_MIC0_11
+629 0x0000 //TX_PREEQ_GAIN_MIC0_12
+630 0x0000 //TX_PREEQ_GAIN_MIC0_13
+631 0x0000 //TX_PREEQ_GAIN_MIC0_14
+632 0x0000 //TX_PREEQ_GAIN_MIC0_15
+633 0x0000 //TX_PREEQ_GAIN_MIC0_16
+634 0x0000 //TX_PREEQ_GAIN_MIC0_17
+635 0x0000 //TX_PREEQ_GAIN_MIC0_18
+636 0x0000 //TX_PREEQ_GAIN_MIC0_19
+637 0x0000 //TX_PREEQ_GAIN_MIC0_20
+638 0x0000 //TX_PREEQ_GAIN_MIC0_21
+639 0x0000 //TX_PREEQ_GAIN_MIC0_22
+640 0x0000 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0000 //TX_PREEQ_SUBNUM_MIC1
+666 0x0000 //TX_PREEQ_GAIN_MIC1_0
+667 0x0000 //TX_PREEQ_GAIN_MIC1_1
+668 0x0000 //TX_PREEQ_GAIN_MIC1_2
+669 0x0000 //TX_PREEQ_GAIN_MIC1_3
+670 0x0000 //TX_PREEQ_GAIN_MIC1_4
+671 0x0000 //TX_PREEQ_GAIN_MIC1_5
+672 0x0000 //TX_PREEQ_GAIN_MIC1_6
+673 0x0000 //TX_PREEQ_GAIN_MIC1_7
+674 0x0000 //TX_PREEQ_GAIN_MIC1_8
+675 0x0000 //TX_PREEQ_GAIN_MIC1_9
+676 0x0000 //TX_PREEQ_GAIN_MIC1_10
+677 0x0000 //TX_PREEQ_GAIN_MIC1_11
+678 0x0000 //TX_PREEQ_GAIN_MIC1_12
+679 0x0000 //TX_PREEQ_GAIN_MIC1_13
+680 0x0000 //TX_PREEQ_GAIN_MIC1_14
+681 0x0000 //TX_PREEQ_GAIN_MIC1_15
+682 0x0000 //TX_PREEQ_GAIN_MIC1_16
+683 0x0000 //TX_PREEQ_GAIN_MIC1_17
+684 0x0000 //TX_PREEQ_GAIN_MIC1_18
+685 0x0000 //TX_PREEQ_GAIN_MIC1_19
+686 0x0000 //TX_PREEQ_GAIN_MIC1_20
+687 0x0000 //TX_PREEQ_GAIN_MIC1_21
+688 0x0000 //TX_PREEQ_GAIN_MIC1_22
+689 0x0000 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0000 //TX_PREEQ_SUBNUM_MIC2
+715 0x0000 //TX_PREEQ_GAIN_MIC2_0
+716 0x0000 //TX_PREEQ_GAIN_MIC2_1
+717 0x0000 //TX_PREEQ_GAIN_MIC2_2
+718 0x0000 //TX_PREEQ_GAIN_MIC2_3
+719 0x0000 //TX_PREEQ_GAIN_MIC2_4
+720 0x0000 //TX_PREEQ_GAIN_MIC2_5
+721 0x0000 //TX_PREEQ_GAIN_MIC2_6
+722 0x0000 //TX_PREEQ_GAIN_MIC2_7
+723 0x0000 //TX_PREEQ_GAIN_MIC2_8
+724 0x0000 //TX_PREEQ_GAIN_MIC2_9
+725 0x0000 //TX_PREEQ_GAIN_MIC2_10
+726 0x0000 //TX_PREEQ_GAIN_MIC2_11
+727 0x0000 //TX_PREEQ_GAIN_MIC2_12
+728 0x0000 //TX_PREEQ_GAIN_MIC2_13
+729 0x0000 //TX_PREEQ_GAIN_MIC2_14
+730 0x0000 //TX_PREEQ_GAIN_MIC2_15
+731 0x0000 //TX_PREEQ_GAIN_MIC2_16
+732 0x0000 //TX_PREEQ_GAIN_MIC2_17
+733 0x0000 //TX_PREEQ_GAIN_MIC2_18
+734 0x0000 //TX_PREEQ_GAIN_MIC2_19
+735 0x0000 //TX_PREEQ_GAIN_MIC2_20
+736 0x0000 //TX_PREEQ_GAIN_MIC2_21
+737 0x0000 //TX_PREEQ_GAIN_MIC2_22
+738 0x0000 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0000 //TX_MASKING_ABILITY
+764 0x0000 //TX_NND_WEIGHT
+765 0x0000 //TX_MIC_CALIBRATION_0
+766 0x0000 //TX_MIC_CALIBRATION_1
+767 0x0000 //TX_MIC_CALIBRATION_2
+768 0x0000 //TX_MIC_CALIBRATION_3
+769 0x0000 //TX_MIC_PWR_BIAS_0
+770 0x0000 //TX_MIC_PWR_BIAS_1
+771 0x0000 //TX_MIC_PWR_BIAS_2
+772 0x0000 //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0000 //TX_GAIN_LIMIT_1
+775 0x0000 //TX_GAIN_LIMIT_2
+776 0x0000 //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0000 //TX_TDDRC_ALPHA_UP_01
+784 0x0000 //TX_TDDRC_ALPHA_UP_02
+785 0x0000 //TX_TDDRC_ALPHA_UP_03
+786 0x0000 //TX_TDDRC_ALPHA_UP_04
+787 0x0000 //TX_TDDRC_ALPHA_DWN_01
+788 0x0000 //TX_TDDRC_ALPHA_DWN_02
+789 0x0000 //TX_TDDRC_ALPHA_DWN_03
+790 0x0000 //TX_TDDRC_ALPHA_DWN_04
+791 0x0000 //TX_TDDRC_TD_DRC_LIMIT
+792 0x0000 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0000 //TX_DEADMIC_SILENCE_TH
+817 0x0000 //TX_MIC_DEGRADE_TH
+818 0x0000 //TX_DEADMIC_CNT
+819 0x0000 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x0000 //TX_LAMBDA_PKA_FP
+830 0x0000 //TX_TPKA_FP
+831 0x0000 //TX_MIN_G_FP
+832 0x0000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0000 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0000 //TX_TDDRC_THRD_2
+857 0x0000 //TX_TDDRC_THRD_3
+858 0x0000 //TX_TDDRC_SLANT_0
+859 0x0000 //TX_TDDRC_SLANT_1
+860 0x0000 //TX_TDDRC_ALPHA_UP_00
+861 0x0000 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0000 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0000 //TX_TFMASKHTH
+872 0x0000 //TX_TFMASKLTH_BINVAD
+873 0x0000 //TX_TFMASKLTH_NS_EST
+874 0x0000 //TX_TFMASKLTH_DOA
+875 0x0000 //TX_TFMASKTH_BLESSCUT
+876 0x0000 //TX_B_LESSCUT_RTO_MASK
+877 0x0000 //TX_SB_RHO_MEAN_TH_ABN
+878 0x0000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x0000 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0000 //TX_FASTNS_ARSPC_TH
+889 0x0000 //TX_FASTNS_MASK5_TH
+890 0x0000 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x0000 //TX_A_LESSCUT_RTO_MASK
+892 0x0000 //TX_FASTNS_NOISETH
+893 0x0000 //TX_FASTNS_SSA_THLFL
+894 0x0000 //TX_FASTNS_SSA_THHFL
+895 0x0000 //TX_FASTNS_SSA_THLFH
+896 0x0000 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0000 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+10 0x0000 //RX_PGA
+11 0x0000 //RX_A_HP
+12 0x0000 //RX_B_PE
+13 0x0000 //RX_THR_PITCH_DET_0
+14 0x0000 //RX_THR_PITCH_DET_1
+15 0x0000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0000 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0000 //RX_NS_LVL_CTRL
+23 0x0000 //RX_THR_SN_EST
+24 0x0000 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x0000 //RX_LMT_ALPHA
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0000 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+125 0x0000 //RX_LAMBDA_PKA_FP
+126 0x0000 //RX_TPKA_FP
+127 0x0000 //RX_MIN_G_FP
+128 0x0000 //RX_MAX_G_FP
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x000C //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0014 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0021 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0037 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x005B //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0099 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x0000 //RX_TDDRC_ALPHA_UP_1
+7 0x0000 //RX_TDDRC_ALPHA_UP_2
+8 0x0000 //RX_TDDRC_ALPHA_UP_3
+9 0x0000 //RX_TDDRC_ALPHA_UP_4
+27 0x0000 //RX_TDDRC_ALPHA_DWN_1
+28 0x0000 //RX_TDDRC_ALPHA_DWN_2
+29 0x0000 //RX_TDDRC_ALPHA_DWN_3
+32 0x0000 //RX_TDDRC_ALPHA_DWN_4
+33 0x0000 //RX_TDDRC_LIMITER_THRD
+34 0x0000 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0000 //RX_TDDRC_THRD_2
+115 0x0000 //RX_TDDRC_THRD_3
+116 0x0000 //RX_TDDRC_SLANT_0
+117 0x0000 //RX_TDDRC_SLANT_1
+118 0x0000 //RX_TDDRC_ALPHA_UP_0
+119 0x0000 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0000 //RX_TDDRC_DRC_GAIN
+38 0x0000 //RX_FDEQ_SUBNUM
+39 0x0000 //RX_FDEQ_GAIN_0
+40 0x0000 //RX_FDEQ_GAIN_1
+41 0x0000 //RX_FDEQ_GAIN_2
+42 0x0000 //RX_FDEQ_GAIN_3
+43 0x0000 //RX_FDEQ_GAIN_4
+44 0x0000 //RX_FDEQ_GAIN_5
+45 0x0000 //RX_FDEQ_GAIN_6
+46 0x0000 //RX_FDEQ_GAIN_7
+47 0x0000 //RX_FDEQ_GAIN_8
+48 0x0000 //RX_FDEQ_GAIN_9
+49 0x0000 //RX_FDEQ_GAIN_10
+50 0x0000 //RX_FDEQ_GAIN_11
+51 0x0000 //RX_FDEQ_GAIN_12
+52 0x0000 //RX_FDEQ_GAIN_13
+53 0x0000 //RX_FDEQ_GAIN_14
+54 0x0000 //RX_FDEQ_GAIN_15
+55 0x0000 //RX_FDEQ_GAIN_16
+56 0x0000 //RX_FDEQ_GAIN_17
+57 0x0000 //RX_FDEQ_GAIN_18
+58 0x0000 //RX_FDEQ_GAIN_19
+59 0x0000 //RX_FDEQ_GAIN_20
+60 0x0000 //RX_FDEQ_GAIN_21
+61 0x0000 //RX_FDEQ_GAIN_22
+62 0x0000 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0000 //RX_FDDRC_BAND_MARGIN_0
+90 0x0000 //RX_FDDRC_BAND_MARGIN_1
+91 0x0000 //RX_FDDRC_BAND_MARGIN_2
+92 0x0000 //RX_FDDRC_BAND_MARGIN_3
+93 0x0000 //RX_FDDRC_BLOCK_EXP
+94 0x0000 //RX_FDDRC_THRD_2_0
+95 0x0000 //RX_FDDRC_THRD_2_1
+96 0x0000 //RX_FDDRC_THRD_2_2
+97 0x0000 //RX_FDDRC_THRD_2_3
+98 0x0000 //RX_FDDRC_THRD_3_0
+99 0x0000 //RX_FDDRC_THRD_3_1
+100 0x0000 //RX_FDDRC_THRD_3_2
+101 0x0000 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x0000 //RX_FDDRC_SLANT_1_0
+107 0x0000 //RX_FDDRC_SLANT_1_1
+108 0x0000 //RX_FDDRC_SLANT_1_2
+109 0x0000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x01B1 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0000 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0000 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF200 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x000C //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x199A //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x1000 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x6666 //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x0000 //TX_MINENOISE_MIC0_TH_MTS
+381 0x0000 //TX_MINENOISE_MIC0_TH_EXP
+382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0000 //TX_MU_ARSP_EST
+396 0x0000 //TX_P_OUTBEAM_MIN_TH
+397 0x0000 //TX_EXTRA_NS_L
+398 0x0000 //TX_EXTRA_NS_A
+399 0x0000 //TX_VR_NOISE_FLOOR_TH
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0000 //TX_BF_LESSCUT_BBIN
+554 0x0000 //TX_BF_LESSCUT_EBIN
+555 0x0000 //TX_POSTBFB0
+556 0x0000 //TX_POSTBFB
+557 0x0000 //TX_POSTBFE
+558 0x0000 //TX_SPEECH_SNR_TH
+559 0x0000 //TX_PB_MAX_PRI_SNR_TH
+560 0x0000 //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xD99A //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x027C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0005 //RX_FILTINDX
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0023 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0034 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x004D //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0073 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x00AC //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x1000 //RX_TDDRC_ALPHA_UP_1
+7 0x1000 //RX_TDDRC_ALPHA_UP_2
+8 0x1000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x4000 //RX_TDDRC_ALPHA_DWN_2
+29 0x4000 //RX_TDDRC_ALPHA_DWN_3
+32 0x4000 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x1000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0700 //RX_TDDRC_DRC_GAIN
+38 0x0014 //RX_FDEQ_SUBNUM
+39 0x8080 //RX_FDEQ_GAIN_0
+40 0x8060 //RX_FDEQ_GAIN_1
+41 0x6060 //RX_FDEQ_GAIN_2
+42 0x6070 //RX_FDEQ_GAIN_3
+43 0x6858 //RX_FDEQ_GAIN_4
+44 0x5858 //RX_FDEQ_GAIN_5
+45 0x5848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x485A //RX_FDEQ_GAIN_8
+48 0x5A58 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0405 //RX_FDEQ_BIN_4
+68 0x0506 //RX_FDEQ_BIN_5
+69 0x0708 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D08 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x0060 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x0600 //RX_FDDRC_THRD_2_0
+95 0x0600 //RX_FDDRC_THRD_2_1
+96 0x0600 //RX_FDDRC_THRD_2_2
+97 0x0600 //RX_FDDRC_THRD_2_3
+98 0x0800 //RX_FDDRC_THRD_3_0
+99 0x0800 //RX_FDDRC_THRD_3_1
+100 0x0800 //RX_FDDRC_THRD_3_2
+101 0x0800 //RX_FDDRC_THRD_3_3
+102 0x0000 //RX_FDDRC_SLANT_0_0
+103 0x0000 //RX_FDDRC_SLANT_0_1
+104 0x0000 //RX_FDDRC_SLANT_0_2
+105 0x0000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x01B1 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0000 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0000 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF200 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x000C //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x199A //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x1000 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x6666 //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x0000 //TX_MINENOISE_MIC0_TH_MTS
+381 0x0000 //TX_MINENOISE_MIC0_TH_EXP
+382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0000 //TX_MU_ARSP_EST
+396 0x0000 //TX_P_OUTBEAM_MIN_TH
+397 0x0000 //TX_EXTRA_NS_L
+398 0x0000 //TX_EXTRA_NS_A
+399 0x0000 //TX_VR_NOISE_FLOOR_TH
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0000 //TX_BF_LESSCUT_BBIN
+554 0x0000 //TX_BF_LESSCUT_EBIN
+555 0x0000 //TX_POSTBFB0
+556 0x0000 //TX_POSTBFB
+557 0x0000 //TX_POSTBFE
+558 0x0000 //TX_SPEECH_SNR_TH
+559 0x0000 //TX_PB_MAX_PRI_SNR_TH
+560 0x0000 //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xD99A //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x027C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0001 //RX_SAMPLINGFREQ_SIG
+3 0x0001 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7B02 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0023 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0034 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x004D //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0073 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x00AC //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1C00 //RX_TDDRC_THRD_2
+115 0x1C00 //RX_TDDRC_THRD_3
+116 0x7FFF //RX_TDDRC_SLANT_0
+117 0x7FFF //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0780 //RX_TDDRC_DRC_GAIN
+38 0x001C //RX_FDEQ_SUBNUM
+39 0x6868 //RX_FDEQ_GAIN_0
+40 0x6858 //RX_FDEQ_GAIN_1
+41 0x5858 //RX_FDEQ_GAIN_2
+42 0x5858 //RX_FDEQ_GAIN_3
+43 0x5C5C //RX_FDEQ_GAIN_4
+44 0x7A54 //RX_FDEQ_GAIN_5
+45 0x5448 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4860 //RX_FDEQ_GAIN_8
+48 0x6068 //RX_FDEQ_GAIN_9
+49 0x7070 //RX_FDEQ_GAIN_10
+50 0x8070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x8080 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0204 //RX_FDEQ_BIN_5
+69 0x0A0A //RX_FDEQ_BIN_6
+70 0x0A0A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x0E0F //RX_FDEQ_BIN_10
+74 0x0F10 //RX_FDEQ_BIN_11
+75 0x1011 //RX_FDEQ_BIN_12
+76 0x1104 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x01B1 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0000 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0000 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF200 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x000C //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x199A //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x1000 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x6666 //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x0000 //TX_MINENOISE_MIC0_TH_MTS
+381 0x0000 //TX_MINENOISE_MIC0_TH_EXP
+382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0000 //TX_MU_ARSP_EST
+396 0x0000 //TX_P_OUTBEAM_MIN_TH
+397 0x0000 //TX_EXTRA_NS_L
+398 0x0000 //TX_EXTRA_NS_A
+399 0x0000 //TX_VR_NOISE_FLOOR_TH
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0000 //TX_BF_LESSCUT_BBIN
+554 0x0000 //TX_BF_LESSCUT_EBIN
+555 0x0000 //TX_POSTBFB0
+556 0x0000 //TX_POSTBFB
+557 0x0000 //TX_POSTBFE
+558 0x0000 //TX_SPEECH_SNR_TH
+559 0x0000 //TX_PB_MAX_PRI_SNR_TH
+560 0x0000 //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xD99A //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x027C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0003 //RX_SAMPLINGFREQ_SIG
+3 0x0003 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0010 //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0023 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0034 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x004D //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0073 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x00AC //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x6000 //RX_TDDRC_ALPHA_UP_1
+7 0x6000 //RX_TDDRC_ALPHA_UP_2
+8 0x6000 //RX_TDDRC_ALPHA_UP_3
+9 0x1000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7214 //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0002 //RX_TDDRC_THRD_0
+113 0x0004 //RX_TDDRC_THRD_1
+114 0x1A00 //RX_TDDRC_THRD_2
+115 0x1A00 //RX_TDDRC_THRD_3
+116 0x7EB8 //RX_TDDRC_SLANT_0
+117 0x2500 //RX_TDDRC_SLANT_1
+118 0x6000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0440 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x6648 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x6060 //RX_FDEQ_GAIN_9
+49 0x6060 //RX_FDEQ_GAIN_10
+50 0x6060 //RX_FDEQ_GAIN_11
+51 0x6060 //RX_FDEQ_GAIN_12
+52 0x6060 //RX_FDEQ_GAIN_13
+53 0x6060 //RX_FDEQ_GAIN_14
+54 0x6060 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0303 //RX_FDEQ_BIN_2
+66 0x0304 //RX_FDEQ_BIN_3
+67 0x0404 //RX_FDEQ_BIN_4
+68 0x0209 //RX_FDEQ_BIN_5
+69 0x0808 //RX_FDEQ_BIN_6
+70 0x090A //RX_FDEQ_BIN_7
+71 0x0B0C //RX_FDEQ_BIN_8
+72 0x0D0E //RX_FDEQ_BIN_9
+73 0x1013 //RX_FDEQ_BIN_10
+74 0x1719 //RX_FDEQ_BIN_11
+75 0x1B1E //RX_FDEQ_BIN_12
+76 0x1E1E //RX_FDEQ_BIN_13
+77 0x1E28 //RX_FDEQ_BIN_14
+78 0x282C //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0035 //RX_FDDRC_BAND_MARGIN_1
+91 0x00D5 //RX_FDDRC_BAND_MARGIN_2
+92 0x0120 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x01B1 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0000 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0000 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF200 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x000C //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x199A //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x1000 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x6666 //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x0000 //TX_MINENOISE_MIC0_TH_MTS
+381 0x0000 //TX_MINENOISE_MIC0_TH_EXP
+382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0000 //TX_MU_ARSP_EST
+396 0x0000 //TX_P_OUTBEAM_MIN_TH
+397 0x0000 //TX_EXTRA_NS_L
+398 0x0000 //TX_EXTRA_NS_A
+399 0x0000 //TX_VR_NOISE_FLOOR_TH
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0000 //TX_BF_LESSCUT_BBIN
+554 0x0000 //TX_BF_LESSCUT_EBIN
+555 0x0000 //TX_POSTBFB0
+556 0x0000 //TX_POSTBFB
+557 0x0000 //TX_POSTBFE
+558 0x0000 //TX_SPEECH_SNR_TH
+559 0x0000 //TX_PB_MAX_PRI_SNR_TH
+560 0x0000 //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xD99A //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x006C //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0004 //RX_SAMPLINGFREQ_SIG
+3 0x0004 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+10 0x0800 //RX_PGA
+11 0x7E56 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0008 //RX_PITCH_BFR_LEN
+17 0x0003 //RX_SBD_PITCH_DET
+18 0x0100 //RX_PP_RESRV_0
+19 0x0020 //RX_PP_RESRV_1
+20 0x0400 //RX_N_SN_EST
+21 0x000C //RX_N2_SN_EST
+22 0x0014 //RX_NS_LVL_CTRL
+23 0xF400 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x00C8 //RX_FENS_RESRV_0
+26 0x0190 //RX_FENS_RESRV_1
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+30 0x0002 //RX_EXTRA_NS_L
+31 0x0800 //RX_EXTRA_NS_A
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x199A //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0002 //RX_FILTINDX
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x2000 //RX_MIN_G_FP
+128 0x0080 //RX_MAX_G_FP
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0000 //RX_MAXLEVEL_CNG
+132 0x3000 //RX_BWE_UV_TH
+133 0x3000 //RX_BWE_UV_TH2
+134 0x1800 //RX_BWE_UV_TH3
+135 0x1000 //RX_BWE_V_TH
+136 0x04CD //RX_BWE_GAIN1_V_TH1
+137 0x0F33 //RX_BWE_GAIN1_V_TH2
+138 0x7333 //RX_BWE_UV_EQ
+139 0x199A //RX_BWE_V_EQ
+140 0x7333 //RX_BWE_TONE_TH
+141 0x0004 //RX_BWE_UV_HOLD_T
+142 0x6CCD //RX_BWE_GAIN2_ALPHA
+143 0x799A //RX_BWE_GAIN3_ALPHA
+144 0x001E //RX_BWE_CUTOFF
+145 0x3000 //RX_BWE_GAINFILL
+146 0x3200 //RX_BWE_MAXTH_TONE
+147 0x2000 //RX_BWE_EQ_0
+148 0x2000 //RX_BWE_EQ_1
+149 0x2000 //RX_BWE_EQ_2
+150 0x2000 //RX_BWE_EQ_3
+151 0x2000 //RX_BWE_EQ_4
+152 0x2000 //RX_BWE_EQ_5
+153 0x2000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0017 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0023 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0034 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x004D //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0073 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x00AC //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x4000 //RX_TDDRC_ALPHA_UP_1
+7 0x4000 //RX_TDDRC_ALPHA_UP_2
+8 0x4000 //RX_TDDRC_ALPHA_UP_3
+9 0x4000 //RX_TDDRC_ALPHA_UP_4
+27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1
+28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2
+29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3
+32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4
+33 0x7FFF //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0001 //RX_TDDRC_THRD_0
+113 0x0002 //RX_TDDRC_THRD_1
+114 0x1800 //RX_TDDRC_THRD_2
+115 0x1800 //RX_TDDRC_THRD_3
+116 0x6000 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x4000 //RX_TDDRC_ALPHA_UP_0
+119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x199A //RX_TDDRC_HMNC_GAIN
+122 0x0001 //RX_TDDRC_SMT_FLAG
+123 0x0CCD //RX_TDDRC_SMT_W
+124 0x0600 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4870 //RX_FDEQ_GAIN_6
+46 0x7070 //RX_FDEQ_GAIN_7
+47 0x7050 //RX_FDEQ_GAIN_8
+48 0x5050 //RX_FDEQ_GAIN_9
+49 0x5050 //RX_FDEQ_GAIN_10
+50 0x7070 //RX_FDEQ_GAIN_11
+51 0x7070 //RX_FDEQ_GAIN_12
+52 0x7070 //RX_FDEQ_GAIN_13
+53 0x7070 //RX_FDEQ_GAIN_14
+54 0x7070 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0202 //RX_FDEQ_BIN_0
+64 0x0203 //RX_FDEQ_BIN_1
+65 0x0304 //RX_FDEQ_BIN_2
+66 0x0405 //RX_FDEQ_BIN_3
+67 0x0607 //RX_FDEQ_BIN_4
+68 0x0809 //RX_FDEQ_BIN_5
+69 0x0A0B //RX_FDEQ_BIN_6
+70 0x0C0D //RX_FDEQ_BIN_7
+71 0x0E0F //RX_FDEQ_BIN_8
+72 0x1011 //RX_FDEQ_BIN_9
+73 0x1214 //RX_FDEQ_BIN_10
+74 0x1618 //RX_FDEQ_BIN_11
+75 0x1C1C //RX_FDEQ_BIN_12
+76 0x2020 //RX_FDEQ_BIN_13
+77 0x2020 //RX_FDEQ_BIN_14
+78 0x2011 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x4000 //RX_FDEQ_RESRV_0
+88 0x0320 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x2000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x2000 //RX_FDDRC_THRD_3_2
+101 0x5000 //RX_FDDRC_THRD_3_3
+102 0x4000 //RX_FDDRC_SLANT_0_0
+103 0x4000 //RX_FDDRC_SLANT_0_1
+104 0x4000 //RX_FDDRC_SLANT_0_2
+105 0x4000 //RX_FDDRC_SLANT_0_3
+106 0x7FFF //RX_FDDRC_SLANT_1_0
+107 0x7FFF //RX_FDDRC_SLANT_1_1
+108 0x7FFF //RX_FDDRC_SLANT_1_2
+109 0x7FFF //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0100 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x000D //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x053D //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0100 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7500 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x0200 //TX_MIN_EQ_RE_EST_0
+153 0x0200 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1800 //TX_MIN_EQ_RE_EST_7
+160 0x1800 //TX_MIN_EQ_RE_EST_8
+161 0x3000 //TX_MIN_EQ_RE_EST_9
+162 0x4000 //TX_MIN_EQ_RE_EST_10
+163 0x6000 //TX_MIN_EQ_RE_EST_11
+164 0x7FFF //TX_MIN_EQ_RE_EST_12
+165 0x2000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x2000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x157C //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x1000 //TX_ADPT_STRICT_L
+222 0x1000 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xF900 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0050 //TX_DELTA_THR_SN_EST_0
+251 0x01A0 //TX_DELTA_THR_SN_EST_1
+252 0x0200 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x7F00 //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0800 //TX_MAINREFRTO_TH_EQ
+279 0x1000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0012 //TX_NS_LVL_CTRL_1
+283 0x0017 //TX_NS_LVL_CTRL_2
+284 0x0015 //TX_NS_LVL_CTRL_3
+285 0x0012 //TX_NS_LVL_CTRL_4
+286 0x0012 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x000F //TX_MIN_GAIN_S_1
+291 0x000D //TX_MIN_GAIN_S_2
+292 0x000F //TX_MIN_GAIN_S_3
+293 0x000F //TX_MIN_GAIN_S_4
+294 0x000F //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x4000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x5000 //TX_A_POST_FILT_S_1
+316 0x5000 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x4000 //TX_A_POST_FILT_S_4
+319 0x3000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x1000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x1000 //TX_B_POST_FILT_3
+326 0x5000 //TX_B_POST_FILT_4
+327 0x3000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x6000 //TX_B_LESSCUT_RTO_S_1
+332 0x6000 //TX_B_LESSCUT_RTO_S_2
+333 0x6000 //TX_B_LESSCUT_RTO_S_3
+334 0x6000 //TX_B_LESSCUT_RTO_S_4
+335 0x6000 //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7D00 //TX_LAMBDA_PFILT_S_0
+340 0x7900 //TX_LAMBDA_PFILT_S_1
+341 0x7400 //TX_LAMBDA_PFILT_S_2
+342 0x7900 //TX_LAMBDA_PFILT_S_3
+343 0x7D00 //TX_LAMBDA_PFILT_S_4
+344 0x7D00 //TX_LAMBDA_PFILT_S_5
+345 0x7D00 //TX_LAMBDA_PFILT_S_6
+346 0x7D00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x0FA0 //TX_DT_BINVAD_ENDF
+358 0x0400 //TX_C_POST_FLT_DT
+359 0x4000 //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x03ED //TX_NOISE_TH_2
+372 0x2EE0 //TX_NOISE_TH_3
+373 0x55F0 //TX_NOISE_TH_4
+374 0x7FFF //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0FA0 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x1000 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x000A //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x007A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x5000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x7FFF //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0014 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x483C //TX_FDEQ_GAIN_3
+571 0x303C //TX_FDEQ_GAIN_4
+572 0x3048 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D08 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x7800 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E48 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C08 //TX_PREEQ_BIN_MIC1_2
+693 0x0700 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x7800 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0065 //TX_MIC_CALIBRATION_0
+766 0x0065 //TX_MIC_CALIBRATION_1
+767 0x0065 //TX_MIC_CALIBRATION_2
+768 0x0065 //TX_MIC_CALIBRATION_3
+769 0x0044 //TX_MIC_PWR_BIAS_0
+770 0x0044 //TX_MIC_PWR_BIAS_1
+771 0x0044 //TX_MIC_PWR_BIAS_2
+772 0x0044 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x4000 //TX_TDDRC_ALPHA_UP_01
+784 0x4000 //TX_TDDRC_ALPHA_UP_02
+785 0x4000 //TX_TDDRC_ALPHA_UP_03
+786 0x4000 //TX_TDDRC_ALPHA_UP_04
+787 0x6000 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0004 //TX_TDDRC_THRD_0
+855 0x0010 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x4000 //TX_TDDRC_ALPHA_UP_00
+861 0x6000 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0970 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0203 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x0000 //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F3C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0001 //TX_SAMPLINGFREQ_SIG
+7 0x0001 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0091 //TX_DIST2REF1
+22 0x000D //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3A66 //TX_DIST2REF_11
+73 0x053D //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0200 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0300 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x3000 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x4000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x5000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x03E8 //TX_DT_CUT_K
+214 0x0010 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x7FFF //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFB00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0018 //TX_NS_LVL_CTRL_3
+285 0x0016 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7C00 //TX_LAMBDA_PFILT_S_0
+340 0x7C00 //TX_LAMBDA_PFILT_S_1
+341 0x7C00 //TX_LAMBDA_PFILT_S_2
+342 0x7A00 //TX_LAMBDA_PFILT_S_3
+343 0x7C00 //TX_LAMBDA_PFILT_S_4
+344 0x7C00 //TX_LAMBDA_PFILT_S_5
+345 0x7C00 //TX_LAMBDA_PFILT_S_6
+346 0x7C00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0800 //TX_DT_BINVAD_TH_0
+354 0x0800 //TX_DT_BINVAD_TH_1
+355 0x0800 //TX_DT_BINVAD_TH_2
+356 0x0800 //TX_DT_BINVAD_TH_3
+357 0x1D4C //TX_DT_BINVAD_ENDF
+358 0x0800 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0032 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x017E //TX_NOISE_TH_1
+371 0x0230 //TX_NOISE_TH_2
+372 0x3492 //TX_NOISE_TH_3
+373 0x4E20 //TX_NOISE_TH_4
+374 0x55B8 //TX_NOISE_TH_5
+375 0x49E6 //TX_NOISE_TH_5_2
+376 0x0001 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0F0A //TX_NOISE_TH_6
+379 0x0033 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0033 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x01E0 //TX_NOR_OFF_THR
+498 0x7C00 //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x001C //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x0E0F //TX_FDEQ_BIN_10
+602 0x0F10 //TX_FDEQ_BIN_11
+603 0x1011 //TX_FDEQ_BIN_12
+604 0x1104 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2648 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C0C //TX_PREEQ_BIN_MIC1_2
+693 0x0C0F //TX_PREEQ_BIN_MIC1_3
+694 0x0F0F //TX_PREEQ_BIN_MIC1_4
+695 0x0F09 //TX_PREEQ_BIN_MIC1_5
+696 0x0909 //TX_PREEQ_BIN_MIC1_6
+697 0x0908 //TX_PREEQ_BIN_MIC1_7
+698 0x0700 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0062 //TX_MIC_CALIBRATION_0
+766 0x0062 //TX_MIC_CALIBRATION_1
+767 0x0062 //TX_MIC_CALIBRATION_2
+768 0x0062 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0046 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0002 //TX_TDDRC_THRD_1
+856 0x1800 //TX_TDDRC_THRD_2
+857 0x1800 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0B50 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0203 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x0000 //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x2F7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0003 //TX_SAMPLINGFREQ_SIG
+7 0x0003 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0093 //TX_DIST2REF1
+22 0x001A //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x1000 //TX_PGA_0
+28 0x1000 //TX_PGA_1
+29 0x1000 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7B02 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x5000 //TX_THR_PITCH_DET_0
+131 0x4800 //TX_THR_PITCH_DET_1
+132 0x4000 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0400 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7600 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x2000 //TX_MIN_EQ_RE_EST_0
+153 0x0600 //TX_MIN_EQ_RE_EST_1
+154 0x0200 //TX_MIN_EQ_RE_EST_2
+155 0x0200 //TX_MIN_EQ_RE_EST_3
+156 0x0200 //TX_MIN_EQ_RE_EST_4
+157 0x0200 //TX_MIN_EQ_RE_EST_5
+158 0x0200 //TX_MIN_EQ_RE_EST_6
+159 0x1000 //TX_MIN_EQ_RE_EST_7
+160 0x1000 //TX_MIN_EQ_RE_EST_8
+161 0x1000 //TX_MIN_EQ_RE_EST_9
+162 0x1000 //TX_MIN_EQ_RE_EST_10
+163 0x1000 //TX_MIN_EQ_RE_EST_11
+164 0x1000 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x3000 //TX_LAMBDA_CB_NLE
+167 0x7FFF //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x05DC //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7FF0 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x7E00 //TX_DTD_THR2_0
+205 0x7E00 //TX_DTD_THR2_1
+206 0x5000 //TX_DTD_THR2_2
+207 0x5000 //TX_DTD_THR2_3
+208 0x5000 //TX_DTD_THR2_4
+209 0x5000 //TX_DTD_THR2_5
+210 0x5000 //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x36B0 //TX_DT_CUT_K
+214 0x0100 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x1000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x7FFF //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFA00 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0100 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0000 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x0014 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7D00 //TX_LAMBDA_PFILT_S_0
+340 0x7D00 //TX_LAMBDA_PFILT_S_1
+341 0x7D00 //TX_LAMBDA_PFILT_S_2
+342 0x7D00 //TX_LAMBDA_PFILT_S_3
+343 0x7D00 //TX_LAMBDA_PFILT_S_4
+344 0x7D00 //TX_LAMBDA_PFILT_S_5
+345 0x7D00 //TX_LAMBDA_PFILT_S_6
+346 0x7D00 //TX_LAMBDA_PFILT_S_7
+347 0x0200 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0040 //TX_DT_BINVAD_TH_0
+354 0x0040 //TX_DT_BINVAD_TH_1
+355 0x0100 //TX_DT_BINVAD_TH_2
+356 0x0100 //TX_DT_BINVAD_TH_3
+357 0x36B0 //TX_DT_BINVAD_ENDF
+358 0x0200 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0140 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x01F4 //TX_NOISE_TH_2
+372 0x4E20 //TX_NOISE_TH_3
+373 0x2710 //TX_NOISE_TH_4
+374 0x2710 //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x0DAC //TX_NOISE_TH_6
+379 0x0050 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0001 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0050 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x4000 //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x0000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x4000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4850 //TX_FDEQ_GAIN_2
+570 0x5050 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x484A //TX_FDEQ_GAIN_5
+573 0x4E5E //TX_FDEQ_GAIN_6
+574 0x5850 //TX_FDEQ_GAIN_7
+575 0x5050 //TX_FDEQ_GAIN_8
+576 0x5050 //TX_FDEQ_GAIN_9
+577 0x5064 //TX_FDEQ_GAIN_10
+578 0x5C70 //TX_FDEQ_GAIN_11
+579 0x7088 //TX_FDEQ_GAIN_12
+580 0x8080 //TX_FDEQ_GAIN_13
+581 0x7474 //TX_FDEQ_GAIN_14
+582 0x8080 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0303 //TX_FDEQ_BIN_2
+594 0x0304 //TX_FDEQ_BIN_3
+595 0x0405 //TX_FDEQ_BIN_4
+596 0x0506 //TX_FDEQ_BIN_5
+597 0x0708 //TX_FDEQ_BIN_6
+598 0x090A //TX_FDEQ_BIN_7
+599 0x0B0C //TX_FDEQ_BIN_8
+600 0x0D0E //TX_FDEQ_BIN_9
+601 0x1013 //TX_FDEQ_BIN_10
+602 0x1719 //TX_FDEQ_BIN_11
+603 0x1B1E //TX_FDEQ_BIN_12
+604 0x1E1E //TX_FDEQ_BIN_13
+605 0x1E28 //TX_FDEQ_BIN_14
+606 0x282C //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0608 //TX_PREEQ_BIN_MIC0_0
+642 0x0808 //TX_PREEQ_BIN_MIC0_1
+643 0x0808 //TX_PREEQ_BIN_MIC0_2
+644 0x0808 //TX_PREEQ_BIN_MIC0_3
+645 0x0808 //TX_PREEQ_BIN_MIC0_4
+646 0x0808 //TX_PREEQ_BIN_MIC0_5
+647 0x0808 //TX_PREEQ_BIN_MIC0_6
+648 0x0808 //TX_PREEQ_BIN_MIC0_7
+649 0x0808 //TX_PREEQ_BIN_MIC0_8
+650 0x0808 //TX_PREEQ_BIN_MIC0_9
+651 0x0808 //TX_PREEQ_BIN_MIC0_10
+652 0x0808 //TX_PREEQ_BIN_MIC0_11
+653 0x0808 //TX_PREEQ_BIN_MIC0_12
+654 0x0808 //TX_PREEQ_BIN_MIC0_13
+655 0x0808 //TX_PREEQ_BIN_MIC0_14
+656 0xF200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2625 //TX_PREEQ_GAIN_MIC1_8
+675 0x2421 //TX_PREEQ_GAIN_MIC1_9
+676 0x1D19 //TX_PREEQ_GAIN_MIC1_10
+677 0x1820 //TX_PREEQ_GAIN_MIC1_11
+678 0x2830 //TX_PREEQ_GAIN_MIC1_12
+679 0x303C //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x251A //TX_PREEQ_BIN_MIC1_0
+691 0x0F0F //TX_PREEQ_BIN_MIC1_1
+692 0x0C0C //TX_PREEQ_BIN_MIC1_2
+693 0x0C0F //TX_PREEQ_BIN_MIC1_3
+694 0x0F0F //TX_PREEQ_BIN_MIC1_4
+695 0x0F09 //TX_PREEQ_BIN_MIC1_5
+696 0x0909 //TX_PREEQ_BIN_MIC1_6
+697 0x0908 //TX_PREEQ_BIN_MIC1_7
+698 0x070F //TX_PREEQ_BIN_MIC1_8
+699 0x1F08 //TX_PREEQ_BIN_MIC1_9
+700 0x0808 //TX_PREEQ_BIN_MIC1_10
+701 0x0920 //TX_PREEQ_BIN_MIC1_11
+702 0x2020 //TX_PREEQ_BIN_MIC1_12
+703 0x2021 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0608 //TX_PREEQ_BIN_MIC2_0
+740 0x0808 //TX_PREEQ_BIN_MIC2_1
+741 0x0808 //TX_PREEQ_BIN_MIC2_2
+742 0x0808 //TX_PREEQ_BIN_MIC2_3
+743 0x0808 //TX_PREEQ_BIN_MIC2_4
+744 0x0808 //TX_PREEQ_BIN_MIC2_5
+745 0x0808 //TX_PREEQ_BIN_MIC2_6
+746 0x0808 //TX_PREEQ_BIN_MIC2_7
+747 0x0808 //TX_PREEQ_BIN_MIC2_8
+748 0x0808 //TX_PREEQ_BIN_MIC2_9
+749 0x0808 //TX_PREEQ_BIN_MIC2_10
+750 0x0808 //TX_PREEQ_BIN_MIC2_11
+751 0x0808 //TX_PREEQ_BIN_MIC2_12
+752 0x0808 //TX_PREEQ_BIN_MIC2_13
+753 0x0808 //TX_PREEQ_BIN_MIC2_14
+754 0xF200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x0800 //TX_NND_WEIGHT
+765 0x0050 //TX_MIC_CALIBRATION_0
+766 0x0056 //TX_MIC_CALIBRATION_1
+767 0x0050 //TX_MIC_CALIBRATION_2
+768 0x0050 //TX_MIC_CALIBRATION_3
+769 0x0046 //TX_MIC_PWR_BIAS_0
+770 0x0042 //TX_MIC_PWR_BIAS_1
+771 0x0046 //TX_MIC_PWR_BIAS_2
+772 0x0046 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0800 //TX_TDDRC_ALPHA_UP_01
+784 0x0800 //TX_TDDRC_ALPHA_UP_02
+785 0x0800 //TX_TDDRC_ALPHA_UP_03
+786 0x0800 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0001 //TX_TDDRC_THRD_0
+855 0x0002 //TX_TDDRC_THRD_1
+856 0x1000 //TX_TDDRC_THRD_2
+857 0x1000 //TX_TDDRC_THRD_3
+858 0x6000 //TX_TDDRC_SLANT_0
+859 0x6000 //TX_TDDRC_SLANT_1
+860 0x0800 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0BE0 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x4000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0082 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x0000 //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0001 //TX_OPERATION_MODE_1
+2 0x0033 //TX_PATCH_REG
+3 0x4B7C //TX_SENDFUNC_MODE_0
+4 0x0001 //TX_SENDFUNC_MODE_1
+5 0x0003 //TX_NUM_MIC
+6 0x0004 //TX_SAMPLINGFREQ_SIG
+7 0x0004 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0093 //TX_DIST2REF1
+22 0x001A //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x0A19 //TX_PGA_0
+28 0x0A19 //TX_PGA_1
+29 0x0A19 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0001 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0002 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0002 //TX_MICS_OF_PAIR0
+38 0x0002 //TX_MICS_OF_PAIR1
+39 0x0002 //TX_MICS_OF_PAIR2
+40 0x0002 //TX_MICS_OF_PAIR3
+41 0x0002 //TX_MIC_DATA_SRC0
+42 0x0000 //TX_MIC_DATA_SRC1
+43 0x0001 //TX_MIC_DATA_SRC2
+44 0x0000 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x05DC //TX_HD_BIN_MASK
+53 0x0010 //TX_HD_SUBAND_MASK
+54 0x19A1 //TX_HD_FRAME_AVG_MASK
+55 0x0320 //TX_HD_MIN_FRQ
+56 0x1000 //TX_HD_ALPHA_PSD
+57 0x1100 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0xEE6C //TX_T_PSDVAT
+63 0x0800 //TX_CNT
+64 0x4000 //TX_ANTI_HOWL_GAIN
+65 0x0001 //TX_MICFORBFMARK_0
+66 0x0001 //TX_MICFORBFMARK_1
+67 0x0001 //TX_MICFORBFMARK_2
+68 0x0001 //TX_MICFORBFMARK_3
+69 0x0001 //TX_MICFORBFMARK_4
+70 0x0001 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x3B33 //TX_DIST2REF_11
+73 0x0A70 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x04D0 //TX_ADCS_GAIN
+112 0x4000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x0000 //TX_BLMIC_BLKFACTOR
+116 0x0000 //TX_BRMIC_BLKFACTOR
+117 0x0031 //TX_MICBLK_START_BIN
+118 0x0060 //TX_MICBLK_END_BIN
+119 0x0015 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0015 //TX_FENE_HOLD
+123 0x4000 //TX_FE_ENER_TH_MTS
+124 0x0004 //TX_FE_ENER_TH_EXP
+125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x6000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0010 //TX_MIC_BLOCK_N
+128 0x7E56 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x1800 //TX_THR_PITCH_DET_0
+131 0x1000 //TX_THR_PITCH_DET_1
+132 0x0800 //TX_THR_PITCH_DET_2
+133 0x0008 //TX_PITCH_BFR_LEN
+134 0x0003 //TX_SBD_PITCH_DET
+135 0x0050 //TX_TD_AEC_L
+136 0x4000 //TX_MU0_UNP_TD_AEC
+137 0x1000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x0300 //TX_AEC_REF_GAIN_0
+148 0x0800 //TX_AEC_REF_GAIN_1
+149 0x0800 //TX_AEC_REF_GAIN_2
+150 0x7A00 //TX_EAD_THR
+151 0x1000 //TX_THR_RE_EST
+152 0x0800 //TX_MIN_EQ_RE_EST_0
+153 0x2000 //TX_MIN_EQ_RE_EST_1
+154 0x2000 //TX_MIN_EQ_RE_EST_2
+155 0x4000 //TX_MIN_EQ_RE_EST_3
+156 0x4000 //TX_MIN_EQ_RE_EST_4
+157 0x7FFF //TX_MIN_EQ_RE_EST_5
+158 0x7FFF //TX_MIN_EQ_RE_EST_6
+159 0x7FFF //TX_MIN_EQ_RE_EST_7
+160 0x7FFF //TX_MIN_EQ_RE_EST_8
+161 0x7FFF //TX_MIN_EQ_RE_EST_9
+162 0x7FFF //TX_MIN_EQ_RE_EST_10
+163 0x7FFF //TX_MIN_EQ_RE_EST_11
+164 0x7FFF //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0CCD //TX_LAMBDA_CB_NLE
+167 0x2000 //TX_C_POST_FLT
+168 0x7FFF //TX_GAIN_NP
+169 0x0180 //TX_SE_HOLD_N
+170 0x00C8 //TX_DT_HOLD_N
+171 0x09C4 //TX_DT2_HOLD_N
+172 0x6666 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x7FFF //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0008 //TX_FRQ_LIN_LEN
+184 0x7FFF //TX_FRQ_AEC_LEN_RHO
+185 0x6000 //TX_MU0_UNP_FRQ_AEC
+186 0x4000 //TX_MU0_PTD_FRQ_AEC
+187 0x000A //TX_MINENOISETH
+188 0x0800 //TX_MU0_RE_EST
+189 0x0001 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x2000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7D00 //TX_DTD_THR1_0
+198 0x7FF0 //TX_DTD_THR1_1
+199 0x7FF0 //TX_DTD_THR1_2
+200 0x7FF0 //TX_DTD_THR1_3
+201 0x7FF0 //TX_DTD_THR1_4
+202 0x7FF0 //TX_DTD_THR1_5
+203 0x7FF0 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0DAC //TX_DT_CUT_K
+214 0x0020 //TX_DT_CUT_THR
+215 0x04EB //TX_COMFORT_G
+216 0x01F4 //TX_POWER_YOUT_TH
+217 0x4000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x7FFF //TX_DTD_MIC_BLK
+221 0x023E //TX_ADPT_STRICT_L
+222 0x023E //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x2000 //TX_B_POST_FILT_ECHO_L
+229 0x2000 //TX_B_POST_FILT_ECHO_H
+230 0x0200 //TX_MIN_G_CTRL_ECHO
+231 0x1000 //TX_B_LESSCUT_RTO_ECHO
+232 0x0063 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x7FFF //TX_MIN_EQ_RE_EST_13
+237 0x7FFF //TX_DTD_THR1_7
+238 0x7FFF //TX_DTD_THR2_7
+239 0x0800 //TX_DT_RESRV_7
+240 0x0800 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF800 //TX_THR_SN_EST_0
+243 0xFA00 //TX_THR_SN_EST_1
+244 0xFA00 //TX_THR_SN_EST_2
+245 0xFB00 //TX_THR_SN_EST_3
+246 0xFA00 //TX_THR_SN_EST_4
+247 0xFA00 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0200 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0200 //TX_DELTA_THR_SN_EST_3
+254 0x0100 //TX_DELTA_THR_SN_EST_4
+255 0x0100 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0400 //TX_N_SN_EST
+267 0x001E //TX_INBEAM_T
+268 0x0041 //TX_INBEAMHOLDT
+269 0x2000 //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x0400 //TX_NE_RTO_TH_L
+274 0x0800 //TX_MAINREFRTOH_TH_H
+275 0x0800 //TX_MAINREFRTOH_TH_L
+276 0x0800 //TX_MAINREFRTO_TH_H
+277 0x0800 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x2000 //TX_B_POST_FLT_0
+280 0x1000 //TX_B_POST_FLT_1
+281 0x0010 //TX_NS_LVL_CTRL_0
+282 0x0014 //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0018 //TX_NS_LVL_CTRL_3
+285 0x0016 //TX_NS_LVL_CTRL_4
+286 0x0014 //TX_NS_LVL_CTRL_5
+287 0x0011 //TX_NS_LVL_CTRL_6
+288 0x0011 //TX_NS_LVL_CTRL_7
+289 0x000F //TX_MIN_GAIN_S_0
+290 0x0010 //TX_MIN_GAIN_S_1
+291 0x0010 //TX_MIN_GAIN_S_2
+292 0x0010 //TX_MIN_GAIN_S_3
+293 0x0010 //TX_MIN_GAIN_S_4
+294 0x0010 //TX_MIN_GAIN_S_5
+295 0x0010 //TX_MIN_GAIN_S_6
+296 0x000F //TX_MIN_GAIN_S_7
+297 0x6000 //TX_NMOS_SUP
+298 0x0000 //TX_NS_MAX_PRI_SNR_TH
+299 0x0000 //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x4000 //TX_SNRI_SUP_1
+302 0x4000 //TX_SNRI_SUP_2
+303 0x4000 //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x50C0 //TX_SNRI_SUP_6
+307 0x7FFF //TX_SNRI_SUP_7
+308 0x7FFF //TX_THR_LFNS
+309 0x0018 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x000A //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x2000 //TX_A_POST_FILT_1
+314 0x5000 //TX_A_POST_FILT_S_0
+315 0x6000 //TX_A_POST_FILT_S_1
+316 0x4C00 //TX_A_POST_FILT_S_2
+317 0x4000 //TX_A_POST_FILT_S_3
+318 0x6000 //TX_A_POST_FILT_S_4
+319 0x4000 //TX_A_POST_FILT_S_5
+320 0x5000 //TX_A_POST_FILT_S_6
+321 0x7000 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x1000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x4000 //TX_B_POST_FILT_4
+327 0x4000 //TX_B_POST_FILT_5
+328 0x1000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x4000 //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x6000 //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7C00 //TX_LAMBDA_PFILT
+339 0x7C00 //TX_LAMBDA_PFILT_S_0
+340 0x7C00 //TX_LAMBDA_PFILT_S_1
+341 0x7C00 //TX_LAMBDA_PFILT_S_2
+342 0x7A00 //TX_LAMBDA_PFILT_S_3
+343 0x7C00 //TX_LAMBDA_PFILT_S_4
+344 0x7C00 //TX_LAMBDA_PFILT_S_5
+345 0x7C00 //TX_LAMBDA_PFILT_S_6
+346 0x7C00 //TX_LAMBDA_PFILT_S_7
+347 0x0000 //TX_K_PEPPER
+348 0x0800 //TX_A_PEPPER
+349 0x1EAA //TX_K_PEPPER_HF
+350 0x0600 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x0200 //TX_HMNC_BST_THR
+353 0x0200 //TX_DT_BINVAD_TH_0
+354 0x0200 //TX_DT_BINVAD_TH_1
+355 0x0200 //TX_DT_BINVAD_TH_2
+356 0x0200 //TX_DT_BINVAD_TH_3
+357 0x1F40 //TX_DT_BINVAD_ENDF
+358 0x0100 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0000 //TX_BF_SGRAD_FLG
+362 0x0005 //TX_BF_DVG_TH
+363 0x001E //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x0064 //TX_NDETCT
+367 0x0050 //TX_NOISE_TH_0
+368 0x7FFF //TX_NOISE_TH_0_2
+369 0x7FFF //TX_NOISE_TH_0_3
+370 0x07D0 //TX_NOISE_TH_1
+371 0x0DAC //TX_NOISE_TH_2
+372 0x4E20 //TX_NOISE_TH_3
+373 0x4E20 //TX_NOISE_TH_4
+374 0x59D8 //TX_NOISE_TH_5
+375 0x7FFF //TX_NOISE_TH_5_2
+376 0x0000 //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x2710 //TX_NOISE_TH_6
+379 0x0033 //TX_MINENOISE_TH
+380 0x4000 //TX_MINENOISE_MIC0_TH_MTS
+381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP
+382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x0666 //TX_OUT_ENER_S_TH_CLEAN
+385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x0333 //TX_OUT_ENER_S_TH_NOISY
+387 0x019A //TX_OUT_ENER_TH_NOISE
+388 0x0333 //TX_OUT_ENER_TH_SPEECH
+389 0x2000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0800 //TX_MU_ARSP_EST
+396 0x00C8 //TX_P_OUTBEAM_MIN_TH
+397 0x0002 //TX_EXTRA_NS_L
+398 0x0800 //TX_EXTRA_NS_A
+399 0x0005 //TX_VR_NOISE_FLOOR_TH
+400 0x0148 //TX_MIN_G_LOW300HZ
+401 0x0002 //TX_MAXLEVEL_CNG
+402 0x00B4 //TX_STN_NOISE_TH
+403 0x4000 //TX_POST_MASK_SUP
+404 0x7FFF //TX_POST_MASK_ADJUST
+405 0x00C8 //TX_NS_ENOISE_MIC0_TH
+406 0x0033 //TX_MINENOISE_MIC0_TH
+407 0x012C //TX_MINENOISE_MIC0_S_TH
+408 0x7FFF //TX_MIN_G_CTRL_SSNS
+409 0x0000 //TX_METAL_RTO_THR
+410 0x4848 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x1800 //TX_RHO_UPB
+415 0x0BB8 //TX_N_HOLD_HS
+416 0x0050 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0100 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0CCD //TX_THR_STD_NSR
+420 0x019A //TX_THR_STD_PLH
+421 0x2AF8 //TX_N_HOLD_STD
+422 0x0066 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB
+428 0x0000 //TX_WTA_EN_RTO_TH
+429 0x0000 //TX_TOP_ENER_TH_F
+430 0x0000 //TX_DESIRED_TALK_HOLDT
+431 0x0800 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0010 //TX_HS_VAD_BIN
+435 0x2666 //TX_THR_VAD_HS
+436 0x2CCD //TX_MEAN_RTO_MIN_TH2
+437 0x0032 //TX_SILENCE_T
+438 0x0000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x0000 //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x003C //TX_DOA_VAD_THR_1
+445 0x0000 //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x0000 //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x0000 //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x0000 //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0100 //TX_BF_HOLDOFF_T
+473 0x7FFF //TX_DOA_COST_FACTOR
+474 0x4000 //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x012C //TX_DOA_TRACK_HT
+477 0x0200 //TX_N1_HOLD_HF
+478 0x0100 //TX_N2_HOLD_HF
+479 0x3000 //TX_BF_RESET_THR_HF
+480 0x7333 //TX_DOA_SMOOTH
+481 0x0800 //TX_MU_BF
+482 0x0800 //TX_BF_MU_LF_B2
+483 0x0040 //TX_BF_FC_END_BIN_B2
+484 0x0020 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0007 //TX_N_DOA_SEED
+488 0x0001 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x038E //TX_DLT_SRC_DOA_RNG
+491 0x2000 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x7FFF //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x038E //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0230 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0000 //TX_ADAPT_LEN
+501 0x2000 //TX_MORE_SNS
+502 0x0000 //TX_NOR_OFF_TH1
+503 0x0000 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x7FFF //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x0000 //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x0000 //TX_MICTOBFGAIN0
+513 0x0000 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x1333 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0004 //TX_SNR_THR
+531 0x0010 //TX_ENGY_THR
+532 0x1770 //TX_CORR_HIGH_TH
+533 0x6000 //TX_ENGY_THR_2
+534 0x3400 //TX_MEAN_RTO_THR
+535 0x0028 //TX_WNS_ENOISE_MIC0_TH
+536 0x3000 //TX_RATIOMICL_TH
+537 0x64CD //TX_CALIG_HS
+538 0x0000 //TX_LVL_CTRL
+539 0x0014 //TX_WIND_SUPRTO
+540 0x000A //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x2800 //TX_RATIOMICH_TH
+543 0xD120 //TX_WIND_INBEAM_L_TH
+544 0x0FA0 //TX_WIND_INBEAM_H_TH
+545 0x2000 //TX_WNS_RESRV_0
+546 0x59D8 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0070 //TX_BF_LESSCUT_BBIN
+554 0x0070 //TX_BF_LESSCUT_EBIN
+555 0x0010 //TX_POSTBFB0
+556 0x0070 //TX_POSTBFB
+557 0x00B0 //TX_POSTBFE
+558 0x0E66 //TX_SPEECH_SNR_TH
+559 0x0050 //TX_PB_MAX_PRI_SNR_TH
+560 0x770A //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x5B5B //TX_FDEQ_GAIN_10
+578 0x7373 //TX_FDEQ_GAIN_11
+579 0x739A //TX_FDEQ_GAIN_12
+580 0x9AC4 //TX_FDEQ_GAIN_13
+581 0xC4C4 //TX_FDEQ_GAIN_14
+582 0xC4C4 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0202 //TX_FDEQ_BIN_0
+592 0x0203 //TX_FDEQ_BIN_1
+593 0x0304 //TX_FDEQ_BIN_2
+594 0x0405 //TX_FDEQ_BIN_3
+595 0x0607 //TX_FDEQ_BIN_4
+596 0x0809 //TX_FDEQ_BIN_5
+597 0x0A0B //TX_FDEQ_BIN_6
+598 0x0C0D //TX_FDEQ_BIN_7
+599 0x0E0F //TX_FDEQ_BIN_8
+600 0x1011 //TX_FDEQ_BIN_9
+601 0x1214 //TX_FDEQ_BIN_10
+602 0x1618 //TX_FDEQ_BIN_11
+603 0x1C1C //TX_FDEQ_BIN_12
+604 0x2020 //TX_FDEQ_BIN_13
+605 0x2020 //TX_FDEQ_BIN_14
+606 0x2011 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0E10 //TX_PREEQ_BIN_MIC0_0
+642 0x1010 //TX_PREEQ_BIN_MIC0_1
+643 0x1010 //TX_PREEQ_BIN_MIC0_2
+644 0x1010 //TX_PREEQ_BIN_MIC0_3
+645 0x1010 //TX_PREEQ_BIN_MIC0_4
+646 0x1010 //TX_PREEQ_BIN_MIC0_5
+647 0x1010 //TX_PREEQ_BIN_MIC0_6
+648 0x1010 //TX_PREEQ_BIN_MIC0_7
+649 0x1010 //TX_PREEQ_BIN_MIC0_8
+650 0x1010 //TX_PREEQ_BIN_MIC0_9
+651 0x1010 //TX_PREEQ_BIN_MIC0_10
+652 0x1010 //TX_PREEQ_BIN_MIC0_11
+653 0x1010 //TX_PREEQ_BIN_MIC0_12
+654 0x1010 //TX_PREEQ_BIN_MIC0_13
+655 0x1010 //TX_PREEQ_BIN_MIC0_14
+656 0x0200 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0030 //TX_PREEQ_SUBNUM_MIC1
+666 0x4846 //TX_PREEQ_GAIN_MIC1_0
+667 0x4544 //TX_PREEQ_GAIN_MIC1_1
+668 0x4240 //TX_PREEQ_GAIN_MIC1_2
+669 0x3E3C //TX_PREEQ_GAIN_MIC1_3
+670 0x3A38 //TX_PREEQ_GAIN_MIC1_4
+671 0x3635 //TX_PREEQ_GAIN_MIC1_5
+672 0x3330 //TX_PREEQ_GAIN_MIC1_6
+673 0x2E2A //TX_PREEQ_GAIN_MIC1_7
+674 0x2625 //TX_PREEQ_GAIN_MIC1_8
+675 0x2421 //TX_PREEQ_GAIN_MIC1_9
+676 0x1D19 //TX_PREEQ_GAIN_MIC1_10
+677 0x1820 //TX_PREEQ_GAIN_MIC1_11
+678 0x2830 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x1812 //TX_PREEQ_BIN_MIC1_0
+691 0x0A0A //TX_PREEQ_BIN_MIC1_1
+692 0x0808 //TX_PREEQ_BIN_MIC1_2
+693 0x080A //TX_PREEQ_BIN_MIC1_3
+694 0x0B09 //TX_PREEQ_BIN_MIC1_4
+695 0x0A06 //TX_PREEQ_BIN_MIC1_5
+696 0x0606 //TX_PREEQ_BIN_MIC1_6
+697 0x0605 //TX_PREEQ_BIN_MIC1_7
+698 0x050A //TX_PREEQ_BIN_MIC1_8
+699 0x1505 //TX_PREEQ_BIN_MIC1_9
+700 0x0506 //TX_PREEQ_BIN_MIC1_10
+701 0x0615 //TX_PREEQ_BIN_MIC1_11
+702 0x1516 //TX_PREEQ_BIN_MIC1_12
+703 0x2021 //TX_PREEQ_BIN_MIC1_13
+704 0x2021 //TX_PREEQ_BIN_MIC1_14
+705 0x2021 //TX_PREEQ_BIN_MIC1_15
+706 0x0800 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0E10 //TX_PREEQ_BIN_MIC2_0
+740 0x1010 //TX_PREEQ_BIN_MIC2_1
+741 0x1010 //TX_PREEQ_BIN_MIC2_2
+742 0x1010 //TX_PREEQ_BIN_MIC2_3
+743 0x1010 //TX_PREEQ_BIN_MIC2_4
+744 0x1010 //TX_PREEQ_BIN_MIC2_5
+745 0x1010 //TX_PREEQ_BIN_MIC2_6
+746 0x1010 //TX_PREEQ_BIN_MIC2_7
+747 0x1010 //TX_PREEQ_BIN_MIC2_8
+748 0x1010 //TX_PREEQ_BIN_MIC2_9
+749 0x1010 //TX_PREEQ_BIN_MIC2_10
+750 0x1010 //TX_PREEQ_BIN_MIC2_11
+751 0x1010 //TX_PREEQ_BIN_MIC2_12
+752 0x1010 //TX_PREEQ_BIN_MIC2_13
+753 0x1010 //TX_PREEQ_BIN_MIC2_14
+754 0x0200 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0060 //TX_MIC_CALIBRATION_0
+766 0x0060 //TX_MIC_CALIBRATION_1
+767 0x0070 //TX_MIC_CALIBRATION_2
+768 0x0070 //TX_MIC_CALIBRATION_3
+769 0x0050 //TX_MIC_PWR_BIAS_0
+770 0x0040 //TX_MIC_PWR_BIAS_1
+771 0x0040 //TX_MIC_PWR_BIAS_2
+772 0x0040 //TX_MIC_PWR_BIAS_3
+773 0x0009 //TX_GAIN_LIMIT_0
+774 0x000F //TX_GAIN_LIMIT_1
+775 0x000F //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP
+783 0x0C00 //TX_TDDRC_ALPHA_UP_01
+784 0x0C00 //TX_TDDRC_ALPHA_UP_02
+785 0x0C00 //TX_TDDRC_ALPHA_UP_03
+786 0x0C00 //TX_TDDRC_ALPHA_UP_04
+787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01
+788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02
+789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03
+790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04
+791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0010 //TX_DEADMIC_SILENCE_TH
+817 0x0600 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x7FFF //TX_KS_NOISEPASTE_FACTOR
+824 0x0001 //TX_KS_CONFIG
+825 0x7FFF //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x4848 //TX_FFP_FP_K_METAL
+834 0x4000 //TX_A_POST_FLT_FP
+835 0x0F5C //TX_RTO_OUTBEAM_TH
+836 0x4CCD //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0096 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0100 //TX_FFP_RESRV_2
+849 0x0020 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0004 //TX_FILTINDX
+854 0x0004 //TX_TDDRC_THRD_0
+855 0x0016 //TX_TDDRC_THRD_1
+856 0x1900 //TX_TDDRC_THRD_2
+857 0x1900 //TX_TDDRC_THRD_3
+858 0x3000 //TX_TDDRC_SLANT_0
+859 0x7B00 //TX_TDDRC_SLANT_1
+860 0x0C00 //TX_TDDRC_ALPHA_UP_00
+861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x199A //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0CCD //TX_TDDRC_SMT_W
+866 0x0CE6 //TX_TDDRC_DRC_GAIN
+867 0x7FFF //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x0000 //TX_TFMASKLTH
+870 0x0000 //TX_TFMASKLTHL
+871 0x0CCD //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0xECCD //TX_TFMASKTH_BLESSCUT
+876 0x1000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x7333 //TX_FASTNS_OUTIN_TH
+884 0x0CCD //TX_FASTNS_TFMASK_TH
+885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1
+886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2
+887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3
+888 0x0028 //TX_FASTNS_ARSPC_TH
+889 0xC000 //TX_FASTNS_MASK5_TH
+890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK
+891 0x1000 //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0082 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x0000 //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-NB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x01B1 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0000 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0000 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF200 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x000C //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x199A //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x1000 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x6666 //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x0000 //TX_MINENOISE_MIC0_TH_MTS
+381 0x0000 //TX_MINENOISE_MIC0_TH_EXP
+382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0000 //TX_MU_ARSP_EST
+396 0x0000 //TX_P_OUTBEAM_MIN_TH
+397 0x0000 //TX_EXTRA_NS_L
+398 0x0000 //TX_EXTRA_NS_A
+399 0x0000 //TX_VR_NOISE_FLOOR_TH
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0000 //TX_BF_LESSCUT_BBIN
+554 0x0000 //TX_BF_LESSCUT_EBIN
+555 0x0000 //TX_POSTBFB0
+556 0x0000 //TX_POSTBFB
+557 0x0000 //TX_POSTBFE
+558 0x0000 //TX_SPEECH_SNR_TH
+559 0x0000 //TX_PB_MAX_PRI_SNR_TH
+560 0x0000 //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xD99A //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0203 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x0000 //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-WB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x01B1 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0000 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0000 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF200 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x000C //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x199A //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x1000 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x6666 //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x0000 //TX_MINENOISE_MIC0_TH_MTS
+381 0x0000 //TX_MINENOISE_MIC0_TH_EXP
+382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0000 //TX_MU_ARSP_EST
+396 0x0000 //TX_P_OUTBEAM_MIN_TH
+397 0x0000 //TX_EXTRA_NS_L
+398 0x0000 //TX_EXTRA_NS_A
+399 0x0000 //TX_VR_NOISE_FLOOR_TH
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0000 //TX_BF_LESSCUT_BBIN
+554 0x0000 //TX_BF_LESSCUT_EBIN
+555 0x0000 //TX_POSTBFB0
+556 0x0000 //TX_POSTBFB
+557 0x0000 //TX_POSTBFE
+558 0x0000 //TX_SPEECH_SNR_TH
+559 0x0000 //TX_PB_MAX_PRI_SNR_TH
+560 0x0000 //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xD99A //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0203 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x0000 //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-SWB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x01B1 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0000 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0000 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF200 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x000C //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x199A //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x1000 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x6666 //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x0000 //TX_MINENOISE_MIC0_TH_MTS
+381 0x0000 //TX_MINENOISE_MIC0_TH_EXP
+382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0000 //TX_MU_ARSP_EST
+396 0x0000 //TX_P_OUTBEAM_MIN_TH
+397 0x0000 //TX_EXTRA_NS_L
+398 0x0000 //TX_EXTRA_NS_A
+399 0x0000 //TX_VR_NOISE_FLOOR_TH
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0000 //TX_BF_LESSCUT_BBIN
+554 0x0000 //TX_BF_LESSCUT_EBIN
+555 0x0000 //TX_POSTBFB0
+556 0x0000 //TX_POSTBFB
+557 0x0000 //TX_POSTBFE
+558 0x0000 //TX_SPEECH_SNR_TH
+559 0x0000 //TX_PB_MAX_PRI_SNR_TH
+560 0x0000 //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xD99A //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0082 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x0000 //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
+#CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0 0x0001 //TX_OPERATION_MODE_0
+1 0x0000 //TX_OPERATION_MODE_1
+2 0x0000 //TX_PATCH_REG
+3 0x0200 //TX_SENDFUNC_MODE_0
+4 0x0000 //TX_SENDFUNC_MODE_1
+5 0x0001 //TX_NUM_MIC
+6 0x0000 //TX_SAMPLINGFREQ_SIG
+7 0x0000 //TX_SAMPLINGFREQ_PROC
+8 0x000A //TX_FRAME_SZ_SIG
+9 0x000A //TX_FRAME_SZ
+10 0x0000 //TX_DELAY_OPT
+11 0x0028 //TX_MAX_TAIL_LENGTH
+12 0x0001 //TX_NUM_LOUTCHN
+13 0x0001 //TX_MAXNUM_AECREF
+14 0x0000 //TX_DBG_FUNC_REG
+15 0x0000 //TX_DBG_FUNC_REG1
+16 0x0000 //TX_SYS_RESRV_0
+17 0x0000 //TX_SYS_RESRV_1
+18 0x0000 //TX_SYS_RESRV_2
+19 0x0000 //TX_SYS_RESRV_3
+20 0x0000 //TX_DIST2REF0
+21 0x0078 //TX_DIST2REF1
+22 0x0000 //TX_DIST2REF_02
+23 0x0000 //TX_DIST2REF_03
+24 0x0000 //TX_DIST2REF_04
+25 0x0000 //TX_DIST2REF_05
+26 0x0000 //TX_MMIC
+27 0x01B1 //TX_PGA_0
+28 0x0800 //TX_PGA_1
+29 0x0800 //TX_PGA_2
+30 0x0000 //TX_PGA_3
+31 0x0000 //TX_PGA_4
+32 0x0000 //TX_PGA_5
+33 0x0000 //TX_MIC_PAIRS
+34 0x0000 //TX_MIC_PAIRS_HS
+35 0x0000 //TX_MICS_FOR_BF
+36 0x0000 //TX_MIC_PAIRS_FORL1
+37 0x0000 //TX_MICS_OF_PAIR0
+38 0x0000 //TX_MICS_OF_PAIR1
+39 0x0000 //TX_MICS_OF_PAIR2
+40 0x0000 //TX_MICS_OF_PAIR3
+41 0x0000 //TX_MIC_DATA_SRC0
+42 0x0001 //TX_MIC_DATA_SRC1
+43 0x0002 //TX_MIC_DATA_SRC2
+44 0x0003 //TX_MIC_DATA_SRC3
+45 0x0000 //TX_MIC_PAIR_CH_04
+46 0x0000 //TX_MIC_PAIR_CH_05
+47 0x0000 //TX_MIC_PAIR_CH_10
+48 0x0000 //TX_MIC_PAIR_CH_11
+49 0x0000 //TX_MIC_PAIR_CH_12
+50 0x0000 //TX_MIC_PAIR_CH_13
+51 0x0000 //TX_MIC_PAIR_CH_14
+52 0x0000 //TX_HD_BIN_MASK
+53 0x0000 //TX_HD_SUBAND_MASK
+54 0x0000 //TX_HD_FRAME_AVG_MASK
+55 0x0000 //TX_HD_MIN_FRQ
+56 0x0000 //TX_HD_ALPHA_PSD
+57 0x0000 //TX_T_PHPR1
+58 0x0000 //TX_T_PHPR2
+59 0x0000 //TX_T_PTPR
+60 0x0000 //TX_T_PNPR
+61 0x0000 //TX_T_PAPR1
+62 0x0000 //TX_T_PSDVAT
+63 0x0000 //TX_CNT
+64 0x0000 //TX_ANTI_HOWL_GAIN
+65 0x0000 //TX_MICFORBFMARK_0
+66 0x0000 //TX_MICFORBFMARK_1
+67 0x0000 //TX_MICFORBFMARK_2
+68 0x0000 //TX_MICFORBFMARK_3
+69 0x0000 //TX_MICFORBFMARK_4
+70 0x0000 //TX_MICFORBFMARK_5
+71 0x0000 //TX_DIST2REF_10
+72 0x0000 //TX_DIST2REF_11
+73 0x0000 //TX_DIST2REF2
+74 0x0000 //TX_DIST2REF_13
+75 0x0000 //TX_DIST2REF_14
+76 0x0000 //TX_DIST2REF_15
+77 0x0000 //TX_DIST2REF_20
+78 0x0000 //TX_DIST2REF_21
+79 0x0000 //TX_DIST2REF_22
+80 0x0000 //TX_DIST2REF_23
+81 0x0000 //TX_DIST2REF_24
+82 0x0000 //TX_DIST2REF_25
+83 0x0000 //TX_DIST2REF_30
+84 0x0000 //TX_DIST2REF_31
+85 0x0000 //TX_DIST2REF_32
+86 0x0000 //TX_DIST2REF_33
+87 0x0000 //TX_DIST2REF_34
+88 0x0000 //TX_DIST2REF_35
+89 0x0000 //TX_MIC_LOC_00
+90 0x0000 //TX_MIC_LOC_01
+91 0x0000 //TX_MIC_LOC_02
+92 0x0000 //TX_MIC_LOC_03
+93 0x0000 //TX_MIC_LOC_04
+94 0x0000 //TX_MIC_LOC_05
+95 0x0000 //TX_MIC_LOC_10
+96 0x0000 //TX_MIC_LOC_11
+97 0x0000 //TX_MIC_LOC_12
+98 0x0000 //TX_MIC_LOC_13
+99 0x0000 //TX_MIC_LOC_14
+100 0x0000 //TX_MIC_LOC_15
+101 0x0000 //TX_MIC_LOC_20
+102 0x0000 //TX_MIC_LOC_21
+103 0x0000 //TX_MIC_LOC_22
+104 0x0000 //TX_MIC_LOC_23
+105 0x0000 //TX_MIC_LOC_24
+106 0x0000 //TX_MIC_LOC_25
+107 0x0800 //TX_MIC_REFBLK_VOLUME
+108 0x0800 //TX_MIC_BLOCK_VOLUME
+109 0x0000 //TX_INVERSE_MASK
+110 0x0000 //TX_ADCS_MASK
+111 0x0000 //TX_ADCS_GAIN
+112 0x0000 //TX_NFC_GAINFAC
+113 0x0000 //TX_MAINMIC_BLKFACTOR
+114 0x0000 //TX_REFMIC_BLKFACTOR
+115 0x7FFF //TX_BLMIC_BLKFACTOR
+116 0x7FFF //TX_BRMIC_BLKFACTOR
+117 0x000A //TX_MICBLK_START_BIN
+118 0x0041 //TX_MICBLK_END_BIN
+119 0x0000 //TX_MICBLK_FE_HOLD
+120 0xFFF2 //TX_MICBLK_MR_EXP_TH
+121 0xFFF2 //TX_MICBLK_LR_EXP_TH
+122 0x0000 //TX_FENE_HOLD
+123 0x0000 //TX_FE_ENER_TH_MTS
+124 0x0000 //TX_FE_ENER_TH_EXP
+125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK
+126 0x0000 //TX_C_POST_FLT_MIC_REFBLK
+127 0x0020 //TX_MIC_BLOCK_N
+128 0x7652 //TX_A_HP
+129 0x4000 //TX_B_PE
+130 0x7800 //TX_THR_PITCH_DET_0
+131 0x7000 //TX_THR_PITCH_DET_1
+132 0x6000 //TX_THR_PITCH_DET_2
+133 0x0000 //TX_PITCH_BFR_LEN
+134 0x0000 //TX_SBD_PITCH_DET
+135 0x0000 //TX_TD_AEC_L
+136 0x0000 //TX_MU0_UNP_TD_AEC
+137 0x0000 //TX_MU0_PTD_TD_AEC
+138 0x0000 //TX_PP_RESRV_0
+139 0x2A94 //TX_PP_RESRV_1
+140 0x55F0 //TX_PP_RESRV_2
+141 0x0000 //TX_PP_RESRV_3
+142 0x0000 //TX_PP_RESRV_4
+143 0x0000 //TX_PP_RESRV_5
+144 0x0000 //TX_PP_RESRV_6
+145 0x0000 //TX_PP_RESRV_7
+146 0x0028 //TX_TAIL_LENGTH
+147 0x2000 //TX_AEC_REF_GAIN_0
+148 0x2000 //TX_AEC_REF_GAIN_1
+149 0x2000 //TX_AEC_REF_GAIN_2
+150 0x4000 //TX_EAD_THR
+151 0x0200 //TX_THR_RE_EST
+152 0x0100 //TX_MIN_EQ_RE_EST_0
+153 0x0100 //TX_MIN_EQ_RE_EST_1
+154 0x0100 //TX_MIN_EQ_RE_EST_2
+155 0x0100 //TX_MIN_EQ_RE_EST_3
+156 0x0100 //TX_MIN_EQ_RE_EST_4
+157 0x0100 //TX_MIN_EQ_RE_EST_5
+158 0x0100 //TX_MIN_EQ_RE_EST_6
+159 0x0100 //TX_MIN_EQ_RE_EST_7
+160 0x0100 //TX_MIN_EQ_RE_EST_8
+161 0x0100 //TX_MIN_EQ_RE_EST_9
+162 0x0100 //TX_MIN_EQ_RE_EST_10
+163 0x0100 //TX_MIN_EQ_RE_EST_11
+164 0x0100 //TX_MIN_EQ_RE_EST_12
+165 0x4000 //TX_LAMBDA_RE_EST
+166 0x0000 //TX_LAMBDA_CB_NLE
+167 0x0000 //TX_C_POST_FLT
+168 0x4000 //TX_GAIN_NP
+169 0x0008 //TX_SE_HOLD_N
+170 0x0050 //TX_DT_HOLD_N
+171 0x03E8 //TX_DT2_HOLD_N
+172 0x0000 //TX_AEC_RESRV_0
+173 0x0000 //TX_AEC_RESRV_1
+174 0x0014 //TX_AEC_RESRV_2
+175 0x0000 //TX_MIC_DELAY_LENGTH
+176 0x0000 //TX_REF_DELAY_LENGTH
+177 0x0000 //TX_ADD_LINEIN_GAINL
+178 0x0000 //TX_ADD_LINEIN_GAINH
+179 0x0000 //TX_MIN_EQ_RE_EST_14
+180 0x0000 //TX_DTD_THR1_8
+181 0x0000 //TX_DTD_THR2_8
+182 0x0000 //TX_DTD_MIC_BLK2
+183 0x0000 //TX_FRQ_LIN_LEN
+184 0x0000 //TX_FRQ_AEC_LEN_RHO
+185 0x0000 //TX_MU0_UNP_FRQ_AEC
+186 0x0000 //TX_MU0_PTD_FRQ_AEC
+187 0x0000 //TX_MINENOISETH
+188 0x0000 //TX_MU0_RE_EST
+189 0x0000 //TX_AEC_NUM_CH
+190 0x0000 //TX_BIGECHOATTENUATION_MAX
+191 0x0000 //TX_A_POST_FLT_MICBLK
+192 0x0000 //TX_BLKENERTH
+193 0x0000 //TX_BLKENERHIGHTH
+194 0x0000 //TX_NORMENERTH
+195 0x0000 //TX_NORMENERHIGHTH
+196 0x0000 //TX_NORMENERHIGHTHL
+197 0x7333 //TX_DTD_THR1_0
+198 0x7333 //TX_DTD_THR1_1
+199 0x7333 //TX_DTD_THR1_2
+200 0x7333 //TX_DTD_THR1_3
+201 0x7333 //TX_DTD_THR1_4
+202 0x7333 //TX_DTD_THR1_5
+203 0x7333 //TX_DTD_THR1_6
+204 0x0CCD //TX_DTD_THR2_0
+205 0x0CCD //TX_DTD_THR2_1
+206 0x0CCD //TX_DTD_THR2_2
+207 0x0CCD //TX_DTD_THR2_3
+208 0x0CCD //TX_DTD_THR2_4
+209 0x0CCD //TX_DTD_THR2_5
+210 0x0CCD //TX_DTD_THR2_6
+211 0x7FFF //TX_DTD_THR3
+212 0x0000 //TX_SPK_CUT_K
+213 0x0400 //TX_DT_CUT_K
+214 0x0000 //TX_DT_CUT_THR
+215 0x0000 //TX_COMFORT_G
+216 0x0000 //TX_POWER_YOUT_TH
+217 0x0000 //TX_FDPFGAINECHO
+218 0x0000 //TX_DTD_HD_THR
+219 0x0000 //TX_SPK_CUT_K_S
+220 0x0000 //TX_DTD_MIC_BLK
+221 0x0400 //TX_ADPT_STRICT_L
+222 0x0200 //TX_ADPT_STRICT_H
+223 0x0BB8 //TX_RATIO_DT_L_TH_LOW
+224 0x3A98 //TX_RATIO_DT_H_TH_LOW
+225 0x1770 //TX_RATIO_DT_L_TH_HIGH
+226 0x4E20 //TX_RATIO_DT_H_TH_HIGH
+227 0x09C4 //TX_RATIO_DT_L0_TH
+228 0x0800 //TX_B_POST_FILT_ECHO_L
+229 0x0800 //TX_B_POST_FILT_ECHO_H
+230 0x0000 //TX_MIN_G_CTRL_ECHO
+231 0x7FFF //TX_B_LESSCUT_RTO_ECHO
+232 0x0000 //TX_EPD_OFFSET_00
+233 0x0000 //TX_EPD_OFFST_01
+234 0x1388 //TX_RATIO_DT_L0_TH_HIGH
+235 0x3A98 //TX_RATIO_DT_H_TH_CUT
+236 0x0000 //TX_MIN_EQ_RE_EST_13
+237 0x0000 //TX_DTD_THR1_7
+238 0x0000 //TX_DTD_THR2_7
+239 0x0000 //TX_DT_RESRV_7
+240 0x0000 //TX_DT_RESRV_8
+241 0x0000 //TX_DT_RESRV_9
+242 0xF200 //TX_THR_SN_EST_0
+243 0xF400 //TX_THR_SN_EST_1
+244 0xF800 //TX_THR_SN_EST_2
+245 0xF600 //TX_THR_SN_EST_3
+246 0xF800 //TX_THR_SN_EST_4
+247 0xF800 //TX_THR_SN_EST_5
+248 0xF800 //TX_THR_SN_EST_6
+249 0xF800 //TX_THR_SN_EST_7
+250 0x0100 //TX_DELTA_THR_SN_EST_0
+251 0x0000 //TX_DELTA_THR_SN_EST_1
+252 0x0100 //TX_DELTA_THR_SN_EST_2
+253 0x0100 //TX_DELTA_THR_SN_EST_3
+254 0x0200 //TX_DELTA_THR_SN_EST_4
+255 0x0200 //TX_DELTA_THR_SN_EST_5
+256 0x0200 //TX_DELTA_THR_SN_EST_6
+257 0x0200 //TX_DELTA_THR_SN_EST_7
+258 0x4000 //TX_LAMBDA_NN_EST_0
+259 0x4000 //TX_LAMBDA_NN_EST_1
+260 0x4000 //TX_LAMBDA_NN_EST_2
+261 0x4000 //TX_LAMBDA_NN_EST_3
+262 0x4000 //TX_LAMBDA_NN_EST_4
+263 0x4000 //TX_LAMBDA_NN_EST_5
+264 0x4000 //TX_LAMBDA_NN_EST_6
+265 0x4000 //TX_LAMBDA_NN_EST_7
+266 0x0A00 //TX_N_SN_EST
+267 0x0000 //TX_INBEAM_T
+268 0x0000 //TX_INBEAMHOLDT
+269 0x1FFF //TX_G_STRICT
+270 0x2000 //TX_EQ_THR_BF
+271 0x799A //TX_LAMBDA_EQ_BF
+272 0x1000 //TX_NE_RTO_TH
+273 0x1000 //TX_NE_RTO_TH_L
+274 0x1000 //TX_MAINREFRTOH_TH_H
+275 0x1000 //TX_MAINREFRTOH_TH_L
+276 0x2000 //TX_MAINREFRTO_TH_H
+277 0x1400 //TX_MAINREFRTO_TH_L
+278 0x0200 //TX_MAINREFRTO_TH_EQ
+279 0x0000 //TX_B_POST_FLT_0
+280 0x0000 //TX_B_POST_FLT_1
+281 0x001A //TX_NS_LVL_CTRL_0
+282 0x001A //TX_NS_LVL_CTRL_1
+283 0x0014 //TX_NS_LVL_CTRL_2
+284 0x0014 //TX_NS_LVL_CTRL_3
+285 0x000C //TX_NS_LVL_CTRL_4
+286 0x000C //TX_NS_LVL_CTRL_5
+287 0x000C //TX_NS_LVL_CTRL_6
+288 0x000C //TX_NS_LVL_CTRL_7
+289 0x000E //TX_MIN_GAIN_S_0
+290 0x0014 //TX_MIN_GAIN_S_1
+291 0x0014 //TX_MIN_GAIN_S_2
+292 0x0014 //TX_MIN_GAIN_S_3
+293 0x0014 //TX_MIN_GAIN_S_4
+294 0x0014 //TX_MIN_GAIN_S_5
+295 0x0014 //TX_MIN_GAIN_S_6
+296 0x0014 //TX_MIN_GAIN_S_7
+297 0x0000 //TX_NMOS_SUP
+298 0x0064 //TX_NS_MAX_PRI_SNR_TH
+299 0x7FFF //TX_NMOS_SUP_MENSA
+300 0x7FFF //TX_SNRI_SUP_0
+301 0x7FFF //TX_SNRI_SUP_1
+302 0x7FFF //TX_SNRI_SUP_2
+303 0x7FFF //TX_SNRI_SUP_3
+304 0x4000 //TX_SNRI_SUP_4
+305 0x4000 //TX_SNRI_SUP_5
+306 0x4000 //TX_SNRI_SUP_6
+307 0x4000 //TX_SNRI_SUP_7
+308 0x1200 //TX_THR_LFNS
+309 0x0147 //TX_G_LFNS
+310 0x09C4 //TX_GAIN0_NTH
+311 0x7FFF //TX_MUSIC_MORENS
+312 0x7FFF //TX_A_POST_FILT_0
+313 0x7FFF //TX_A_POST_FILT_1
+314 0x4000 //TX_A_POST_FILT_S_0
+315 0x199A //TX_A_POST_FILT_S_1
+316 0x1000 //TX_A_POST_FILT_S_2
+317 0x1000 //TX_A_POST_FILT_S_3
+318 0x6666 //TX_A_POST_FILT_S_4
+319 0x6666 //TX_A_POST_FILT_S_5
+320 0x6666 //TX_A_POST_FILT_S_6
+321 0x6666 //TX_A_POST_FILT_S_7
+322 0x2000 //TX_B_POST_FILT_0
+323 0x2000 //TX_B_POST_FILT_1
+324 0x2000 //TX_B_POST_FILT_2
+325 0x2000 //TX_B_POST_FILT_3
+326 0x2000 //TX_B_POST_FILT_4
+327 0x2000 //TX_B_POST_FILT_5
+328 0x2000 //TX_B_POST_FILT_6
+329 0x2000 //TX_B_POST_FILT_7
+330 0x7FFF //TX_B_LESSCUT_RTO_S_0
+331 0x7FFF //TX_B_LESSCUT_RTO_S_1
+332 0x7FFF //TX_B_LESSCUT_RTO_S_2
+333 0x7FFF //TX_B_LESSCUT_RTO_S_3
+334 0x7FFF //TX_B_LESSCUT_RTO_S_4
+335 0x7FFF //TX_B_LESSCUT_RTO_S_5
+336 0x7FFF //TX_B_LESSCUT_RTO_S_6
+337 0x7FFF //TX_B_LESSCUT_RTO_S_7
+338 0x7E00 //TX_LAMBDA_PFILT
+339 0x7E00 //TX_LAMBDA_PFILT_S_0
+340 0x7E00 //TX_LAMBDA_PFILT_S_1
+341 0x7E00 //TX_LAMBDA_PFILT_S_2
+342 0x7E00 //TX_LAMBDA_PFILT_S_3
+343 0x7E00 //TX_LAMBDA_PFILT_S_4
+344 0x7E00 //TX_LAMBDA_PFILT_S_5
+345 0x7E00 //TX_LAMBDA_PFILT_S_6
+346 0x7E00 //TX_LAMBDA_PFILT_S_7
+347 0x0010 //TX_K_PEPPER
+348 0x0400 //TX_A_PEPPER
+349 0x0000 //TX_K_PEPPER_HF
+350 0x0000 //TX_A_PEPPER_HF
+351 0x0001 //TX_HMNC_BST_FLG
+352 0x4000 //TX_HMNC_BST_THR
+353 0x0000 //TX_DT_BINVAD_TH_0
+354 0x0000 //TX_DT_BINVAD_TH_1
+355 0x0000 //TX_DT_BINVAD_TH_2
+356 0x0000 //TX_DT_BINVAD_TH_3
+357 0x0000 //TX_DT_BINVAD_ENDF
+358 0x0000 //TX_C_POST_FLT_DT
+359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT
+360 0x0100 //TX_DT_BOOST
+361 0x0001 //TX_BF_SGRAD_FLG
+362 0x0000 //TX_BF_DVG_TH
+363 0x0000 //TX_SN_C_F
+364 0x0000 //TX_K_APT
+365 0x0001 //TX_NOISEDET
+366 0x05A0 //TX_NDETCT
+367 0x000A //TX_NOISE_TH_0
+368 0x1388 //TX_NOISE_TH_0_2
+369 0x3A98 //TX_NOISE_TH_0_3
+370 0x0C80 //TX_NOISE_TH_1
+371 0x0032 //TX_NOISE_TH_2
+372 0x3D54 //TX_NOISE_TH_3
+373 0x012C //TX_NOISE_TH_4
+374 0x07D0 //TX_NOISE_TH_5
+375 0x6590 //TX_NOISE_TH_5_2
+376 0x7FFF //TX_NOISE_TH_5_3
+377 0x7FFF //TX_NOISE_TH_5_4
+378 0x00C8 //TX_NOISE_TH_6
+379 0x000A //TX_MINENOISE_TH
+380 0x0000 //TX_MINENOISE_MIC0_TH_MTS
+381 0x0000 //TX_MINENOISE_MIC0_TH_EXP
+382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS
+383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP
+384 0x6400 //TX_OUT_ENER_S_TH_CLEAN
+385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN
+386 0x6400 //TX_OUT_ENER_S_TH_NOISY
+387 0x6400 //TX_OUT_ENER_TH_NOISE
+388 0x7D00 //TX_OUT_ENER_TH_SPEECH
+389 0x0000 //TX_SN_NPB_GAIN
+390 0x0000 //TX_NN_NPB_GAIN
+391 0x0000 //TX_CSX_ALPHA_0
+392 0x0000 //TX_CSX_ALPHA_1
+393 0x0000 //TX_CSX_ALPHA_2
+394 0x0000 //TX_CSX_ALPHA_3
+395 0x0000 //TX_MU_ARSP_EST
+396 0x0000 //TX_P_OUTBEAM_MIN_TH
+397 0x0000 //TX_EXTRA_NS_L
+398 0x0000 //TX_EXTRA_NS_A
+399 0x0000 //TX_VR_NOISE_FLOOR_TH
+400 0x0000 //TX_MIN_G_LOW300HZ
+401 0x0010 //TX_MAXLEVEL_CNG
+402 0x0000 //TX_STN_NOISE_TH
+403 0x0000 //TX_POST_MASK_SUP
+404 0x0000 //TX_POST_MASK_ADJUST
+405 0x0014 //TX_NS_ENOISE_MIC0_TH
+406 0x0014 //TX_MINENOISE_MIC0_TH
+407 0x0226 //TX_MINENOISE_MIC0_S_TH
+408 0x2879 //TX_MIN_G_CTRL_SSNS
+409 0x0400 //TX_METAL_RTO_THR
+410 0x0080 //TX_NS_FP_K_METAL
+411 0x3A98 //TX_NOISEDET_BOOST_TH
+412 0x0FA0 //TX_NSMOOTH_TH
+413 0x0000 //TX_NS_RESRV_8
+414 0x2000 //TX_RHO_UPB
+415 0x0020 //TX_N_HOLD_HS
+416 0x0009 //TX_N_RHO_BFR0
+417 0x7FFF //TX_LAMBDA_ARSP_EST
+418 0x0000 //TX_EXTRA_GAIN_MICBLOCK
+419 0x0333 //TX_THR_STD_NSR
+420 0x0219 //TX_THR_STD_PLH
+421 0x09C4 //TX_N_HOLD_STD
+422 0x0166 //TX_THR_STD_RHO
+423 0x2000 //TX_BF_RESET_THR_HS
+424 0x09C4 //TX_SB_RTO_MEAN_TH
+425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK
+426 0x3800 //TX_SB_RTO_MEAN_TH_ABN
+427 0x0000 //TX_SB_RTO_MEAN_TH_RUB
+428 0x2000 //TX_WTA_EN_RTO_TH
+429 0x1400 //TX_TOP_ENER_TH_F
+430 0x0064 //TX_DESIRED_TALK_HOLDT
+431 0x1000 //TX_MIC_BLOCK_FACTOR
+432 0x0000 //TX_NSEST_BFRLRNRDC
+433 0x0000 //TX_THR_POST_FLT_HS
+434 0x0000 //TX_HS_VAD_BIN
+435 0x0000 //TX_THR_VAD_HS
+436 0x0000 //TX_MEAN_RTO_MIN_TH2
+437 0x0000 //TX_SILENCE_T
+438 0x4000 //TX_A_POST_FLT_WTA
+439 0x799A //TX_LAMBDA_PFLT_WTA
+440 0x099A //TX_SB_RHO_MEAN2_TH
+441 0x0190 //TX_SB_RHO_MEAN3_TH
+442 0x0000 //TX_HS_RESRV_4
+443 0x0000 //TX_HS_RESRV_5
+444 0x001E //TX_DOA_VAD_THR_1
+445 0x001E //TX_DOA_VAD_THR_2
+446 0x0028 //TX_DOA_VAD_THR1_0
+447 0x0028 //TX_DOA_VAD_THR1_1
+448 0x0000 //TX_SRC_DOA_RNG_LOW_0A
+449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A
+450 0x005A //TX_DFLT_SRC_DOA_0A
+451 0x0000 //TX_SRC_DOA_RNG_LOW_0B
+452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B
+453 0x005A //TX_DFLT_SRC_DOA_0B
+454 0x0000 //TX_SRC_DOA_RNG_LOW_0C
+455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C
+456 0x005A //TX_DFLT_SRC_DOA_0C
+457 0x0000 //TX_SRC_DOA_RNG_LOW_0D
+458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D
+459 0x005A //TX_DFLT_SRC_DOA_0D
+460 0x0000 //TX_SRC_DOA_RNG_LOW_1A
+461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A
+462 0x005A //TX_DFLT_SRC_DOA_1A
+463 0x0000 //TX_SRC_DOA_RNG_LOW_1B
+464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B
+465 0x005A //TX_DFLT_SRC_DOA_1B
+466 0x0000 //TX_SRC_DOA_RNG_LOW_1C
+467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C
+468 0x005A //TX_DFLT_SRC_DOA_1C
+469 0x0000 //TX_SRC_DOA_RNG_LOW_1D
+470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D
+471 0x005A //TX_DFLT_SRC_DOA_1D
+472 0x0172 //TX_BF_HOLDOFF_T
+473 0x8000 //TX_DOA_COST_FACTOR
+474 0x0D9A //TX_MAINTOREFR_TH0
+475 0x071C //TX_DOA_TRK_THR
+476 0x071C //TX_DOA_TRACK_HT
+477 0x0280 //TX_N1_HOLD_HF
+478 0x0140 //TX_N2_HOLD_HF
+479 0x2AAB //TX_BF_RESET_THR_HF
+480 0x4000 //TX_DOA_SMOOTH
+481 0x0000 //TX_MU_BF
+482 0x0200 //TX_BF_MU_LF_B2
+483 0x0000 //TX_BF_FC_END_BIN_B2
+484 0x0000 //TX_BF_FC_END_BIN
+485 0x0000 //TX_HF_RESRV_25
+486 0x0000 //TX_HF_RESRV_26
+487 0x0000 //TX_N_DOA_SEED
+488 0x0000 //TX_FINE_DOA_SEARCH_FLG
+489 0x0000 //TX_HF_RESRV_27
+490 0x0000 //TX_DLT_SRC_DOA_RNG
+491 0x0200 //TX_BF_MU_LF
+492 0x0000 //TX_DFLT_SRC_LOC_0
+493 0x0000 //TX_DFLT_SRC_LOC_1
+494 0x0000 //TX_DFLT_SRC_LOC_2
+495 0x0000 //TX_DOA_TRACK_VADTH
+496 0x0000 //TX_DOA_TRACK_NEW
+497 0x0168 //TX_NOR_OFF_THR
+498 0x0CCD //TX_MORE_ON_700HZ_THR
+499 0x2000 //TX_MU_BF_ADPT_NS
+500 0x0004 //TX_ADAPT_LEN
+501 0x6666 //TX_MORE_SNS
+502 0x0230 //TX_NOR_OFF_TH1
+503 0xD333 //TX_WIDE_MASK_TH
+504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505 0x6000 //TX_C_POST_FLT_CUT
+506 0x2000 //TX_RADIODTLV
+507 0x0320 //TX_POWER_LINEIN_TH
+508 0x0014 //TX_FE_VADCOUNT_TH_FC
+509 0x000A //TX_ECHO_SUPP_FC
+510 0x0C80 //TX_ECHO_TH
+511 0x6666 //TX_MIC_TO_BFGAIN
+512 0x6666 //TX_MICTOBFGAIN0
+513 0x0014 //TX_FASTMUE_TH
+514 0x0000 //TX_DERVB_LEN_0
+515 0x0000 //TX_DERVB_LEN_1
+516 0x0000 //TX_RHO_DERVB
+517 0x0000 //TX_MIC_INDX_DERVB
+518 0x0000 //TX_MU_DERVB
+519 0x0000 //TX_DR_RESRV_0
+520 0x0000 //TX_DR_RESRV_1
+521 0x0000 //TX_DR_RESRV_2
+522 0x0000 //TX_DR_RESRV_3
+523 0x0000 //TX_DR_RESRV_4
+524 0x0000 //TX_DR_RESRV_5
+525 0x0000 //TX_DR_RESRV_6
+526 0x0000 //TX_DR_RESRV_7
+527 0x0000 //TX_DR_RESRV_8
+528 0x0000 //TX_WIND_MARK_TH
+529 0x399A //TX_CORR_THR
+530 0x0028 //TX_SNR_THR
+531 0x03E8 //TX_ENGY_THR
+532 0x0000 //TX_CORR_HIGH_TH
+533 0x0000 //TX_ENGY_THR_2
+534 0x0000 //TX_MEAN_RTO_THR
+535 0x0000 //TX_WNS_ENOISE_MIC0_TH
+536 0x0000 //TX_RATIOMICL_TH
+537 0x0000 //TX_CALIG_HS
+538 0x000A //TX_LVL_CTRL
+539 0x0000 //TX_WIND_SUPRTO
+540 0x0000 //TX_WNS_MIN_G
+541 0x0000 //TX_WNS_B_POST_FLT
+542 0x0000 //TX_RATIOMICH_TH
+543 0x0000 //TX_WIND_INBEAM_L_TH
+544 0x0000 //TX_WIND_INBEAM_H_TH
+545 0x0000 //TX_WNS_RESRV_0
+546 0x0000 //TX_WNS_RESRV_1
+547 0x0000 //TX_WNS_RESRV_2
+548 0x0000 //TX_WNS_RESRV_3
+549 0x0000 //TX_WNS_RESRV_4
+550 0x0000 //TX_WNS_RESRV_5
+551 0x0000 //TX_WNS_RESRV_6
+552 0x0000 //TX_PB_B_POST_FLT_LESSCUT
+553 0x0000 //TX_BF_LESSCUT_BBIN
+554 0x0000 //TX_BF_LESSCUT_EBIN
+555 0x0000 //TX_POSTBFB0
+556 0x0000 //TX_POSTBFB
+557 0x0000 //TX_POSTBFE
+558 0x0000 //TX_SPEECH_SNR_TH
+559 0x0000 //TX_PB_MAX_PRI_SNR_TH
+560 0x0000 //TX_MAX_PRI_SNR_TH_L
+561 0x0000 //TX_PFGAIN
+562 0x0000 //TX_MAINTOREFR_TH
+563 0x0000 //TX_SAM_MARK
+564 0x0000 //TX_PB_RESRV_0
+565 0x0000 //TX_PB_RESRV_1
+566 0x0020 //TX_FDEQ_SUBNUM
+567 0x4848 //TX_FDEQ_GAIN_0
+568 0x4848 //TX_FDEQ_GAIN_1
+569 0x4848 //TX_FDEQ_GAIN_2
+570 0x4848 //TX_FDEQ_GAIN_3
+571 0x4848 //TX_FDEQ_GAIN_4
+572 0x4848 //TX_FDEQ_GAIN_5
+573 0x4848 //TX_FDEQ_GAIN_6
+574 0x4848 //TX_FDEQ_GAIN_7
+575 0x4848 //TX_FDEQ_GAIN_8
+576 0x4848 //TX_FDEQ_GAIN_9
+577 0x4848 //TX_FDEQ_GAIN_10
+578 0x4848 //TX_FDEQ_GAIN_11
+579 0x4848 //TX_FDEQ_GAIN_12
+580 0x4848 //TX_FDEQ_GAIN_13
+581 0x4848 //TX_FDEQ_GAIN_14
+582 0x4848 //TX_FDEQ_GAIN_15
+583 0x4848 //TX_FDEQ_GAIN_16
+584 0x4848 //TX_FDEQ_GAIN_17
+585 0x4848 //TX_FDEQ_GAIN_18
+586 0x4848 //TX_FDEQ_GAIN_19
+587 0x4848 //TX_FDEQ_GAIN_20
+588 0x4848 //TX_FDEQ_GAIN_21
+589 0x4848 //TX_FDEQ_GAIN_22
+590 0x4848 //TX_FDEQ_GAIN_23
+591 0x0000 //TX_FDEQ_BIN_0
+592 0x0000 //TX_FDEQ_BIN_1
+593 0x0000 //TX_FDEQ_BIN_2
+594 0x0000 //TX_FDEQ_BIN_3
+595 0x0000 //TX_FDEQ_BIN_4
+596 0x0000 //TX_FDEQ_BIN_5
+597 0x0000 //TX_FDEQ_BIN_6
+598 0x0000 //TX_FDEQ_BIN_7
+599 0x0000 //TX_FDEQ_BIN_8
+600 0x0000 //TX_FDEQ_BIN_9
+601 0x0000 //TX_FDEQ_BIN_10
+602 0x0000 //TX_FDEQ_BIN_11
+603 0x0000 //TX_FDEQ_BIN_12
+604 0x0000 //TX_FDEQ_BIN_13
+605 0x0000 //TX_FDEQ_BIN_14
+606 0x0000 //TX_FDEQ_BIN_15
+607 0x0000 //TX_FDEQ_BIN_16
+608 0x0000 //TX_FDEQ_BIN_17
+609 0x0000 //TX_FDEQ_BIN_18
+610 0x0000 //TX_FDEQ_BIN_19
+611 0x0000 //TX_FDEQ_BIN_20
+612 0x0000 //TX_FDEQ_BIN_21
+613 0x0000 //TX_FDEQ_BIN_22
+614 0x0000 //TX_FDEQ_BIN_23
+615 0x0000 //TX_FDEQ_PADDING
+616 0x0020 //TX_PREEQ_SUBNUM_MIC0
+617 0x4848 //TX_PREEQ_GAIN_MIC0_0
+618 0x4848 //TX_PREEQ_GAIN_MIC0_1
+619 0x4848 //TX_PREEQ_GAIN_MIC0_2
+620 0x4848 //TX_PREEQ_GAIN_MIC0_3
+621 0x4848 //TX_PREEQ_GAIN_MIC0_4
+622 0x4848 //TX_PREEQ_GAIN_MIC0_5
+623 0x4848 //TX_PREEQ_GAIN_MIC0_6
+624 0x4848 //TX_PREEQ_GAIN_MIC0_7
+625 0x4848 //TX_PREEQ_GAIN_MIC0_8
+626 0x4848 //TX_PREEQ_GAIN_MIC0_9
+627 0x4848 //TX_PREEQ_GAIN_MIC0_10
+628 0x4848 //TX_PREEQ_GAIN_MIC0_11
+629 0x4848 //TX_PREEQ_GAIN_MIC0_12
+630 0x4848 //TX_PREEQ_GAIN_MIC0_13
+631 0x4848 //TX_PREEQ_GAIN_MIC0_14
+632 0x4848 //TX_PREEQ_GAIN_MIC0_15
+633 0x4848 //TX_PREEQ_GAIN_MIC0_16
+634 0x4848 //TX_PREEQ_GAIN_MIC0_17
+635 0x4848 //TX_PREEQ_GAIN_MIC0_18
+636 0x4848 //TX_PREEQ_GAIN_MIC0_19
+637 0x4848 //TX_PREEQ_GAIN_MIC0_20
+638 0x4848 //TX_PREEQ_GAIN_MIC0_21
+639 0x4848 //TX_PREEQ_GAIN_MIC0_22
+640 0x4848 //TX_PREEQ_GAIN_MIC0_23
+641 0x0000 //TX_PREEQ_BIN_MIC0_0
+642 0x0000 //TX_PREEQ_BIN_MIC0_1
+643 0x0000 //TX_PREEQ_BIN_MIC0_2
+644 0x0000 //TX_PREEQ_BIN_MIC0_3
+645 0x0000 //TX_PREEQ_BIN_MIC0_4
+646 0x0000 //TX_PREEQ_BIN_MIC0_5
+647 0x0000 //TX_PREEQ_BIN_MIC0_6
+648 0x0000 //TX_PREEQ_BIN_MIC0_7
+649 0x0000 //TX_PREEQ_BIN_MIC0_8
+650 0x0000 //TX_PREEQ_BIN_MIC0_9
+651 0x0000 //TX_PREEQ_BIN_MIC0_10
+652 0x0000 //TX_PREEQ_BIN_MIC0_11
+653 0x0000 //TX_PREEQ_BIN_MIC0_12
+654 0x0000 //TX_PREEQ_BIN_MIC0_13
+655 0x0000 //TX_PREEQ_BIN_MIC0_14
+656 0x0000 //TX_PREEQ_BIN_MIC0_15
+657 0x0000 //TX_PREEQ_BIN_MIC0_16
+658 0x0000 //TX_PREEQ_BIN_MIC0_17
+659 0x0000 //TX_PREEQ_BIN_MIC0_18
+660 0x0000 //TX_PREEQ_BIN_MIC0_19
+661 0x0000 //TX_PREEQ_BIN_MIC0_20
+662 0x0000 //TX_PREEQ_BIN_MIC0_21
+663 0x0000 //TX_PREEQ_BIN_MIC0_22
+664 0x0000 //TX_PREEQ_BIN_MIC0_23
+665 0x0020 //TX_PREEQ_SUBNUM_MIC1
+666 0x4848 //TX_PREEQ_GAIN_MIC1_0
+667 0x4848 //TX_PREEQ_GAIN_MIC1_1
+668 0x4848 //TX_PREEQ_GAIN_MIC1_2
+669 0x4848 //TX_PREEQ_GAIN_MIC1_3
+670 0x4848 //TX_PREEQ_GAIN_MIC1_4
+671 0x4848 //TX_PREEQ_GAIN_MIC1_5
+672 0x4848 //TX_PREEQ_GAIN_MIC1_6
+673 0x4848 //TX_PREEQ_GAIN_MIC1_7
+674 0x4848 //TX_PREEQ_GAIN_MIC1_8
+675 0x4848 //TX_PREEQ_GAIN_MIC1_9
+676 0x4848 //TX_PREEQ_GAIN_MIC1_10
+677 0x4848 //TX_PREEQ_GAIN_MIC1_11
+678 0x4848 //TX_PREEQ_GAIN_MIC1_12
+679 0x4848 //TX_PREEQ_GAIN_MIC1_13
+680 0x4848 //TX_PREEQ_GAIN_MIC1_14
+681 0x4848 //TX_PREEQ_GAIN_MIC1_15
+682 0x4848 //TX_PREEQ_GAIN_MIC1_16
+683 0x4848 //TX_PREEQ_GAIN_MIC1_17
+684 0x4848 //TX_PREEQ_GAIN_MIC1_18
+685 0x4848 //TX_PREEQ_GAIN_MIC1_19
+686 0x4848 //TX_PREEQ_GAIN_MIC1_20
+687 0x4848 //TX_PREEQ_GAIN_MIC1_21
+688 0x4848 //TX_PREEQ_GAIN_MIC1_22
+689 0x4848 //TX_PREEQ_GAIN_MIC1_23
+690 0x0000 //TX_PREEQ_BIN_MIC1_0
+691 0x0000 //TX_PREEQ_BIN_MIC1_1
+692 0x0000 //TX_PREEQ_BIN_MIC1_2
+693 0x0000 //TX_PREEQ_BIN_MIC1_3
+694 0x0000 //TX_PREEQ_BIN_MIC1_4
+695 0x0000 //TX_PREEQ_BIN_MIC1_5
+696 0x0000 //TX_PREEQ_BIN_MIC1_6
+697 0x0000 //TX_PREEQ_BIN_MIC1_7
+698 0x0000 //TX_PREEQ_BIN_MIC1_8
+699 0x0000 //TX_PREEQ_BIN_MIC1_9
+700 0x0000 //TX_PREEQ_BIN_MIC1_10
+701 0x0000 //TX_PREEQ_BIN_MIC1_11
+702 0x0000 //TX_PREEQ_BIN_MIC1_12
+703 0x0000 //TX_PREEQ_BIN_MIC1_13
+704 0x0000 //TX_PREEQ_BIN_MIC1_14
+705 0x0000 //TX_PREEQ_BIN_MIC1_15
+706 0x0000 //TX_PREEQ_BIN_MIC1_16
+707 0x0000 //TX_PREEQ_BIN_MIC1_17
+708 0x0000 //TX_PREEQ_BIN_MIC1_18
+709 0x0000 //TX_PREEQ_BIN_MIC1_19
+710 0x0000 //TX_PREEQ_BIN_MIC1_20
+711 0x0000 //TX_PREEQ_BIN_MIC1_21
+712 0x0000 //TX_PREEQ_BIN_MIC1_22
+713 0x0000 //TX_PREEQ_BIN_MIC1_23
+714 0x0020 //TX_PREEQ_SUBNUM_MIC2
+715 0x4848 //TX_PREEQ_GAIN_MIC2_0
+716 0x4848 //TX_PREEQ_GAIN_MIC2_1
+717 0x4848 //TX_PREEQ_GAIN_MIC2_2
+718 0x4848 //TX_PREEQ_GAIN_MIC2_3
+719 0x4848 //TX_PREEQ_GAIN_MIC2_4
+720 0x4848 //TX_PREEQ_GAIN_MIC2_5
+721 0x4848 //TX_PREEQ_GAIN_MIC2_6
+722 0x4848 //TX_PREEQ_GAIN_MIC2_7
+723 0x4848 //TX_PREEQ_GAIN_MIC2_8
+724 0x4848 //TX_PREEQ_GAIN_MIC2_9
+725 0x4848 //TX_PREEQ_GAIN_MIC2_10
+726 0x4848 //TX_PREEQ_GAIN_MIC2_11
+727 0x4848 //TX_PREEQ_GAIN_MIC2_12
+728 0x4848 //TX_PREEQ_GAIN_MIC2_13
+729 0x4848 //TX_PREEQ_GAIN_MIC2_14
+730 0x4848 //TX_PREEQ_GAIN_MIC2_15
+731 0x4848 //TX_PREEQ_GAIN_MIC2_16
+732 0x4848 //TX_PREEQ_GAIN_MIC2_17
+733 0x4848 //TX_PREEQ_GAIN_MIC2_18
+734 0x4848 //TX_PREEQ_GAIN_MIC2_19
+735 0x4848 //TX_PREEQ_GAIN_MIC2_20
+736 0x4848 //TX_PREEQ_GAIN_MIC2_21
+737 0x4848 //TX_PREEQ_GAIN_MIC2_22
+738 0x4848 //TX_PREEQ_GAIN_MIC2_23
+739 0x0000 //TX_PREEQ_BIN_MIC2_0
+740 0x0000 //TX_PREEQ_BIN_MIC2_1
+741 0x0000 //TX_PREEQ_BIN_MIC2_2
+742 0x0000 //TX_PREEQ_BIN_MIC2_3
+743 0x0000 //TX_PREEQ_BIN_MIC2_4
+744 0x0000 //TX_PREEQ_BIN_MIC2_5
+745 0x0000 //TX_PREEQ_BIN_MIC2_6
+746 0x0000 //TX_PREEQ_BIN_MIC2_7
+747 0x0000 //TX_PREEQ_BIN_MIC2_8
+748 0x0000 //TX_PREEQ_BIN_MIC2_9
+749 0x0000 //TX_PREEQ_BIN_MIC2_10
+750 0x0000 //TX_PREEQ_BIN_MIC2_11
+751 0x0000 //TX_PREEQ_BIN_MIC2_12
+752 0x0000 //TX_PREEQ_BIN_MIC2_13
+753 0x0000 //TX_PREEQ_BIN_MIC2_14
+754 0x0000 //TX_PREEQ_BIN_MIC2_15
+755 0x0000 //TX_PREEQ_BIN_MIC2_16
+756 0x0000 //TX_PREEQ_BIN_MIC2_17
+757 0x0000 //TX_PREEQ_BIN_MIC2_18
+758 0x0000 //TX_PREEQ_BIN_MIC2_19
+759 0x0000 //TX_PREEQ_BIN_MIC2_20
+760 0x0000 //TX_PREEQ_BIN_MIC2_21
+761 0x0000 //TX_PREEQ_BIN_MIC2_22
+762 0x0000 //TX_PREEQ_BIN_MIC2_23
+763 0x0006 //TX_MASKING_ABILITY
+764 0x2000 //TX_NND_WEIGHT
+765 0x0064 //TX_MIC_CALIBRATION_0
+766 0x006A //TX_MIC_CALIBRATION_1
+767 0x006A //TX_MIC_CALIBRATION_2
+768 0x006B //TX_MIC_CALIBRATION_3
+769 0x0048 //TX_MIC_PWR_BIAS_0
+770 0x003C //TX_MIC_PWR_BIAS_1
+771 0x003C //TX_MIC_PWR_BIAS_2
+772 0x003C //TX_MIC_PWR_BIAS_3
+773 0x0000 //TX_GAIN_LIMIT_0
+774 0x0009 //TX_GAIN_LIMIT_1
+775 0x000C //TX_GAIN_LIMIT_2
+776 0x000F //TX_GAIN_LIMIT_3
+777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN
+778 0x7FDE //TX_BVE_VAD0_ALPHAUP
+779 0x7F3A //TX_BVE_VAD0_ALPHADOWN
+780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI
+781 0x7F5B //TX_BVE_FEVADLI_ALPHA
+782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP
+783 0x3000 //TX_TDDRC_ALPHA_UP_01
+784 0x3000 //TX_TDDRC_ALPHA_UP_02
+785 0x3000 //TX_TDDRC_ALPHA_UP_03
+786 0x3000 //TX_TDDRC_ALPHA_UP_04
+787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01
+788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02
+789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03
+790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04
+791 0x65AD //TX_TDDRC_TD_DRC_LIMIT
+792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN
+793 0x0000 //TX_TDDRC_RESRV_0
+794 0x0000 //TX_TDDRC_RESRV_1
+795 0x0018 //TX_FDDRC_BAND_MARGIN_0
+796 0x0030 //TX_FDDRC_BAND_MARGIN_1
+797 0x0050 //TX_FDDRC_BAND_MARGIN_2
+798 0x0080 //TX_FDDRC_BAND_MARGIN_3
+799 0x0007 //TX_FDDRC_BLOCK_EXP
+800 0x5000 //TX_FDDRC_THRD_2_0
+801 0x5000 //TX_FDDRC_THRD_2_1
+802 0x5000 //TX_FDDRC_THRD_2_2
+803 0x5000 //TX_FDDRC_THRD_2_3
+804 0x6400 //TX_FDDRC_THRD_3_0
+805 0x6400 //TX_FDDRC_THRD_3_1
+806 0x6400 //TX_FDDRC_THRD_3_2
+807 0x6400 //TX_FDDRC_THRD_3_3
+808 0x2000 //TX_FDDRC_SLANT_0_0
+809 0x2000 //TX_FDDRC_SLANT_0_1
+810 0x2000 //TX_FDDRC_SLANT_0_2
+811 0x2000 //TX_FDDRC_SLANT_0_3
+812 0x5333 //TX_FDDRC_SLANT_1_0
+813 0x5333 //TX_FDDRC_SLANT_1_1
+814 0x5333 //TX_FDDRC_SLANT_1_2
+815 0x5333 //TX_FDDRC_SLANT_1_3
+816 0x0002 //TX_DEADMIC_SILENCE_TH
+817 0x0147 //TX_MIC_DEGRADE_TH
+818 0x0078 //TX_DEADMIC_CNT
+819 0x0078 //TX_MIC_DEGRADE_CNT
+820 0x0000 //TX_FDDRC_RESRV_4
+821 0x0000 //TX_FDDRC_RESRV_5
+822 0x0000 //TX_FDDRC_RESRV_6
+823 0x0000 //TX_KS_NOISEPASTE_FACTOR
+824 0x0000 //TX_KS_CONFIG
+825 0x0000 //TX_KS_GAIN_MIN
+826 0x0000 //TX_KS_RESRV_0
+827 0x0000 //TX_KS_RESRV_1
+828 0x0000 //TX_KS_RESRV_2
+829 0x7C00 //TX_LAMBDA_PKA_FP
+830 0x2000 //TX_TPKA_FP
+831 0x0080 //TX_MIN_G_FP
+832 0x2000 //TX_MAX_G_FP
+833 0x0000 //TX_FFP_FP_K_METAL
+834 0x0000 //TX_A_POST_FLT_FP
+835 0x0000 //TX_RTO_OUTBEAM_TH
+836 0x0000 //TX_TPKA_FP_THD
+837 0x0000 //TX_MAX_G_FP_BLK
+838 0x0000 //TX_FFP_FADEIN
+839 0x0000 //TX_FFP_FADEOUT
+840 0x0000 //TX_WHISPERCTH
+841 0x0000 //TX_WHISPERHOLDT
+842 0x0000 //TX_WHISP_ENTHH
+843 0x0000 //TX_WHISP_ENTHL
+844 0x0000 //TX_WHISP_RTOTH
+845 0x0000 //TX_WHISP_RTOTH2
+846 0x0000 //TX_MUTE_PERIOD
+847 0x0000 //TX_FADE_IN_PERIOD
+848 0x0000 //TX_FFP_RESRV_2
+849 0x0000 //TX_FFP_RESRV_3
+850 0x0000 //TX_FFP_RESRV_4
+851 0x0000 //TX_FFP_RESRV_5
+852 0x0000 //TX_FFP_RESRV_6
+853 0x0002 //TX_FILTINDX
+854 0x0000 //TX_TDDRC_THRD_0
+855 0x0000 //TX_TDDRC_THRD_1
+856 0x0E80 //TX_TDDRC_THRD_2
+857 0x3800 //TX_TDDRC_THRD_3
+858 0x2A00 //TX_TDDRC_SLANT_0
+859 0x6E00 //TX_TDDRC_SLANT_1
+860 0x3000 //TX_TDDRC_ALPHA_UP_00
+861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00
+862 0x0000 //TX_TDDRC_HMNC_FLAG
+863 0x0000 //TX_TDDRC_HMNC_GAIN
+864 0x0000 //TX_TDDRC_SMT_FLAG
+865 0x0000 //TX_TDDRC_SMT_W
+866 0x0100 //TX_TDDRC_DRC_GAIN
+867 0x0000 //TX_TDDRC_LMT_THRD
+868 0x0000 //TX_TDDRC_LMT_ALPHA
+869 0x1EB8 //TX_TFMASKLTH
+870 0x170A //TX_TFMASKLTHL
+871 0x7FFF //TX_TFMASKHTH
+872 0x0CCD //TX_TFMASKLTH_BINVAD
+873 0xF333 //TX_TFMASKLTH_NS_EST
+874 0x2CCD //TX_TFMASKLTH_DOA
+875 0x0CCD //TX_TFMASKTH_BLESSCUT
+876 0x4000 //TX_B_LESSCUT_RTO_MASK
+877 0x3800 //TX_SB_RHO_MEAN_TH_ABN
+878 0x2000 //TX_B_POST_FLT_MASK
+879 0x0000 //TX_B_POST_FLT_MASK1
+880 0x5333 //TX_GAIN_WIND_MASK
+881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC
+882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC
+883 0x0000 //TX_FASTNS_OUTIN_TH
+884 0x0000 //TX_FASTNS_TFMASK_TH
+885 0x0000 //TX_FASTNS_TFMASKBIN_TH1
+886 0x0000 //TX_FASTNS_TFMASKBIN_TH2
+887 0x0000 //TX_FASTNS_TFMASKBIN_TH3
+888 0x00C8 //TX_FASTNS_ARSPC_TH
+889 0xD99A //TX_FASTNS_MASK5_TH
+890 0x051F //TX_POSTSSA_MIN_G_VR_MASK
+891 0x7FFF //TX_A_LESSCUT_RTO_MASK
+892 0x1770 //TX_FASTNS_NOISETH
+893 0xC000 //TX_FASTNS_SSA_THLFL
+894 0xC000 //TX_FASTNS_SSA_THHFL
+895 0xCCCC //TX_FASTNS_SSA_THLFH
+896 0xD999 //TX_FASTNS_SSA_THHFH
+#RX
+0 0x0040 //RX_RECVFUNC_MODE_0
+1 0x0000 //RX_RECVFUNC_MODE_1
+2 0x0000 //RX_SAMPLINGFREQ_SIG
+3 0x0000 //RX_SAMPLINGFREQ_PROC
+4 0x000A //RX_FRAME_SZ
+5 0x0000 //RX_DELAY_OPT
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+10 0x0082 //RX_PGA
+11 0x7652 //RX_A_HP
+12 0x4000 //RX_B_PE
+13 0x7800 //RX_THR_PITCH_DET_0
+14 0x7000 //RX_THR_PITCH_DET_1
+15 0x6000 //RX_THR_PITCH_DET_2
+16 0x0000 //RX_PITCH_BFR_LEN
+17 0x0000 //RX_SBD_PITCH_DET
+18 0x0000 //RX_PP_RESRV_0
+19 0x0000 //RX_PP_RESRV_1
+20 0xF800 //RX_N_SN_EST
+21 0x0000 //RX_N2_SN_EST
+22 0x000F //RX_NS_LVL_CTRL
+23 0xF800 //RX_THR_SN_EST
+24 0x7E00 //RX_LAMBDA_PFILT
+25 0x0000 //RX_FENS_RESRV_0
+26 0x0000 //RX_FENS_RESRV_1
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+30 0x0000 //RX_EXTRA_NS_L
+31 0x0000 //RX_EXTRA_NS_A
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+35 0x0000 //RX_A_POST_FLT
+36 0x0000 //RX_LMT_THRD
+37 0x4000 //RX_LMT_ALPHA
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+111 0x0003 //RX_FILTINDX
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+125 0x7C00 //RX_LAMBDA_PKA_FP
+126 0x2000 //RX_TPKA_FP
+127 0x0080 //RX_MIN_G_FP
+128 0x2000 //RX_MAX_G_FP
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+131 0x0010 //RX_MAXLEVEL_CNG
+132 0x0000 //RX_BWE_UV_TH
+133 0x0000 //RX_BWE_UV_TH2
+134 0x0000 //RX_BWE_UV_TH3
+135 0x0000 //RX_BWE_V_TH
+136 0x0000 //RX_BWE_GAIN1_V_TH1
+137 0x0000 //RX_BWE_GAIN1_V_TH2
+138 0x0000 //RX_BWE_UV_EQ
+139 0x0000 //RX_BWE_V_EQ
+140 0x0000 //RX_BWE_TONE_TH
+141 0x0000 //RX_BWE_UV_HOLD_T
+142 0x0000 //RX_BWE_GAIN2_ALPHA
+143 0x0000 //RX_BWE_GAIN3_ALPHA
+144 0x0000 //RX_BWE_CUTOFF
+145 0x0000 //RX_BWE_GAINFILL
+146 0x0000 //RX_BWE_MAXTH_TONE
+147 0x0000 //RX_BWE_EQ_0
+148 0x0000 //RX_BWE_EQ_1
+149 0x0000 //RX_BWE_EQ_2
+150 0x0000 //RX_BWE_EQ_3
+151 0x0000 //RX_BWE_EQ_4
+152 0x0000 //RX_BWE_EQ_5
+153 0x0000 //RX_BWE_EQ_6
+154 0x0000 //RX_BWE_RESRV_0
+155 0x0000 //RX_BWE_RESRV_1
+156 0x0000 //RX_BWE_RESRV_2
+#VOL 0
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 1
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 2
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 3
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 4
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 5
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+#VOL 6
+6 0x3000 //RX_TDDRC_ALPHA_UP_1
+7 0x3000 //RX_TDDRC_ALPHA_UP_2
+8 0x3000 //RX_TDDRC_ALPHA_UP_3
+9 0x3000 //RX_TDDRC_ALPHA_UP_4
+27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1
+28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2
+29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3
+32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4
+33 0xDA9E //RX_TDDRC_LIMITER_THRD
+34 0x0800 //RX_TDDRC_LIMITER_GAIN
+112 0x0000 //RX_TDDRC_THRD_0
+113 0x0000 //RX_TDDRC_THRD_1
+114 0x0E80 //RX_TDDRC_THRD_2
+115 0x3800 //RX_TDDRC_THRD_3
+116 0x2A00 //RX_TDDRC_SLANT_0
+117 0x6E00 //RX_TDDRC_SLANT_1
+118 0x3000 //RX_TDDRC_ALPHA_UP_0
+119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0
+120 0x0000 //RX_TDDRC_HMNC_FLAG
+121 0x0000 //RX_TDDRC_HMNC_GAIN
+122 0x0000 //RX_TDDRC_SMT_FLAG
+123 0x0000 //RX_TDDRC_SMT_W
+124 0x0100 //RX_TDDRC_DRC_GAIN
+38 0x0020 //RX_FDEQ_SUBNUM
+39 0x4848 //RX_FDEQ_GAIN_0
+40 0x4848 //RX_FDEQ_GAIN_1
+41 0x4848 //RX_FDEQ_GAIN_2
+42 0x4848 //RX_FDEQ_GAIN_3
+43 0x4848 //RX_FDEQ_GAIN_4
+44 0x4848 //RX_FDEQ_GAIN_5
+45 0x4848 //RX_FDEQ_GAIN_6
+46 0x4848 //RX_FDEQ_GAIN_7
+47 0x4848 //RX_FDEQ_GAIN_8
+48 0x4848 //RX_FDEQ_GAIN_9
+49 0x4848 //RX_FDEQ_GAIN_10
+50 0x4848 //RX_FDEQ_GAIN_11
+51 0x4848 //RX_FDEQ_GAIN_12
+52 0x4848 //RX_FDEQ_GAIN_13
+53 0x4848 //RX_FDEQ_GAIN_14
+54 0x4848 //RX_FDEQ_GAIN_15
+55 0x4848 //RX_FDEQ_GAIN_16
+56 0x4848 //RX_FDEQ_GAIN_17
+57 0x4848 //RX_FDEQ_GAIN_18
+58 0x4848 //RX_FDEQ_GAIN_19
+59 0x4848 //RX_FDEQ_GAIN_20
+60 0x4848 //RX_FDEQ_GAIN_21
+61 0x4848 //RX_FDEQ_GAIN_22
+62 0x4848 //RX_FDEQ_GAIN_23
+63 0x0000 //RX_FDEQ_BIN_0
+64 0x0000 //RX_FDEQ_BIN_1
+65 0x0000 //RX_FDEQ_BIN_2
+66 0x0000 //RX_FDEQ_BIN_3
+67 0x0000 //RX_FDEQ_BIN_4
+68 0x0000 //RX_FDEQ_BIN_5
+69 0x0000 //RX_FDEQ_BIN_6
+70 0x0000 //RX_FDEQ_BIN_7
+71 0x0000 //RX_FDEQ_BIN_8
+72 0x0000 //RX_FDEQ_BIN_9
+73 0x0000 //RX_FDEQ_BIN_10
+74 0x0000 //RX_FDEQ_BIN_11
+75 0x0000 //RX_FDEQ_BIN_12
+76 0x0000 //RX_FDEQ_BIN_13
+77 0x0000 //RX_FDEQ_BIN_14
+78 0x0000 //RX_FDEQ_BIN_15
+79 0x0000 //RX_FDEQ_BIN_16
+80 0x0000 //RX_FDEQ_BIN_17
+81 0x0000 //RX_FDEQ_BIN_18
+82 0x0000 //RX_FDEQ_BIN_19
+83 0x0000 //RX_FDEQ_BIN_20
+84 0x0000 //RX_FDEQ_BIN_21
+85 0x0000 //RX_FDEQ_BIN_22
+86 0x0000 //RX_FDEQ_BIN_23
+87 0x0000 //RX_FDEQ_RESRV_0
+88 0x0000 //RX_FDEQ_RESRV_1
+89 0x0018 //RX_FDDRC_BAND_MARGIN_0
+90 0x0030 //RX_FDDRC_BAND_MARGIN_1
+91 0x0050 //RX_FDDRC_BAND_MARGIN_2
+92 0x0080 //RX_FDDRC_BAND_MARGIN_3
+93 0x0004 //RX_FDDRC_BLOCK_EXP
+94 0x5000 //RX_FDDRC_THRD_2_0
+95 0x5000 //RX_FDDRC_THRD_2_1
+96 0x5000 //RX_FDDRC_THRD_2_2
+97 0x5000 //RX_FDDRC_THRD_2_3
+98 0x6400 //RX_FDDRC_THRD_3_0
+99 0x6400 //RX_FDDRC_THRD_3_1
+100 0x6400 //RX_FDDRC_THRD_3_2
+101 0x6400 //RX_FDDRC_THRD_3_3
+102 0x2000 //RX_FDDRC_SLANT_0_0
+103 0x2000 //RX_FDDRC_SLANT_0_1
+104 0x2000 //RX_FDDRC_SLANT_0_2
+105 0x2000 //RX_FDDRC_SLANT_0_3
+106 0x2000 //RX_FDDRC_SLANT_1_0
+107 0x2000 //RX_FDDRC_SLANT_1_1
+108 0x2000 //RX_FDDRC_SLANT_1_2
+109 0x2000 //RX_FDDRC_SLANT_1_3
+110 0x0000 //RX_FDDRC_RESRV_0
+129 0x0012 //RX_SPK_VOL
+130 0x0000 //RX_VOL_RESRV_0
+
diff --git a/audio/whitefin/tuning/waves/waves_config.ini b/audio/whitefin/tuning/waves/waves_config.ini
new file mode 100644
index 0000000..433a655
--- /dev/null
+++ b/audio/whitefin/tuning/waves/waves_config.ini
@@ -0,0 +1,48 @@
+########################################################################################################
+# This defined the options of supported sample rates.
+# This can be configured by Waves or platform vendor.
+########################################################################################################
+[HAL_SUPPORTED_SAMPLE_RATES]
+SR_COMMON = 48000
+
+########################################################################################################
+# (Optional) The subtypes that applies to different angles(0, 90, 180, 270). Can be empty if not applicable.
+# This can be configured by Waves or platform vendor.
+########################################################################################################
+[HAL_ORIENTATION_SUBTYPES]
+OST_SPEAKER = 0:12,90:13,180:12,270:0|13
+
+########################################################################################################
+# This defines available preset configurations.
+# This should be configured by Waves only unless platform vendor is familiar with MPS structure.
+########################################################################################################
+[HAL_SUPPORTED_PRESETS]
+SPEAKER_MUSIC = OM:1,SM:2,OST:OST_SPEAKER
+SPEAKER_SAFE_MUSIC = OM:10,SM:2,OST:OST_SPEAKER
+SPEAKER_SAFE_CALL = OM:10,SM:2,OST:OST_SPEAKER
+HEADSET_MUSIC = OM:2,SM:2
+
+########################################################################################################
+# This defines available CONTROL configurations. Only define the CONTROL if you need it.
+# The numbers could vary from device to device.
+# This can be configured by Waves or platform vendor.
+########################################################################################################
+[HAL_SUPPORTED_CONTROLS]
+SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_SAFE_CALL
+A2DP_INSTANCE = INSTANCE:2,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC
+USB_HEADPHONE_INSTANCE = INSTANCE:4,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC
+
+[COEFS_CONVERTER_SETTING]
+AlgFxPath=/vendor/lib/libAlgFx_HiFi3z.so
+# do not modify the following if not necessary
+#AudioFormatType=0
+#AudioFormatChannels=2
+#AudioFormatSampleRate=48000
+#AudioFormatBitsPerSample=32
+#AudioFormatSampleSize=4
+#AudioFormatIncrement=8
+
+[CUSTOM_ACTION_256]
+CASE_1=PRIORITY:0,NUMBERS:2:0|1,PRESET:SPEAKER_MUSIC
+CASE_2=PRIORITY:1,NUMBERS:2|4194304:2|3|4,PRESET:SPEAKER_SAFE_CALL
+CASE_3=PRIORITY:2,NUMBERS:4194304:0|1,PRESET:SPEAKER_SAFE_MUSIC
diff --git a/audio/whitefin/tuning/waves/waves_preset.mps b/audio/whitefin/tuning/waves/waves_preset.mps
new file mode 100644
index 0000000..642c7df
--- /dev/null
+++ b/audio/whitefin/tuning/waves/waves_preset.mps
Binary files differ