Mark the cortex-{a7,a53,a53.57} chips as supporting LPAE
Port of Id3994c6d334c8bb673fc3849550f591136a8dd6a
Change-Id: Ic9d96ff81f9119e012f45e8e3b3a76961a922a21
diff --git a/cc/arm_device.go b/cc/arm_device.go
index 7212c4f..1d24a27 100644
--- a/cc/arm_device.go
+++ b/cc/arm_device.go
@@ -106,6 +106,11 @@
armCpuVariantCflags = map[string][]string{
"cortex-a7": []string{
"-mcpu=cortex-a7",
+ // Fake an ARM compiler flag as these processors support LPAE which GCC/clang
+ // don't advertise.
+ // TODO This is a hack and we need to add it for each processor that supports LPAE until some
+ // better solution comes around. See Bug 27340895
+ "-D__ARM_FEATURE_LPAE=1",
},
"cortex-a8": []string{
"-mcpu=cortex-a8",
@@ -114,6 +119,8 @@
"-mcpu=cortex-a15",
// Fake an ARM compiler flag as these processors support LPAE which GCC/clang
// don't advertise.
+ // TODO This is a hack and we need to add it for each processor that supports LPAE until some
+ // better solution comes around. See Bug 27340895
"-D__ARM_FEATURE_LPAE=1",
},
}