Merge "Only enable MLGO for ARM64 ThinLTO targets" into main
diff --git a/cc/config/global.go b/cc/config/global.go
index 892a86c..2ca9df9 100644
--- a/cc/config/global.go
+++ b/cc/config/global.go
@@ -174,9 +174,6 @@
"-Werror=format-security",
"-nostdlibinc",
- // Enable MLGO for register allocation.
- "-mllvm -regalloc-enable-advisor=release",
-
// Emit additional debug info for AutoFDO
"-fdebug-info-for-profiling",
}
@@ -205,8 +202,6 @@
"-Wl,--exclude-libs,libgcc_stripped.a",
"-Wl,--exclude-libs,libunwind_llvm.a",
"-Wl,--exclude-libs,libunwind.a",
- // Enable MLGO for register allocation.
- "-Wl,-mllvm,-regalloc-enable-advisor=release",
}
deviceGlobalLldflags = append(append(deviceGlobalLdflags, commonGlobalLldflags...),
diff --git a/cc/lto.go b/cc/lto.go
index 20e4f24..fb3b485 100644
--- a/cc/lto.go
+++ b/cc/lto.go
@@ -147,10 +147,15 @@
}
}
- // For ML training
- if ctx.Config().IsEnvTrue("THINLTO_EMIT_INDEXES_AND_IMPORTS") {
- ltoLdFlags = append(ltoLdFlags, "-Wl,--save-temps=import")
- ltoLdFlags = append(ltoLdFlags, "-Wl,--thinlto-emit-index-files")
+ // Register allocation MLGO flags for ARM64.
+ if ctx.Arch().ArchType == android.Arm64 {
+ ltoCFlags = append(ltoCFlags, "-mllvm -regalloc-enable-advisor=release")
+ ltoLdFlags = append(ltoLdFlags, "-Wl,-mllvm,-regalloc-enable-advisor=release")
+ // Flags for training MLGO model.
+ if ctx.Config().IsEnvTrue("THINLTO_EMIT_INDEXES_AND_IMPORTS") {
+ ltoLdFlags = append(ltoLdFlags, "-Wl,--save-temps=import")
+ ltoLdFlags = append(ltoLdFlags, "-Wl,--thinlto-emit-index-files")
+ }
}
flags.Local.CFlags = append(flags.Local.CFlags, ltoCFlags...)